2 FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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71 * Normally the interrupt nesting test would use [at least] two separate timers.
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72 * In this case, there was difficulty generating interrupts from TC1, so only
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73 * TC0 is used. Nested interrupts are instead generated by manually pending the
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74 * TC1 interrupt from inside the TC0 interrupt handler. This means TC1 must be
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75 * assigned an interrupt priority above TC0. [Note this arrangement does not
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76 * really fulfil the purpose of the test as the nesting always occurs at the
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77 * same point in the code, whereas the test is designed to test nesting
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78 * occurring within the queue API functions]
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81 /* Scheduler includes. */
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82 #include "FreeRTOS.h"
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84 /* Demo includes. */
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85 #include "IntQueueTimer.h"
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86 #include "IntQueue.h"
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88 /* Library includes. */
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92 /* The frequency at which the int queue timer executes. */
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93 #define tmrTIMER_0_FREQUENCY ( 2030UL )
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95 /* The genuine timer interrupt executes at the lower priority. The manually
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96 pended timer interrupt executes at the higher priority to ensure it always nests
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97 with the lower priority (which in turn will occasionally nest with the tick
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98 interrupt - creating a maximum interrupt nesting depth of 3). */
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99 #define tmrLOWER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1 )
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100 #define tmrHIGHER_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )
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102 /*-----------------------------------------------------------*/
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104 void vInitialiseTimerForIntQueueTest( void )
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106 uint32_t ulDivider, ulTCCLKS;
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108 /* Configure PMC for TC0. */
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109 pmc_enable_periph_clk( ID_TC0 );
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111 /* Configure TC0 channel 0 for interrupts at tmrTIMER_0_FREQUENCY. */
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112 tc_find_mck_divisor( tmrTIMER_0_FREQUENCY, configCPU_CLOCK_HZ, &ulDivider, &ulTCCLKS, configCPU_CLOCK_HZ );
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113 tc_init( TC0, 0, ulTCCLKS | TC_CMR_CPCTRG );
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115 tc_write_rc( TC0, 0, ( configCPU_CLOCK_HZ / ulDivider ) / tmrTIMER_0_FREQUENCY );
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116 tc_enable_interrupt( TC0, 0, TC_IER_CPCS );
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118 /* Configure and enable interrupts for both TC0 and TC1, as TC1 interrupts
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119 are manually pended from within the TC0 interrupt handler (see the notes at
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120 the top of this file). */
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121 NVIC_ClearPendingIRQ( TC0_IRQn );
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122 NVIC_ClearPendingIRQ( TC1_IRQn );
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123 NVIC_SetPriority( TC0_IRQn, tmrLOWER_PRIORITY );
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124 NVIC_SetPriority( TC1_IRQn, tmrHIGHER_PRIORITY );
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125 NVIC_EnableIRQ( TC0_IRQn );
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126 NVIC_EnableIRQ( TC1_IRQn );
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128 /* Start the timer last of all. */
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129 tc_start( TC0, 0 );
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131 /*-----------------------------------------------------------*/
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133 void TC0_Handler( void )
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135 static uint32_t ulISRCount = 0;
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137 /* Clear the interrupt. */
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138 if( tc_get_status( TC0, 0 ) != 0 )
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140 /* As noted in the comments above, manually pend the TC1 interrupt from
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141 the TC0 interrupt handler. This is not done on each occurrence of the
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142 TC0 interrupt though, to make sure interrupts don't nest in every single
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145 if( ( ulISRCount & 0x07 ) != 0x07 )
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147 /* Pend an interrupt that will nest with this interrupt. */
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148 NVIC_SetPendingIRQ( TC1_IRQn );
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151 /* Call the IntQ test function for this channel. */
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152 portYIELD_FROM_ISR( xFirstTimerHandler() );
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155 /*-----------------------------------------------------------*/
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157 void TC1_Handler( void )
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159 /* Call the IntQ test function that would normally get called from a second
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160 and independent timer. */
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161 portYIELD_FROM_ISR( xSecondTimerHandler() );
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