1 /* ----------------------------------------------------------------------------
\r
2 * SAM Software Package License
\r
3 * ----------------------------------------------------------------------------
\r
4 * Copyright (c) 2013, Atmel Corporation
\r
6 * All rights reserved.
\r
8 * Redistribution and use in source and binary forms, with or without
\r
9 * modification, are permitted provided that the following conditions are met:
\r
11 * - Redistributions of source code must retain the above copyright notice,
\r
12 * this list of conditions and the disclaimer below.
\r
14 * Atmel's name may not be used to endorse or promote products derived from
\r
15 * this software without specific prior written permission.
\r
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
\r
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
\r
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
\r
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
\r
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
\r
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
\r
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
\r
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
\r
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
\r
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
27 * ----------------------------------------------------------------------------
\r
34 /*------------------------------------------------------------------------------
\r
36 *------------------------------------------------------------------------------*/
\r
46 /*------------------------------------------------------------------------------
\r
48 *------------------------------------------------------------------------------*/
\r
51 const struct ov_reg ov2640_yuv_qvga[]= {
\r
52 {0xff, 0x01},{0x12, 0x80},
\r
53 {0xff, 0x00},{0x2c, 0xff},{0x2e, 0xdf},
\r
54 {0xff, 0x01},{0x3c, 0x32},{0x11, 0x00},{0x09, 0x02},
\r
55 {0x04, 0x28},{0x13, 0xe5},{0x14, 0x48},{0x2c, 0x0c},{0x33, 0x78},{0x3a, 0x33},{0x3b, 0xfb},{0x3e, 0x00},{0x43, 0x11},
\r
56 {0x16, 0x10},{0x39, 0x02},{0x35, 0x88},{0x22, 0x0a},{0x37, 0x40},{0x23, 0x00},{0x34, 0xa0},{0x36, 0x1a},{0x06, 0x02},
\r
57 {0x07, 0xc0},{0x0d, 0xb7},{0x0e, 0x01},{0x4c, 0x00},{0x4a, 0x81},{0x21, 0x99},{0x24, 0x3a},{0x25, 0x32},{0x26, 0x82},
\r
58 {0x5c, 0x00},{0x63, 0x00},{0x5d, 0x55},{0x5e, 0x7d},{0x5f, 0x7d},{0x60, 0x55},{0x61, 0x70},{0x62, 0x80},{0x7c, 0x05},
\r
59 {0x20, 0x80},{0x28, 0x30},{0x6c, 0x00},{0x6d, 0x80},{0x6e, 0x00},{0x70, 0x02},{0x71, 0x94},{0x73, 0xc1},{0x3d, 0x34},
\r
60 {0x5a, 0x57},{0x4f, 0xbb},{0x50, 0x9c},
\r
61 {0xff, 0x00},{0xe5, 0x7f},{0xf9, 0xc0},{0x41, 0x24},{0xe0, 0x14},{0x76, 0xff},
\r
62 {0x33, 0xa0},{0x42, 0x20},{0x43, 0x18},{0x4c, 0x00},{0x87, 0xd0},{0x88, 0x3f},{0xd7, 0x03},{0xd9, 0x10},{0xd3, 0x82},
\r
63 {0xc8, 0x08},{0xc9, 0x80},{0x7c, 0x00},{0x7d, 0x02},{0x7c, 0x03},{0x7d, 0x48},{0x7d, 0x48},{0x7c, 0x08},{0x7d, 0x20},
\r
64 {0x7d, 0x10},{0x7d, 0x0e},{0x90, 0x00},{0x91, 0x0e},{0x91, 0x1a},{0x91, 0x31},{0x91, 0x5a},{0x91, 0x69},{0x91, 0x75},
\r
65 {0x91, 0x7e},{0x91, 0x88},{0x91, 0x8f},{0x91, 0x96},{0x91, 0xa3},{0x91, 0xaf},{0x91, 0xc4},{0x91, 0xd7},{0x91, 0xe8},
\r
66 {0x91, 0x20},{0x92, 0x00},{0x93, 0x06},{0x93, 0xe3},{0x93, 0x05},{0x93, 0x05},{0x93, 0x00},{0x93, 0x02},{0x93, 0x00},
\r
67 {0x93, 0x00},{0x93, 0x00},{0x93, 0x00},{0x93, 0x00},{0x93, 0x00},{0x93, 0x00},{0x96, 0x00},{0x97, 0x08},{0x97, 0x19},
\r
68 {0x97, 0x02},{0x97, 0x0c},{0x97, 0x24},{0x97, 0x30},{0x97, 0x28},{0x97, 0x26},{0x97, 0x02},{0x97, 0x98},{0x97, 0x80},
\r
69 {0x97, 0x00},{0x97, 0x00},{0xc3, 0xed},{0xa4, 0x00},{0xa8, 0x00},{0xc5, 0x11},{0xc6, 0x51},{0xbf, 0x80},{0xc7, 0x10},
\r
70 {0xb6, 0x66},{0xb8, 0xa5},{0xb7, 0x64},{0xb9, 0x7c},{0xb3, 0xaf},{0xb4, 0x97},{0xb5, 0xff},{0xb0, 0xc5},{0xb1, 0x94},
\r
71 {0xb2, 0x0f},{0xc4, 0x5c},{0xc0, 0xc8},{0xc1, 0x96},{0x86, 0x1d},{0x50, 0x00},{0x51, 0x90},{0x52, 0x18},{0x53, 0x00},
\r
72 {0x54, 0x00},{0x55, 0x88},{0x57, 0x00},{0x5a, 0x90},{0x5b, 0x18},{0x5c, 0x05},{0xc3, 0xed},{0x7f, 0x00},{0xda, 0x04},
\r
73 {0xe5, 0x1f},{0xe1, 0x67},{0xe0, 0x00},{0xdd, 0xff},{0x05, 0x00},
\r
74 {0xff, 0x01},{0x11, 0x01},
\r
75 {0xff, 0x01},{0x12, 0x40},
\r
76 {0x17, 0x11},{0x18, 0x43},{0x19, 0x00},{0x1a, 0x4b},{0x32, 0x09},{0x4f, 0xca},{0x50, 0xa8},{0x5a, 0x23},{0x6d, 0x00},
\r
77 {0x3d, 0x38},{0x39, 0x12},{0x35, 0xda},{0x22, 0x1a},{0x37, 0xc3},{0x23, 0x00},{0x34, 0xc0},{0x36, 0x1a},{0x06, 0x88},
\r
78 {0x07, 0xc0},{0x0d, 0x87},{0x0e, 0x41},{0x4c, 0x00},{0x48, 0x00},{0x5B, 0x00},{0x42, 0x03},
\r
79 {0xff, 0x00},{0xe0, 0x04},
\r
80 {0xc0, 0x64},{0xc1, 0x4B},{0x8c, 0x00},{0x86, 0x1D},{0xd3, 0x82},{0xe0, 0x00},
\r
82 {0xc0, 0x64},{0xc1, 0x4B},{0x8c, 0x00}, // Xiao: HSIZE 0x64*8 = 800, VSIZE 0x4b*8 = 600
\r
84 {0x50, 0x89}, // LP_DP, V_DIV 1, H_DIV 1
\r
85 {0x51, 0xC8},{0x52, 0x96},{0x53, 0x00},{0x54, 0x00},{0x55, 0x00}, // Xiao: HSIZE 0xC8(200)*4 = 800, VSIZE 0x96(150)*4 = 600
\r
86 {0x5a, 0x50},{0x5b, 0x3C},{0x5c, 0x00}, // Xiao: ZMOW 0x50(80)*4 = 320, ZMOH 0x3C(60)*4 = 240
\r
88 {0xFF, 0x00},{0xE0, 0x04},{0xE1, 0x67},{0xD7, 0x01},{0xDA, 0x00},{0xD3, 0x82},{0xE0, 0x00},
\r
92 const struct ov_reg ov2640_yuv_vga[]= {
\r
94 {0x12, 0x80}, //reset
\r
95 {0xff, 0x00}, //sensor
\r
97 {0x2e, 0xdf}, //ADDVSH, VSYNC msb=223
\r
100 {0x11, 0x00}, //clock rate off
\r
101 {0x09, 0x02}, //2 capablity + standby mode
\r
102 {0x04, 0x28}, //? ??????????????????????????????????
\r
104 {0x14, 0x48}, //Auto agc
\r
117 {0x34, 0xa0}, //startpoint 0
\r
118 {0x36, 0x1a}, //? XXXXXXXXXXXXXXXX
\r
126 {0x24, 0x3a}, // Luminance high
\r
127 {0x25, 0x32}, // Luminance low
\r
128 //{0x24, 0x10}, // Luminance high
\r
129 //{0x25, 0x03}, // Luminance low
\r
131 {0x26, 0xF3}, // Fast mode large Step Range Threshold
\r
134 {0x5d, 0x55}, //zone
\r
135 {0x5e, 0x7d}, //zone
\r
136 {0x5f, 0x7d}, //zone
\r
137 {0x60, 0x55}, //zone
\r
138 {0x61, 0x70}, //Histogram low
\r
139 {0x62, 0x80}, //Histogram high
\r
151 {0x4f, 0xbb}, //50Hz
\r
152 {0x50, 0x9c}, //60Hz
\r
154 {0xff, 0x00}, //dsp
\r
156 {0xf9, 0xc0}, //MicroC reset,Boot
\r
158 {0xe0, 0x14}, //JPEG,DVP reset
\r
164 {0x87, 0xd0}, //Module Enable BPC+WPC 11010000
\r
168 {0xd3, 0x82}, //Auto mode
\r
171 {0x7c, 0x00}, //SDE indirect register access: address
\r
172 {0x7d, 0x02}, //SDE indirect register data
\r
225 {0xc3, 0xed}, //Module enable
\r
243 {0xc0, 0xc8}, // HSIZE8[7:0] 1600
\r
244 {0xc1, 0x96}, // VSIZE8[7:0] 1200
\r
245 {0x86, 0x1d}, //Module enable
\r
247 {0x51, 0x90}, //H_SIZE[7:0] (real/4) 1600
\r
248 {0x52, 0x18}, //V_SIZE[7:0] (real/4) 1120
\r
249 {0x53, 0x00}, //OFFSET_X[7:0]
\r
250 {0x54, 0x00}, //OFFSET_Y[7:0]
\r
251 {0x55, 0x88}, //V_SIZE[8]=1 H_SIZE[8]
\r
253 {0x5a, 0x90}, //OUTW
\r
254 {0x5b, 0x18}, //OUTH
\r
255 {0x5c, 0x05}, //OUTW8 ,OUTH8
\r
258 {0xda, 0x04}, //Image output format select ------ RAW
\r
261 {0xe0, 0x00}, //Reset
\r
263 {0x05, 0x00}, //Bypass DSP no
\r
264 {0xC2, 0x08 | 0x04 | 0x02 },
\r
266 {0xff, 0x01}, //Sensor
\r
268 {0xff, 0x01}, //Sensor
\r
269 {0x12, 0x40}, //Preview mode
\r
276 {0x50, 0xa8}, //10 101 000 V_DIVDER = 5
\r
277 {0x5a, 0x23}, // OUTW 23
\r
293 {0x5B, 0x00}, //OUTH
\r
295 {0xff, 0x00}, //DSP
\r
297 {0xe0, 0x04}, //Reset DVP
\r
298 {0xc0, 0x64}, // HSIZE8[7:0] 400
\r
299 {0xc1, 0x4B}, // VSIZE8[7:0] 300
\r
301 {0x86, 0x1D}, //Modle enable
\r
302 {0xd3, 0x82}, //Auto mode DVP PCLK=2
\r
303 {0xe0, 0x00}, //Reset
\r
305 {0xff, 0x00}, //DSP
\r
306 {0xc0, 0x64}, // HSIZE8[7:0] 400
\r
307 {0xc1, 0x4B}, // VSIZE8[7:0] 300
\r
311 {0x51, 0xC8}, //H_SIZE[7:0] (real/4) 800
\r
312 {0x52, 0x96}, //V_SIZE[7:0] (real/4) 600
\r
313 {0x53, 0x00}, //OFFSET
\r
314 {0x54, 0x00}, //OFFSET
\r
315 {0x55, 0x00}, //H_SIZE[8],V_SIZE[8]
\r
316 {0x5a, 0xA0}, //OUTW[0-7] 160?
\r
317 {0x5b, 0x78}, //OUTH[0-7] 120?
\r
318 {0x5c, 0x00}, //OUTW8,OUTH8
\r
324 {0xDA, 0x00}, //Image output format select ------ YUV422
\r