git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c

   1 /*\r
   2     FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     This file is part of the FreeRTOS distribution.\r
   8 \r
   9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  10     the terms of the GNU General Public License (version 2) as published by the\r
  11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
  12 \r
  13     ***************************************************************************\r
  14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  16     >>!   obliged to provide the source code for proprietary components     !<<\r
  17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  18     ***************************************************************************\r
  19 \r
  20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
  23     link: http://www.freertos.org/a00114.html\r
  24 \r
  25     ***************************************************************************\r
  26      *                                                                       *\r
  27      *    FreeRTOS provides completely free yet professionally developed,    *\r
  28      *    robust, strictly quality controlled, supported, and cross          *\r
  29      *    platform software that is more than just the market leader, it     *\r
  30      *    is the industry's de facto standard.                               *\r
  31      *                                                                       *\r
  32      *    Help yourself get started quickly while simultaneously helping     *\r
  33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
  34      *    tutorial book, reference manual, or both:                          *\r
  35      *    http://www.FreeRTOS.org/Documentation                              *\r
  36      *                                                                       *\r
  37     ***************************************************************************\r
  38 \r
  39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
  40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
  41     defined configASSERT()?\r
  42 \r
  43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
  44     embedded software for free we request you assist our global community by\r
  45     participating in the support forum.\r
  46 \r
  47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
  48     be as productive as possible as early as possible.  Now you can receive\r
  49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
  50     Ltd, and the world's leading authority on the world's leading RTOS.\r
  51 \r
  52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  55 \r
  56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
  57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
  58 \r
  59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
  60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  61     licenses offer ticketed support, indemnification and commercial middleware.\r
  62 \r
  63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  64     engineered and independently SIL3 certified version for use in safety and\r
  65     mission critical applications that require provable dependability.\r
  66 \r
  67     1 tab == 4 spaces!\r
  68 */\r
  69 \r
  70 /*\r
  71  * "Reg test" tasks - These fill the registers with known values, then check\r
  72  * that each register maintains its expected value for the lifetime of the\r
  73  * task.  Each task uses a different set of values.  The reg test tasks execute\r
  74  * with a very low priority, so get preempted very frequently.  A register\r
  75  * containing an unexpected value is indicative of an error in the context\r
  76  * switching mechanism.\r
  77  */\r
  78 \r
  79 void vRegTest1Implementation( void ) __attribute__ ((naked));\r
  80 void vRegTest2Implementation( void ) __attribute__ ((naked));\r
  81 \r
  82 void vRegTest1Implementation( void )\r
  83 {\r
  84         __asm volatile\r
  85         (\r
  86                 ".extern ulRegTest1LoopCounter \n"\r
  87                 "/* Fill the core registers with known values. */               \n"\r
  88                 "mov    r0, #100                        \n"\r
  89                 "mov    r1, #101                        \n"\r
  90                 "mov    r2, #102                        \n"\r
  91                 "mov    r3, #103                        \n"\r
  92                 "mov    r4, #104                        \n"\r
  93                 "mov    r5, #105                        \n"\r
  94                 "mov    r6, #106                        \n"\r
  95                 "mov    r7, #107                        \n"\r
  96                 "mov    r8, #108                        \n"\r
  97                 "mov    r9, #109                        \n"\r
  98                 "mov    r10, #110                       \n"\r
  99                 "mov    r11, #111                       \n"\r
 100                 "mov    r12, #112                       \n"\r
 101 \r
 102                 "/* Fill the VFP registers with known values. */                \n"\r
 103                 "vmov   d0, r0, r1                      \n"\r
 104                 "vmov   d1, r2, r3                      \n"\r
 105                 "vmov   d2, r4, r5                      \n"\r
 106                 "vmov   d3, r6, r7                      \n"\r
 107                 "vmov   d4, r8, r9                      \n"\r
 108                 "vmov   d5, r10, r11            \n"\r
 109                 "vmov   d6, r0, r1                      \n"\r
 110                 "vmov   d7, r2, r3                      \n"\r
 111                 "vmov   d8, r4, r5                      \n"\r
 112                 "vmov   d9, r6, r7                      \n"\r
 113                 "vmov   d10, r8, r9                     \n"\r
 114                 "vmov   d11, r10, r11           \n"\r
 115                 "vmov   d12, r0, r1                     \n"\r
 116                 "vmov   d13, r2, r3                     \n"\r
 117                 "vmov   d14, r4, r5                     \n"\r
 118                 "vmov   d15, r6, r7                     \n"\r
 119 \r
 120         "reg1_loop:                                             \n"\r
 121                 "/* Check all the VFP registers still contain the values set above.             \n"\r
 122                 "First save registers that are clobbered by the test. */                                \n"\r
 123                 "push { r0-r1 }                         \n"\r
 124 \r
 125                 "vmov   r0, r1, d0                      \n"\r
 126                 "cmp    r0, #100                        \n"\r
 127                 "bne    reg1_error_loopf        \n"\r
 128                 "cmp    r1, #101                        \n"\r
 129                 "bne    reg1_error_loopf        \n"\r
 130                 "vmov   r0, r1, d1                      \n"\r
 131                 "cmp    r0, #102                        \n"\r
 132                 "bne    reg1_error_loopf        \n"\r
 133                 "cmp    r1, #103                        \n"\r
 134                 "bne    reg1_error_loopf        \n"\r
 135                 "vmov   r0, r1, d2                      \n"\r
 136                 "cmp    r0, #104                        \n"\r
 137                 "bne    reg1_error_loopf        \n"\r
 138                 "cmp    r1, #105                        \n"\r
 139                 "bne    reg1_error_loopf        \n"\r
 140                 "vmov   r0, r1, d3                      \n"\r
 141                 "cmp    r0, #106                        \n"\r
 142                 "bne    reg1_error_loopf        \n"\r
 143                 "cmp    r1, #107                        \n"\r
 144                 "bne    reg1_error_loopf        \n"\r
 145                 "vmov   r0, r1, d4                      \n"\r
 146                 "cmp    r0, #108                        \n"\r
 147                 "bne    reg1_error_loopf        \n"\r
 148                 "cmp    r1, #109                        \n"\r
 149                 "bne    reg1_error_loopf        \n"\r
 150                 "vmov   r0, r1, d5                      \n"\r
 151                 "cmp    r0, #110                        \n"\r
 152                 "bne    reg1_error_loopf        \n"\r
 153                 "cmp    r1, #111                        \n"\r
 154                 "bne    reg1_error_loopf        \n"\r
 155                 "vmov   r0, r1, d6                      \n"\r
 156                 "cmp    r0, #100                        \n"\r
 157                 "bne    reg1_error_loopf        \n"\r
 158                 "cmp    r1, #101                        \n"\r
 159                 "bne    reg1_error_loopf        \n"\r
 160                 "vmov   r0, r1, d7                      \n"\r
 161                 "cmp    r0, #102                        \n"\r
 162                 "bne    reg1_error_loopf        \n"\r
 163                 "cmp    r1, #103                        \n"\r
 164                 "bne    reg1_error_loopf        \n"\r
 165                 "vmov   r0, r1, d8                      \n"\r
 166                 "cmp    r0, #104                        \n"\r
 167                 "bne    reg1_error_loopf        \n"\r
 168                 "cmp    r1, #105                        \n"\r
 169                 "bne    reg1_error_loopf        \n"\r
 170                 "vmov   r0, r1, d9                      \n"\r
 171                 "cmp    r0, #106                        \n"\r
 172                 "bne    reg1_error_loopf        \n"\r
 173                 "cmp    r1, #107                        \n"\r
 174                 "bne    reg1_error_loopf        \n"\r
 175                 "vmov   r0, r1, d10                     \n"\r
 176                 "cmp    r0, #108                        \n"\r
 177                 "bne    reg1_error_loopf        \n"\r
 178                 "cmp    r1, #109                        \n"\r
 179                 "bne    reg1_error_loopf        \n"\r
 180                 "vmov   r0, r1, d11                     \n"\r
 181                 "cmp    r0, #110                        \n"\r
 182                 "bne    reg1_error_loopf        \n"\r
 183                 "cmp    r1, #111                        \n"\r
 184                 "bne    reg1_error_loopf        \n"\r
 185                 "vmov   r0, r1, d12                     \n"\r
 186                 "cmp    r0, #100                        \n"\r
 187                 "bne    reg1_error_loopf        \n"\r
 188                 "cmp    r1, #101                        \n"\r
 189                 "bne    reg1_error_loopf        \n"\r
 190                 "vmov   r0, r1, d13                     \n"\r
 191                 "cmp    r0, #102                        \n"\r
 192                 "bne    reg1_error_loopf        \n"\r
 193                 "cmp    r1, #103                        \n"\r
 194                 "bne    reg1_error_loopf        \n"\r
 195                 "vmov   r0, r1, d14                     \n"\r
 196                 "cmp    r0, #104                        \n"\r
 197                 "bne    reg1_error_loopf        \n"\r
 198                 "cmp    r1, #105                        \n"\r
 199                 "bne    reg1_error_loopf        \n"\r
 200                 "vmov   r0, r1, d15                     \n"\r
 201                 "cmp    r0, #106                        \n"\r
 202                 "bne    reg1_error_loopf        \n"\r
 203                 "cmp    r1, #107                        \n"\r
 204                 "bne    reg1_error_loopf        \n"\r
 205 \r
 206                 "/* Restore the registers that were clobbered by the test. */           \n"\r
 207                 "pop    {r0-r1}                         \n"\r
 208 \r
 209                 "/* VFP register test passed.  Jump to the core register test. */       \n"\r
 210                 "b              reg1_loopf_pass         \n"\r
 211 \r
 212         "reg1_error_loopf:                              \n"\r
 213                 "/* If this line is hit then a VFP register value was found to be incorrect. */         \n"\r
 214                 "b reg1_error_loopf                     \n"\r
 215 \r
 216         "reg1_loopf_pass:                               \n"\r
 217 \r
 218                 "cmp    r0, #100                        \n"\r
 219                 "bne    reg1_error_loop         \n"\r
 220                 "cmp    r1, #101                        \n"\r
 221                 "bne    reg1_error_loop         \n"\r
 222                 "cmp    r2, #102                        \n"\r
 223                 "bne    reg1_error_loop         \n"\r
 224                 "cmp    r3, #103                        \n"\r
 225                 "bne    reg1_error_loop         \n"\r
 226                 "cmp    r4, #104                        \n"\r
 227                 "bne    reg1_error_loop         \n"\r
 228                 "cmp    r5, #105                        \n"\r
 229                 "bne    reg1_error_loop         \n"\r
 230                 "cmp    r6, #106                        \n"\r
 231                 "bne    reg1_error_loop         \n"\r
 232                 "cmp    r7, #107                        \n"\r
 233                 "bne    reg1_error_loop         \n"\r
 234                 "cmp    r8, #108                        \n"\r
 235                 "bne    reg1_error_loop         \n"\r
 236                 "cmp    r9, #109                        \n"\r
 237                 "bne    reg1_error_loop         \n"\r
 238                 "cmp    r10, #110                       \n"\r
 239                 "bne    reg1_error_loop         \n"\r
 240                 "cmp    r11, #111                       \n"\r
 241                 "bne    reg1_error_loop         \n"\r
 242                 "cmp    r12, #112                       \n"\r
 243                 "bne    reg1_error_loop         \n"\r
 244 \r
 245                 "/* Everything passed, increment the loop counter. */   \n"\r
 246                 "push   { r0-r1 }                       \n"\r
 247                 "ldr    r0, =ulRegTest1LoopCounter      \n"\r
 248                 "ldr    r1, [r0]                        \n"\r
 249                 "adds   r1, r1, #1                      \n"\r
 250                 "str    r1, [r0]                        \n"\r
 251                 "pop    { r0-r1 }                       \n"\r
 252 \r
 253                 "/* Start again. */                     \n"\r
 254                 "b              reg1_loop                       \n"\r
 255 \r
 256         "reg1_error_loop:                               \n"\r
 257                 "/* If this line is hit then there was an error in a core register value. \n"\r
 258                 "The loop ensures the loop counter stops incrementing. */       \n"\r
 259                 "b      reg1_error_loop                 \n"\r
 260                 "nop                                            "\r
 261         ); /* __asm volatile. */\r
 262 }\r
 263 /*-----------------------------------------------------------*/\r
 264 \r
 265 void vRegTest2Implementation( void )\r
 266 {\r
 267         __asm volatile\r
 268         (\r
 269                 ".extern ulRegTest2LoopCounter \n"\r
 270                 "/* Set all the core registers to known values. */      \n"\r
 271                 "mov    r0, #-1                         \n"\r
 272                 "mov    r1, #1                          \n"\r
 273                 "mov    r2, #2                          \n"\r
 274                 "mov    r3, #3                          \n"\r
 275                 "mov    r4, #4                          \n"\r
 276                 "mov    r5, #5                          \n"\r
 277                 "mov    r6, #6                          \n"\r
 278                 "mov    r7, #7                          \n"\r
 279                 "mov    r8, #8                          \n"\r
 280                 "mov    r9, #9                          \n"\r
 281                 "mov    r10, #10                        \n"\r
 282                 "mov    r11, #11                        \n"\r
 283                 "mov    r12, #12                        \n"\r
 284 \r
 285                 "/* Set all the VFP to known values. */  \n"\r
 286                 "vmov   d0, r0, r1                      \n"\r
 287                 "vmov   d1, r2, r3                      \n"\r
 288                 "vmov   d2, r4, r5                      \n"\r
 289                 "vmov   d3, r6, r7                      \n"\r
 290                 "vmov   d4, r8, r9                      \n"\r
 291                 "vmov   d5, r10, r11            \n"\r
 292                 "vmov   d6, r0, r1                      \n"\r
 293                 "vmov   d7, r2, r3                      \n"\r
 294                 "vmov   d8, r4, r5                      \n"\r
 295                 "vmov   d9, r6, r7                      \n"\r
 296                 "vmov   d10, r8, r9                     \n"\r
 297                 "vmov   d11, r10, r11           \n"\r
 298                 "vmov   d12, r0, r1                     \n"\r
 299                 "vmov   d13, r2, r3                     \n"\r
 300                 "vmov   d14, r4, r5                     \n"\r
 301                 "vmov   d15, r6, r7                     \n"\r
 302 \r
 303         "reg2_loop:                                             \n"\r
 304 \r
 305                 "/* Check all the VFP registers still contain the values set above.             \n"\r
 306                 "First save registers that are clobbered by the test. */                                \n"\r
 307                 "push { r0-r1 }                         \n"\r
 308 \r
 309                 "vmov   r0, r1, d0                      \n"\r
 310                 "cmp    r0, #-1                         \n"\r
 311                 "bne    reg2_error_loopf        \n"\r
 312                 "cmp    r1, #1                          \n"\r
 313                 "bne    reg2_error_loopf        \n"\r
 314                 "vmov   r0, r1, d1                      \n"\r
 315                 "cmp    r0, #2                          \n"\r
 316                 "bne    reg2_error_loopf        \n"\r
 317                 "cmp    r1, #3                          \n"\r
 318                 "bne    reg2_error_loopf        \n"\r
 319                 "vmov   r0, r1, d2                      \n"\r
 320                 "cmp    r0, #4                          \n"\r
 321                 "bne    reg2_error_loopf        \n"\r
 322                 "cmp    r1, #5                          \n"\r
 323                 "bne    reg2_error_loopf        \n"\r
 324                 "vmov   r0, r1, d3                      \n"\r
 325                 "cmp    r0, #6                          \n"\r
 326                 "bne    reg2_error_loopf        \n"\r
 327                 "cmp    r1, #7                          \n"\r
 328                 "bne    reg2_error_loopf        \n"\r
 329                 "vmov   r0, r1, d4                      \n"\r
 330                 "cmp    r0, #8                          \n"\r
 331                 "bne    reg2_error_loopf        \n"\r
 332                 "cmp    r1, #9                          \n"\r
 333                 "bne    reg2_error_loopf        \n"\r
 334                 "vmov   r0, r1, d5                      \n"\r
 335                 "cmp    r0, #10                         \n"\r
 336                 "bne    reg2_error_loopf        \n"\r
 337                 "cmp    r1, #11                         \n"\r
 338                 "bne    reg2_error_loopf        \n"\r
 339                 "vmov   r0, r1, d6                      \n"\r
 340                 "cmp    r0, #-1                         \n"\r
 341                 "bne    reg2_error_loopf        \n"\r
 342                 "cmp    r1, #1                          \n"\r
 343                 "bne    reg2_error_loopf        \n"\r
 344                 "vmov   r0, r1, d7                      \n"\r
 345                 "cmp    r0, #2                          \n"\r
 346                 "bne    reg2_error_loopf        \n"\r
 347                 "cmp    r1, #3                          \n"\r
 348                 "bne    reg2_error_loopf        \n"\r
 349                 "vmov   r0, r1, d8                      \n"\r
 350                 "cmp    r0, #4                          \n"\r
 351                 "bne    reg2_error_loopf        \n"\r
 352                 "cmp    r1, #5                          \n"\r
 353                 "bne    reg2_error_loopf        \n"\r
 354                 "vmov   r0, r1, d9                      \n"\r
 355                 "cmp    r0, #6                          \n"\r
 356                 "bne    reg2_error_loopf        \n"\r
 357                 "cmp    r1, #7                          \n"\r
 358                 "bne    reg2_error_loopf        \n"\r
 359                 "vmov   r0, r1, d10                     \n"\r
 360                 "cmp    r0, #8                          \n"\r
 361                 "bne    reg2_error_loopf        \n"\r
 362                 "cmp    r1, #9                          \n"\r
 363                 "bne    reg2_error_loopf        \n"\r
 364                 "vmov   r0, r1, d11                     \n"\r
 365                 "cmp    r0, #10                         \n"\r
 366                 "bne    reg2_error_loopf        \n"\r
 367                 "cmp    r1, #11                         \n"\r
 368                 "bne    reg2_error_loopf        \n"\r
 369                 "vmov   r0, r1, d12                     \n"\r
 370                 "cmp    r0, #-1                         \n"\r
 371                 "bne    reg2_error_loopf        \n"\r
 372                 "cmp    r1, #1                          \n"\r
 373                 "bne    reg2_error_loopf        \n"\r
 374                 "vmov   r0, r1, d13                     \n"\r
 375                 "cmp    r0, #2                          \n"\r
 376                 "bne    reg2_error_loopf        \n"\r
 377                 "cmp    r1, #3                          \n"\r
 378                 "bne    reg2_error_loopf        \n"\r
 379                 "vmov   r0, r1, d14                     \n"\r
 380                 "cmp    r0, #4                          \n"\r
 381                 "bne    reg2_error_loopf        \n"\r
 382                 "cmp    r1, #5                          \n"\r
 383                 "bne    reg2_error_loopf        \n"\r
 384                 "vmov   r0, r1, d15                     \n"\r
 385                 "cmp    r0, #6                          \n"\r
 386                 "bne    reg2_error_loopf        \n"\r
 387                 "cmp    r1, #7                          \n"\r
 388                 "bne    reg2_error_loopf        \n"\r
 389 \r
 390                 "/* Restore the registers that were clobbered by the test. */           \n"\r
 391                 "pop    {r0-r1}                         \n"\r
 392 \r
 393                 "/* VFP register test passed.  Jump to the core register test. */               \n"\r
 394                 "b              reg2_loopf_pass         \n"\r
 395 \r
 396         "reg2_error_loopf:                              \n"\r
 397                 "/* If this line is hit then a VFP register value was found to be               \n"\r
 398                 "incorrect. */                          \n"\r
 399                 "b reg2_error_loopf                     \n"\r
 400 \r
 401         "reg2_loopf_pass:                               \n"\r
 402 \r
 403                 "cmp    r0, #-1                         \n"\r
 404                 "bne    reg2_error_loop         \n"\r
 405                 "cmp    r1, #1                          \n"\r
 406                 "bne    reg2_error_loop         \n"\r
 407                 "cmp    r2, #2                          \n"\r
 408                 "bne    reg2_error_loop         \n"\r
 409                 "cmp    r3, #3                          \n"\r
 410                 "bne    reg2_error_loop         \n"\r
 411                 "cmp    r4, #4                          \n"\r
 412                 "bne    reg2_error_loop         \n"\r
 413                 "cmp    r5, #5                          \n"\r
 414                 "bne    reg2_error_loop         \n"\r
 415                 "cmp    r6, #6                          \n"\r
 416                 "bne    reg2_error_loop         \n"\r
 417                 "cmp    r7, #7                          \n"\r
 418                 "bne    reg2_error_loop         \n"\r
 419                 "cmp    r8, #8                          \n"\r
 420                 "bne    reg2_error_loop         \n"\r
 421                 "cmp    r9, #9                          \n"\r
 422                 "bne    reg2_error_loop         \n"\r
 423                 "cmp    r10, #10                        \n"\r
 424                 "bne    reg2_error_loop         \n"\r
 425                 "cmp    r11, #11                        \n"\r
 426                 "bne    reg2_error_loop         \n"\r
 427                 "cmp    r12, #12                        \n"\r
 428                 "bne    reg2_error_loop         \n"\r
 429 \r
 430                 "/* Increment the loop counter to indicate this test is still functioning       \n"\r
 431                 "correctly. */                          \n"\r
 432                 "push   { r0-r1 }                       \n"\r
 433                 "ldr    r0, =ulRegTest2LoopCounter      \n"\r
 434                 "ldr    r1, [r0]                        \n"\r
 435                 "adds   r1, r1, #1                      \n"\r
 436                 "str    r1, [r0]                        \n"\r
 437 \r
 438                 "/* Yield to increase test coverage. */                 \n"\r
 439                 "movs   r0, #0x01                       \n"\r
 440                 "ldr    r1, =0xe000ed04 /*NVIC_INT_CTRL */              \n"\r
 441                 "lsl    r0, r0, #28 /* Shift to PendSV bit */   \n"\r
 442                 "str    r0, [r1]                        \n"\r
 443                 "dsb                                            \n"\r
 444 \r
 445                 "pop { r0-r1 }                          \n"\r
 446 \r
 447                 "/* Start again. */                     \n"\r
 448                 "b reg2_loop                            \n"\r
 449 \r
 450         "reg2_error_loop:                               \n"\r
 451                 "/* If this line is hit then there was an error in a core register value.       \n"\r
 452                 "This loop ensures the loop counter variable stops incrementing. */                     \n"\r
 453                 "b reg2_error_loop                      \n"\r
 454         ); /* __asm volatile */\r
 455 }\r
 456 /*-----------------------------------------------------------*/\r
 457 \r