1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2014, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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35 * Interface for configuration the Analog-to-Digital Converter (AFEC) peripheral.
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39 * -# Configurate the pins for AFEC.
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40 * -# Initialize the AFEC with AFEC_Initialize().
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41 * -# Set AFEC clock and timing with AFEC_SetClock() and AFEC_SetTiming().
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42 * -# Select the active channel using AFEC_EnableChannel().
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43 * -# Start the conversion with AFEC_StartConversion().
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44 * -# Wait the end of the conversion by polling status with AFEC_GetStatus().
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45 * -# Finally, get the converted data using AFEC_GetConvertedData() or AFEC_GetLastConvertedData().
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51 /*----------------------------------------------------------------------------
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53 *----------------------------------------------------------------------------*/
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57 /*------------------------------------------------------------------------------
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59 *------------------------------------------------------------------------------*/
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61 /* -------- AFEC_MR : (AFEC Offset: 0x04) AFEC Mode Register -------- */
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62 #define AFEC_MR_SETTLING_Pos 20
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63 #define AFEC_MR_SETTLING_Msk (0x3u << AFEC_MR_SETTLING_Pos) /**< \brief (AFEC_MR) Trigger Selection */
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64 #define AFEC_MR_SETTLING_AST3 (0x0u << 20) /**< \brief (AFEC_MR) ADC_SETTLING_AST3 3 periods of AFEClock */
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65 #define AFEC_MR_SETTLING_AST5 (0x1u << 20) /**< \brief (AFEC_MR) ADC_SETTLING_AST5 5 periods of AFEClock */
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66 #define AFEC_MR_SETTLING_AST9 (0x2u << 20) /**< \brief (AFEC_MR) ADC_SETTLING_AST9 9 periods of AFEClock*/
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67 #define AFEC_MR_SETTLING_AST17 (0x3u << 20) /**< \brief (AFEC_MR) ADC_SETTLING_AST17 17 periods of AFEClock*/
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69 /***************************** Single Trigger Mode ****************************/
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70 #define AFEC_EMR_STM_Pos 25
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71 #define AFEC_EMR_STM_Msk (0x1u << AFEC_EMR_STM_Pos) /**< \brief (AFEC_EMR) Single Trigger Mode */
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72 #define AFEC_EMR_STM_MULTI_TRIG (0x0u << 25) /**< \brief (AFEC_EMR) Single Trigger Mode: Multiple triggers are required to get an averaged result. */
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73 #define AFEC_EMR_STM_SINGLE_TRIG (0x1u << 25) /**< \brief (AFEC_EMR) Single Trigger Mode: Only a Single Trigger is required to get an averaged value. */
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75 /***************************** TAG of the AFEC_LDCR Register ******************/
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76 #define AFEC_EMR_TAG_Pos 24
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77 #define AFEC_EMR_TAG_Msk (0x1u << AFEC_EMR_TAG_Pos) /**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register */
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78 #define AFEC_EMR_TAG_CHNB_ZERO (0x0u << 24) /**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register: Sets CHNB to zero in AFEC_LDCR. */
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79 #define AFEC_EMR_TAG_APPENDS (0x1u << 24) /**< \brief (AFEC_EMR) TAG of the AFEC_LDCR Register: Appends the channel number to the conversion result in AFEC_LDCR register. */
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81 /***************************** Compare All Channels ******************/
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82 #define AFEC_EMR_CMPALL_Pos 9
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83 #define AFEC_EMR_CMPALL_Msk (0x1u << AFEC_EMR_TAG_Pos) /**< \brief (AFEC_EMR) Compare All Channels */
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84 #define AFEC_EMR_CMPALL_ONE_CHANNEL_COMP (0x0u << 9) /**< \brief (AFEC_EMR) Compare All Channels: Only channel indicated in CMPSEL field is compared. */
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85 #define AFEC_EMR_CMPALL_ALL_CHANNELS_COMP (0x1u << 9) /**< \brief (AFEC_EMR) Compare All Channels: All channels are compared. */
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87 #define AFEC_ACR_PGA0_ON (0x1u << 2)
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88 #define AFEC_ACR_PGA1_ON (0x1u << 3)
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94 /*------------------------------------------------------------------------------
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95 * Macros function of register access
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96 *------------------------------------------------------------------------------*/
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98 #define AFEC_GetModeReg( pAFEC ) ((pAFEC)->AFEC_MR)
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99 #define AFEC_SetModeReg( pAFEC, mode ) ((pAFEC)->AFEC_MR = mode)
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101 #define AFEC_GetExtModeReg( pAFEC ) ((pAFEC)->AFEC_EMR)
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102 #define AFEC_SetExtModeReg( pAFEC, mode ) ((pAFEC)->AFEC_EMR = mode)
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104 #define AFEC_StartConversion( pAFEC ) ((pAFEC)->AFEC_CR = AFEC_CR_START)
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106 #define AFEC_EnableChannel( pAFEC, dwChannel ) {\
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107 (pAFEC)->AFEC_CHER = (1 << (dwChannel));\
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110 #define AFEC_DisableChannel(pAFEC, dwChannel) {\
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111 (pAFEC)->AFEC_CHDR = (1 << (dwChannel));\
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114 #define AFEC_EnableIt(pAFEC, dwMode) {\
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115 (pAFEC)->AFEC_IER = (dwMode);\
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118 #define AFEC_DisableIt(pAFEC, dwMode) {\
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119 (pAFEC)->AFEC_IDR = (dwMode);\
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122 #define AFEC_SetChannelGain(pAFEC,dwMode) {\
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123 (pAFEC)->AFEC_CG1R = dwMode;\
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126 #define AFEC_EnableDataReadyIt(pAFEC) ((pAFEC)->AFEC_IER = AFEC_IER_DRDY)
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128 #define AFEC_GetStatus(pAFEC) ((pAFEC)->AFEC_ISR)
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130 #define AFEC_GetCompareMode(pAFEC) (((pAFEC)->AFEC_EMR)& (AFEC_EMR_CMPMODE_Msk))
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132 #define AFEC_GetChannelStatus(pAFEC) ((pAFEC)->AFEC_CHSR)
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134 #define AFEC_GetInterruptMaskStatus(pAFEC) ((pAFEC)->AFEC_IMR)
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136 #define AFEC_GetLastConvertedData(pAFEC) ((pAFEC)->AFEC_LCDR)
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138 /*------------------------------------------------------------------------------
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139 * Exported functions
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140 *------------------------------------------------------------------------------*/
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141 extern void AFEC_Initialize( Afec* pAFEC, uint32_t dwId );
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142 extern uint32_t AFEC_SetClock( Afec* pAFEC, uint32_t dwPres, uint32_t dwMck );
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143 extern void AFEC_SetTiming( Afec* pAFEC, uint32_t dwStartup, uint32_t dwTracking, uint32_t dwSettling );
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144 extern void AFEC_SetTrigger( Afec* pAFEC, uint32_t dwTrgSel );
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145 extern void AFEC_SetAnalogChange( Afec* pAFE, uint8_t bEnDis );
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146 extern void AFEC_SetSleepMode( Afec* pAFEC, uint8_t bEnDis );
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147 extern void AFEC_SetFastWakeup( Afec* pAFEC, uint8_t bEnDis );
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148 extern void AFEC_SetSequenceMode( Afec* pAFEC, uint8_t bEnDis );
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149 extern void AFEC_SetSequence( Afec* pAFEC, uint32_t dwSEQ1, uint32_t dwSEQ2 );
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150 extern void AFEC_SetSequenceByList( Afec* pAFEC, uint8_t ucChList[], uint8_t ucNumCh );
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151 extern void AFEC_SetTagEnable( Afec* pAFEC, uint8_t bEnDis );
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152 extern void AFEC_SetCompareChannel( Afec* pAFEC, uint32_t dwChannel ) ;
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153 extern void AFEC_SetCompareMode( Afec* pAFEC, uint32_t dwMode ) ;
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154 extern void AFEC_SetComparisonWindow( Afec* pAFEC, uint32_t dwHi_Lo ) ;
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155 extern uint8_t AFEC_CheckConfiguration( Afec* pAFEC, uint32_t dwMcK ) ;
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156 extern uint32_t AFEC_GetConvertedData( Afec* pAFEC, uint32_t dwChannel ) ;
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157 extern void AFEC_SetStartupTime( Afec* pAFEC, uint32_t dwUs );
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158 extern void AFEC_SetTrackingTime( Afec* pAFEC, uint32_t dwNs );
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159 extern void AFEC_SetAnalogOffset( Afec *pAFE, uint32_t dwChannel,uint32_t aoffset );
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160 extern void AFEC_SetAnalogControl( Afec *pAFE, uint32_t control);
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165 #endif /* #ifndef _AFEC_ */
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