1 /* ----------------------------------------------------------------------------
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2 * SAM Software Package License
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3 * ----------------------------------------------------------------------------
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4 * Copyright (c) 2011, Atmel Corporation
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6 * All rights reserved.
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8 * Redistribution and use in source and binary forms, with or without
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9 * modification, are permitted provided that the following conditions are met:
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11 * - Redistributions of source code must retain the above copyright notice,
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12 * this list of conditions and the disclaimer below.
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14 * Atmel's name may not be used to endorse or promote products derived from
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15 * this software without specific prior written permission.
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17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 * ----------------------------------------------------------------------------
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30 /** \addtogroup dacc_module Working with DACC
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31 * \ingroup peripherals_module
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32 * The DACC driver provides the interface to configure and use the DACC peripheral.\n
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34 * The DACC(Digital-to-Analog Converter Controller) converts digital code to analog output.
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35 * The data to be converted are sent in a common register for all channels. It offers up to 2
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36 * analog outputs.The output voltage ranges from (1/6)ADVREF to (5/6)ADVREF.
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38 * To Enable a DACC conversion,the user has to follow these few steps:
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40 * <li> Select an appropriate reference voltage on ADVREF </li>
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41 * <li> Configure the DACC according to its requirements and special needs,which could be
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42 broken down into several parts:
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43 * -# Enable DACC in free running mode by clearing TRGEN in DACC_MR;
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44 * -# Configure Startup Time and Refresh Period through setting STARTUP and REFRESH fields
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45 * in DACC_MR; The refresh mechanism is used to protect the output analog value from
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47 * -# Enable channels and write digital code to DACC_CDR,in free running mode, the conversion
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48 * is started right after at least one channel is enabled and data is written .
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52 * For more accurate information, please look at the DACC section of the
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64 * Implementation of Digital-to-Analog Converter Controller (DACC).
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67 /*----------------------------------------------------------------------------
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69 *----------------------------------------------------------------------------*/
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76 /*----------------------------------------------------------------------------
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77 * Exported functions
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78 *----------------------------------------------------------------------------*/
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81 * \brief Initialize the DACC controller
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82 * \param pDACC Pointer to an DACC instance.
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83 * \param idDACC identifier of DAC peripheral
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84 * \param trgEn trigger mode, free running mode or external Hardware trigger
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85 * \param word transfer size,word or half word
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86 * \param trgSel hardware trigger selection
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87 * \param sleepMode sleep mode selection
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88 * \param mck value of MCK in Hz
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89 * \param refresh refresh period
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90 * \param user_sel user channel selection ,0 or 1
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91 * \param tag_mode tag for channel number
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92 * \param startup value of the start up time (in DACCClock) (see datasheet)
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94 extern void DACC_Initialize( Dacc* pDACC,
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101 uint8_t refresh, /* refresh period */
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102 uint8_t user_sel, /* user channel selection */
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103 uint32_t tag_mode, /* using tag for channel number */
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110 /* Enable peripheral clock*/
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111 PMC->PMC_PCER0 = 1 << idDACC;
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113 /* Reset the controller */
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114 DACC_SoftReset(pDACC);
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116 /* Write to the MR register */
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117 DACC_CfgModeReg( pDACC,
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118 ( trgEn & DACC_MR_TRGEN)
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119 | DACC_MR_TRGSEL(trgSel)
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120 | ( word & DACC_MR_WORD)
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121 | ( sleepMode & DACC_MR_SLEEP)
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122 | DACC_MR_REFRESH(refresh)
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123 | ( user_sel & DACC_MR_USER_SEL_Msk)
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124 | ( tag_mode & DACC_MR_TAG)
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125 | ( startup & DACC_MR_STARTUP_Msk));
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130 * Set the Conversion Data
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131 * \param pDACC Pointer to an Dacc instance.
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132 * \param data date to be converted.
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134 extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData )
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136 uint32_t dwMR = pDACC->DACC_MR ;
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138 if ( dwMR & DACC_MR_WORD )
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140 pDACC->DACC_CDR = dwData ;
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144 pDACC->DACC_CDR = (dwData&0xFFFF) ;
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150 * \brief Write converted data through PDC channel
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151 * \param pDACC the pointer of DACC peripheral
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152 * \param pBuffer the destination buffer
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153 * \param size the size of the buffer
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155 extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t *pwBuffer, uint32_t dwSize )
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158 /* Check if the first PDC bank is free*/
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159 if ( (pDACC->DACC_TCR == 0) && (pDACC->DACC_TNCR == 0) )
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161 pDACC->DACC_TPR = (uint32_t)pwBuffer ;
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162 pDACC->DACC_TCR = dwSize ;
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163 pDACC->DACC_PTCR = DACC_PTCR_TXTEN ;
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167 /* Check if the second PDC bank is free*/
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170 if (pDACC->DACC_TNCR == 0)
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172 pDACC->DACC_TNPR = (uint32_t)pwBuffer ;
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173 pDACC->DACC_TNCR = dwSize ;
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