git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/include/stm32f7xx_hal.h

   1 /**\r
   2   ******************************************************************************\r
   3   * @file    stm32f7xx_hal.h\r
   4   * @author  MCD Application Team\r
   5   * @version V1.0.0RC1\r
   6   * @date    24-March-2015\r
   7   * @brief   This file contains all the functions prototypes for the HAL \r
   8   *          module driver.\r
   9   ******************************************************************************\r
  10   * @attention\r
  11   *\r
  12   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>\r
  13   *\r
  14   * Redistribution and use in source and binary forms, with or without modification,\r
  15   * are permitted provided that the following conditions are met:\r
  16   *   1. Redistributions of source code must retain the above copyright notice,\r
  17   *      this list of conditions and the following disclaimer.\r
  18   *   2. Redistributions in binary form must reproduce the above copyright notice,\r
  19   *      this list of conditions and the following disclaimer in the documentation\r
  20   *      and/or other materials provided with the distribution.\r
  21   *   3. Neither the name of STMicroelectronics nor the names of its contributors\r
  22   *      may be used to endorse or promote products derived from this software\r
  23   *      without specific prior written permission.\r
  24   *\r
  25   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
  26   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
  27   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
  28   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
  29   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
  30   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
  31   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
  32   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
  33   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
  34   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
  35   *\r
  36   ******************************************************************************\r
  37   */ \r
  38 \r
  39 /* Define to prevent recursive inclusion -------------------------------------*/\r
  40 #ifndef __STM32F7xx_HAL_H\r
  41 #define __STM32F7xx_HAL_H\r
  42 \r
  43 #ifdef __cplusplus\r
  44  extern "C" {\r
  45 #endif\r
  46 \r
  47 /* Includes ------------------------------------------------------------------*/\r
  48 #include "stm32f7xx_hal_conf.h"\r
  49 \r
  50 /** @addtogroup STM32F7xx_HAL_Driver\r
  51   * @{\r
  52   */\r
  53 \r
  54 /** @addtogroup HAL\r
  55   * @{\r
  56   */ \r
  57 \r
  58 /* Exported types ------------------------------------------------------------*/\r
  59 /* Exported constants --------------------------------------------------------*/\r
  60 /* Exported macro ------------------------------------------------------------*/\r
  61 \r
  62 /** @brief  Freeze/Unfreeze Peripherals in Debug mode \r
  63   */\r
  64 #define __HAL_DBGMCU_FREEZE_TIM2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))\r
  65 #define __HAL_DBGMCU_FREEZE_TIM3()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))\r
  66 #define __HAL_DBGMCU_FREEZE_TIM4()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))\r
  67 #define __HAL_DBGMCU_FREEZE_TIM5()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))\r
  68 #define __HAL_DBGMCU_FREEZE_TIM6()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))\r
  69 #define __HAL_DBGMCU_FREEZE_TIM7()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))\r
  70 #define __HAL_DBGMCU_FREEZE_TIM12()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))\r
  71 #define __HAL_DBGMCU_FREEZE_TIM13()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))\r
  72 #define __HAL_DBGMCU_FREEZE_TIM14()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))\r
  73 #define __HAL_DBGMCU_FREEZE_LPTIM1()         (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))\r
  74 #define __HAL_DBGMCU_FREEZE_RTC()            (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))\r
  75 #define __HAL_DBGMCU_FREEZE_WWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))\r
  76 #define __HAL_DBGMCU_FREEZE_IWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))\r
  77 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))\r
  78 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))\r
  79 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))\r
  80 #define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))\r
  81 #define __HAL_DBGMCU_FREEZE_CAN1()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))\r
  82 #define __HAL_DBGMCU_FREEZE_CAN2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))\r
  83 #define __HAL_DBGMCU_FREEZE_TIM1()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))\r
  84 #define __HAL_DBGMCU_FREEZE_TIM8()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))\r
  85 #define __HAL_DBGMCU_FREEZE_TIM9()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))\r
  86 #define __HAL_DBGMCU_FREEZE_TIM10()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))\r
  87 #define __HAL_DBGMCU_FREEZE_TIM11()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))\r
  88 \r
  89 #define __HAL_DBGMCU_UNFREEZE_TIM2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))\r
  90 #define __HAL_DBGMCU_UNFREEZE_TIM3()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))\r
  91 #define __HAL_DBGMCU_UNFREEZE_TIM4()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))\r
  92 #define __HAL_DBGMCU_UNFREEZE_TIM5()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))\r
  93 #define __HAL_DBGMCU_UNFREEZE_TIM6()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))\r
  94 #define __HAL_DBGMCU_UNFREEZE_TIM7()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))\r
  95 #define __HAL_DBGMCU_UNFREEZE_TIM12()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))\r
  96 #define __HAL_DBGMCU_UNFREEZE_TIM13()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))\r
  97 #define __HAL_DBGMCU_UNFREEZE_TIM14()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))\r
  98 #define __HAL_DBGMCU_UNFREEZE_LPTIM1()         (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))\r
  99 #define __HAL_DBGMCU_UNFREEZE_RTC()            (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))\r
 100 #define __HAL_DBGMCU_UNFREEZE_WWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))\r
 101 #define __HAL_DBGMCU_UNFREEZE_IWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))\r
 102 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))\r
 103 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))\r
 104 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))\r
 105 #define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))\r
 106 #define __HAL_DBGMCU_UNFREEZE_CAN1()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))\r
 107 #define __HAL_DBGMCU_UNFREEZE_CAN2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))\r
 108 #define __HAL_DBGMCU_UNFREEZE_TIM1()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))\r
 109 #define __HAL_DBGMCU_UNFREEZE_TIM8()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))\r
 110 #define __HAL_DBGMCU_UNFREEZE_TIM9()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))\r
 111 #define __HAL_DBGMCU_UNFREEZE_TIM10()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))\r
 112 #define __HAL_DBGMCU_UNFREEZE_TIM11()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))\r
 113 \r
 114 \r
 115 /** @brief  FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000\r
 116   */\r
 117 #define __HAL_SYSCFG_REMAPMEMORY_FMC()          (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC))\r
 118                                        \r
 119 \r
 120 /** @brief  FMC/SDRAM  mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000\r
 121   */\r
 122 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\\r
 123                                           SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\\r
 124                                          }while(0);\r
 125 \r
 126 \r
 127 /* Exported functions --------------------------------------------------------*/\r
 128 \r
 129 /* Initialization and de-initialization functions  ******************************/\r
 130 HAL_StatusTypeDef HAL_Init(void);\r
 131 HAL_StatusTypeDef HAL_DeInit(void);\r
 132 void HAL_MspInit(void);\r
 133 void HAL_MspDeInit(void);\r
 134 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);\r
 135 \r
 136 /* Peripheral Control functions  ************************************************/\r
 137 void HAL_IncTick(void);\r
 138 void HAL_Delay(__IO uint32_t Delay);\r
 139 uint32_t HAL_GetTick(void);\r
 140 void HAL_SuspendTick(void);\r
 141 void HAL_ResumeTick(void);\r
 142 uint32_t HAL_GetHalVersion(void);\r
 143 uint32_t HAL_GetREVID(void);\r
 144 uint32_t HAL_GetDEVID(void);\r
 145 void HAL_DBGMCU_EnableDBGSleepMode(void);\r
 146 void HAL_DBGMCU_DisableDBGSleepMode(void);\r
 147 void HAL_DBGMCU_EnableDBGStopMode(void);\r
 148 void HAL_DBGMCU_DisableDBGStopMode(void);\r
 149 void HAL_DBGMCU_EnableDBGStandbyMode(void);\r
 150 void HAL_DBGMCU_DisableDBGStandbyMode(void);\r
 151 void HAL_EnableCompensationCell(void);\r
 152 void HAL_DisableCompensationCell(void);\r
 153 void HAL_EnableFMCMemorySwapping(void);\r
 154 void HAL_DisableFMCMemorySwapping(void);\r
 155 \r
 156 \r
 157 /**\r
 158   * @}\r
 159   */ \r
 160 \r
 161 /**\r
 162   * @}\r
 163   */ \r
 164   \r
 165 #ifdef __cplusplus\r
 166 }\r
 167 #endif\r
 168 \r
 169 #endif /* __STM32F7xx_HAL_H */\r
 170 \r
 171 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r