2 ******************************************************************************
\r
3 * @file stm32f7xx_hal_dac.h
\r
4 * @author MCD Application Team
\r
6 * @date 24-March-2015
\r
7 * @brief Header file of DAC HAL module.
\r
8 ******************************************************************************
\r
11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
\r
13 * Redistribution and use in source and binary forms, with or without modification,
\r
14 * are permitted provided that the following conditions are met:
\r
15 * 1. Redistributions of source code must retain the above copyright notice,
\r
16 * this list of conditions and the following disclaimer.
\r
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
\r
18 * this list of conditions and the following disclaimer in the documentation
\r
19 * and/or other materials provided with the distribution.
\r
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
\r
21 * may be used to endorse or promote products derived from this software
\r
22 * without specific prior written permission.
\r
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
\r
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
\r
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
\r
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
\r
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
\r
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
\r
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
\r
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
\r
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
\r
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\r
35 ******************************************************************************
\r
38 /* Define to prevent recursive inclusion -------------------------------------*/
\r
39 #ifndef __STM32F7xx_HAL_DAC_H
\r
40 #define __STM32F7xx_HAL_DAC_H
\r
46 #if defined(STM32F756xx) || defined(STM32F746xx)
\r
48 /* Includes ------------------------------------------------------------------*/
\r
49 #include "stm32f7xx_hal_def.h"
\r
51 /** @addtogroup STM32F7xx_HAL_Driver
\r
59 /* Exported types ------------------------------------------------------------*/
\r
60 /** @defgroup DAC_Exported_Types DAC Exported Types
\r
65 * @brief HAL State structures definition
\r
69 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
\r
70 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
\r
71 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
\r
72 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
\r
73 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
\r
74 }HAL_DAC_StateTypeDef;
\r
77 * @brief DAC handle Structure definition
\r
81 DAC_TypeDef *Instance; /*!< Register base address */
\r
83 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
\r
85 HAL_LockTypeDef Lock; /*!< DAC locking object */
\r
87 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
\r
89 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
\r
91 __IO uint32_t ErrorCode; /*!< DAC Error code */
\r
96 * @brief DAC Configuration regular Channel structure definition
\r
100 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
\r
101 This parameter can be a value of @ref DAC_trigger_selection */
\r
103 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
\r
104 This parameter can be a value of @ref DAC_output_buffer */
\r
105 }DAC_ChannelConfTypeDef;
\r
110 /* Exported constants --------------------------------------------------------*/
\r
111 /** @defgroup DAC_Exported_Constants DAC Exported Constants
\r
115 /** @defgroup DAC_Error_Code DAC Error Code
\r
118 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
\r
119 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
\r
120 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
\r
121 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
\r
126 /** @defgroup DAC_trigger_selection DAC Trigger Selection
\r
130 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
\r
131 has been loaded, and not by external trigger */
\r
132 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
\r
133 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
\r
134 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
\r
135 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
\r
136 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
\r
137 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
\r
139 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
\r
140 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
\r
145 /** @defgroup DAC_output_buffer DAC Output Buffer
\r
148 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
\r
149 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
\r
154 /** @defgroup DAC_Channel_selection DAC Channel Selection
\r
157 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
\r
158 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
\r
163 /** @defgroup DAC_data_alignment DAC Data Alignment
\r
166 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
\r
167 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
\r
168 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
\r
173 /** @defgroup DAC_flags_definition DAC Flags Definition
\r
176 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
\r
177 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
\r
182 /** @defgroup DAC_IT_definition DAC IT Definition
\r
185 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
\r
186 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
\r
195 /* Exported macro ------------------------------------------------------------*/
\r
196 /** @defgroup DAC_Exported_Macros DAC Exported Macros
\r
200 /** @brief Reset DAC handle state
\r
201 * @param __HANDLE__: specifies the DAC handle.
\r
204 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
\r
206 /** @brief Enable the DAC channel
\r
207 * @param __HANDLE__: specifies the DAC handle.
\r
208 * @param __DAC_CHANNEL__: specifies the DAC channel
\r
211 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \
\r
212 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_CHANNEL__)))
\r
214 /** @brief Disable the DAC channel
\r
215 * @param __HANDLE__: specifies the DAC handle
\r
216 * @param __DAC_CHANNEL__: specifies the DAC channel.
\r
219 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \
\r
220 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_CHANNEL__)))
\r
223 /** @brief Enable the DAC interrupt
\r
224 * @param __HANDLE__: specifies the DAC handle
\r
225 * @param __INTERRUPT__: specifies the DAC interrupt.
\r
228 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
\r
230 /** @brief Disable the DAC interrupt
\r
231 * @param __HANDLE__: specifies the DAC handle
\r
232 * @param __INTERRUPT__: specifies the DAC interrupt.
\r
235 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
\r
237 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
\r
238 * @param __HANDLE__: DAC handle
\r
239 * @param __INTERRUPT__: DAC interrupt source to check
\r
240 * This parameter can be any combination of the following values:
\r
241 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
\r
242 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
\r
243 * @retval State of interruption (SET or RESET)
\r
245 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
\r
247 /** @brief Get the selected DAC's flag status.
\r
248 * @param __HANDLE__: specifies the DAC handle.
\r
249 * @param __FLAG__: specifies the flag to clear.
\r
250 * This parameter can be any combination of the following values:
\r
251 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
\r
252 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
\r
255 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
\r
257 /** @brief Clear the DAC's flag.
\r
258 * @param __HANDLE__: specifies the DAC handle.
\r
259 * @param __FLAG__: specifies the flag to clear.
\r
260 * This parameter can be any combination of the following values:
\r
261 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
\r
262 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
\r
265 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
\r
270 /* Include DAC HAL Extension module */
\r
271 #include "stm32f7xx_hal_dac_ex.h"
\r
273 /* Exported functions --------------------------------------------------------*/
\r
274 /** @addtogroup DAC_Exported_Functions
\r
278 /** @addtogroup DAC_Exported_Functions_Group1
\r
281 /* Initialization/de-initialization functions *********************************/
\r
282 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
\r
283 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
\r
284 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
\r
285 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
\r
290 /** @addtogroup DAC_Exported_Functions_Group2
\r
293 /* I/O operation functions ****************************************************/
\r
294 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
\r
295 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
\r
296 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
\r
297 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
\r
298 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
\r
303 /** @addtogroup DAC_Exported_Functions_Group3
\r
306 /* Peripheral Control functions ***********************************************/
\r
307 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
\r
308 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
\r
313 /** @addtogroup DAC_Exported_Functions_Group4
\r
316 /* Peripheral State functions *************************************************/
\r
317 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
\r
318 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
\r
319 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
\r
321 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
\r
322 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
\r
323 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
\r
324 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
\r
332 /* Private types -------------------------------------------------------------*/
\r
333 /* Private variables ---------------------------------------------------------*/
\r
334 /* Private constants ---------------------------------------------------------*/
\r
335 /** @defgroup DAC_Private_Constants DAC Private Constants
\r
343 /* Private macros ------------------------------------------------------------*/
\r
344 /** @defgroup DAC_Private_Macros DAC Private Macros
\r
347 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
\r
348 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
\r
349 ((ALIGN) == DAC_ALIGN_12B_L) || \
\r
350 ((ALIGN) == DAC_ALIGN_8B_R))
\r
351 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
\r
352 ((CHANNEL) == DAC_CHANNEL_2))
\r
353 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
\r
354 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
\r
356 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
\r
357 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
\r
358 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
\r
359 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
\r
360 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
\r
361 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
\r
362 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
\r
363 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
\r
364 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
\r
366 /** @brief Set DHR12R1 alignment
\r
367 * @param __ALIGNMENT__: specifies the DAC alignment
\r
370 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
\r
372 /** @brief Set DHR12R2 alignment
\r
373 * @param __ALIGNMENT__: specifies the DAC alignment
\r
376 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
\r
378 /** @brief Set DHR12RD alignment
\r
379 * @param __ALIGNMENT__: specifies the DAC alignment
\r
382 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
\r
388 /* Private functions ---------------------------------------------------------*/
\r
389 /** @defgroup DAC_Private_Functions DAC Private Functions
\r
395 #endif /* STM32F756xx || STM32F746xx */
\r
409 #endif /*__STM32F7xx_HAL_DAC_H */
\r
411 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
\r