git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/include/stm32f7xx_hal_pcd.h

   1 /**\r
   2   ******************************************************************************\r
   3   * @file    stm32f7xx_hal_pcd.h\r
   4   * @author  MCD Application Team\r
   5   * @version V1.0.0RC1\r
   6   * @date    24-March-2015\r
   7   * @brief   Header file of PCD HAL module.\r
   8   ******************************************************************************\r
   9   * @attention\r
  10   *\r
  11   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>\r
  12   *\r
  13   * Redistribution and use in source and binary forms, with or without modification,\r
  14   * are permitted provided that the following conditions are met:\r
  15   *   1. Redistributions of source code must retain the above copyright notice,\r
  16   *      this list of conditions and the following disclaimer.\r
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,\r
  18   *      this list of conditions and the following disclaimer in the documentation\r
  19   *      and/or other materials provided with the distribution.\r
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors\r
  21   *      may be used to endorse or promote products derived from this software\r
  22   *      without specific prior written permission.\r
  23   *\r
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
  34   *\r
  35   ******************************************************************************\r
  36   */ \r
  37 \r
  38 /* Define to prevent recursive inclusion -------------------------------------*/\r
  39 #ifndef __STM32F7xx_HAL_PCD_H\r
  40 #define __STM32F7xx_HAL_PCD_H\r
  41 \r
  42 #ifdef __cplusplus\r
  43  extern "C" {\r
  44 #endif\r
  45 \r
  46 /* Includes ------------------------------------------------------------------*/\r
  47 #include "stm32f7xx_ll_usb.h"\r
  48    \r
  49 /** @addtogroup STM32F7xx_HAL_Driver\r
  50   * @{\r
  51   */\r
  52 \r
  53 /** @addtogroup PCD\r
  54   * @{\r
  55   */ \r
  56 \r
  57 /* Exported types ------------------------------------------------------------*/ \r
  58 /** @defgroup PCD_Exported_Types PCD Exported Types\r
  59   * @{\r
  60   */\r
  61    \r
  62 /**\r
  63   * @brief  PCD State structure definition\r
  64   */ \r
  65 typedef enum \r
  66 {\r
  67   HAL_PCD_STATE_RESET   = 0x00,\r
  68   HAL_PCD_STATE_READY   = 0x01,\r
  69   HAL_PCD_STATE_ERROR   = 0x02,\r
  70   HAL_PCD_STATE_BUSY    = 0x03,\r
  71   HAL_PCD_STATE_TIMEOUT = 0x04\r
  72 } PCD_StateTypeDef;\r
  73 \r
  74 /* Device LPM suspend state */\r
  75 typedef enum  \r
  76 {\r
  77   LPM_L0 = 0x00, /* on */\r
  78   LPM_L1 = 0x01, /* LPM L1 sleep */\r
  79   LPM_L2 = 0x02, /* suspend */\r
  80   LPM_L3 = 0x03, /* off */\r
  81 }PCD_LPM_StateTypeDef;\r
  82 \r
  83 typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;\r
  84 typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;\r
  85 typedef USB_OTG_EPTypeDef      PCD_EPTypeDef ;                          \r
  86 \r
  87 /** \r
  88   * @brief  PCD Handle Structure definition  \r
  89   */ \r
  90 typedef struct\r
  91 {\r
  92   PCD_TypeDef             *Instance;   /*!< Register base address              */ \r
  93   PCD_InitTypeDef         Init;       /*!< PCD required parameters            */\r
  94   PCD_EPTypeDef           IN_ep[15];  /*!< IN endpoint parameters             */\r
  95   PCD_EPTypeDef           OUT_ep[15]; /*!< OUT endpoint parameters            */ \r
  96   HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */\r
  97   __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */\r
  98   uint32_t                Setup[12];  /*!< Setup packet buffer                */\r
  99   PCD_LPM_StateTypeDef    LPM_State;    /*!< LPM State                          */\r
 100   uint32_t                BESL;\r
 101   uint32_t                lpm_active;   /*!< Enable or disable the Link Power Management .                                  \r
 102                                         This parameter can be set to ENABLE or DISABLE */\r
 103   void                    *pData;       /*!< Pointer to upper stack Handler */  \r
 104 } PCD_HandleTypeDef;\r
 105 \r
 106 /**\r
 107   * @}\r
 108   */\r
 109     \r
 110 /* Include PCD HAL Extension module */\r
 111 #include "stm32f7xx_hal_pcd_ex.h"\r
 112 \r
 113 /* Exported constants --------------------------------------------------------*/\r
 114 /** @defgroup PCD_Exported_Constants PCD Exported Constants\r
 115   * @{\r
 116   */\r
 117 \r
 118 /** @defgroup PCD_Speed PCD Speed\r
 119   * @{\r
 120   */\r
 121 #define PCD_SPEED_HIGH               0\r
 122 #define PCD_SPEED_HIGH_IN_FULL       1\r
 123 #define PCD_SPEED_FULL               2\r
 124 /**\r
 125   * @}\r
 126   */\r
 127   \r
 128 /** @defgroup PCD_PHY_Module PCD PHY Module\r
 129   * @{\r
 130   */\r
 131 #define PCD_PHY_ULPI                 1\r
 132 #define PCD_PHY_EMBEDDED             2\r
 133 /**\r
 134   * @}\r
 135   */\r
 136 \r
 137 /**\r
 138   * @}\r
 139   */ \r
 140   \r
 141 /* Exported macros -----------------------------------------------------------*/\r
 142 /** @defgroup PCD_Exported_Macros PCD Exported Macros\r
 143  *  @brief macros to handle interrupts and specific clock configurations\r
 144  * @{\r
 145  */\r
 146 #define __HAL_PCD_ENABLE(__HANDLE__)                   USB_EnableGlobalInt ((__HANDLE__)->Instance)\r
 147 #define __HAL_PCD_DISABLE(__HANDLE__)                  USB_DisableGlobalInt ((__HANDLE__)->Instance)\r
 148    \r
 149 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))\r
 150 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))\r
 151 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)\r
 152 \r
 153 \r
 154 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__)             *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \\r
 155                                                        ~(USB_OTG_PCGCCTL_STOPCLK)\r
 156 \r
 157 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__)               *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK\r
 158                                                       \r
 159 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__)            ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)\r
 160                                                          \r
 161 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE      ((uint32_t)0x08) \r
 162 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE     ((uint32_t)0x0C) \r
 163 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE        ((uint32_t)0x10) \r
 164 \r
 165 #define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE      ((uint32_t)0x08) \r
 166 #define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE     ((uint32_t)0x0C) \r
 167 #define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE        ((uint32_t)0x10) \r
 168 \r
 169 #define USB_OTG_HS_WAKEUP_EXTI_LINE              ((uint32_t)0x00100000)  /*!< External interrupt line 20 Connected to the USB HS EXTI Line */\r
 170 #define USB_OTG_FS_WAKEUP_EXTI_LINE              ((uint32_t)0x00040000)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */\r
 171 \r
 172 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE)\r
 173 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)\r
 174 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)\r
 175 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)\r
 176 \r
 177 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\\r
 178                                                           EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE\r
 179                                                       \r
 180 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE()  EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\\r
 181                                                             EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)\r
 182 \r
 183 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()   EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\\r
 184                                                                     EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE;)\\r
 185                                                                     EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\\r
 186                                                                     EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE\r
 187 \r
 188 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT()   (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) \r
 189                                                                                                                     \r
 190 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE\r
 191 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)\r
 192 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)\r
 193 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE\r
 194 \r
 195 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\\r
 196                                                           EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE\r
 197 \r
 198                                                       \r
 199 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE()  EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\\r
 200                                                             EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)\r
 201 \r
 202 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()  EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\\r
 203                                                                    EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\\r
 204                                                                    EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\\r
 205                                                                    EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE \r
 206                                                          \r
 207 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT()  (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)                                                     \r
 208 \r
 209 /* Exported functions --------------------------------------------------------*/\r
 210 /** @addtogroup PCD_Exported_Functions PCD Exported Functions\r
 211   * @{\r
 212   */\r
 213 \r
 214 /* Initialization/de-initialization functions  ********************************/\r
 215 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions\r
 216   * @{\r
 217   */\r
 218 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);\r
 219 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);\r
 220 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);\r
 221 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);\r
 222 /**\r
 223   * @}\r
 224   */\r
 225 \r
 226 /* I/O operation functions  ***************************************************/\r
 227 /* Non-Blocking mode: Interrupt */\r
 228 /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions\r
 229   * @{\r
 230   */\r
 231 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);\r
 232 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);\r
 233 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);\r
 234 \r
 235 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
 236 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
 237 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);\r
 238 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);\r
 239 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);\r
 240 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);\r
 241 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);\r
 242 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
 243 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);\r
 244 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);\r
 245 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);\r
 246 /**\r
 247   * @}\r
 248   */\r
 249 \r
 250 /* Peripheral Control functions  **********************************************/\r
 251 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions\r
 252   * @{\r
 253   */\r
 254 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);\r
 255 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);\r
 256 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);\r
 257 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);\r
 258 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
 259 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);\r
 260 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);\r
 261 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
 262 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
 263 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
 264 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);\r
 265 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);\r
 266 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);\r
 267 /**\r
 268   * @}\r
 269   */\r
 270 \r
 271 /* Peripheral State functions  ************************************************/\r
 272 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions\r
 273   * @{\r
 274   */\r
 275 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);\r
 276 /**\r
 277   * @}\r
 278   */ \r
 279 \r
 280 /**\r
 281   * @}\r
 282   */ \r
 283 \r
 284 /** @defgroup PCD_Instance_definition PCD Instance definition\r
 285   * @{\r
 286   */\r
 287 #define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS) || \\r
 288                                        ((INSTANCE) == USB_OTG_HS))\r
 289 /**\r
 290   * @}\r
 291   */ \r
 292 \r
 293 /**\r
 294   * @}\r
 295   */ \r
 296 \r
 297 /**\r
 298   * @}\r
 299   */ \r
 300 \r
 301 /**\r
 302   * @}\r
 303   */ \r
 304 \r
 305 #ifdef __cplusplus\r
 306 }\r
 307 #endif\r
 308 \r
 309 \r
 310 #endif /* __STM32F7xx_HAL_PCD_H */\r
 311 \r
 312 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r