2 ******************************************************************************
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3 * @file stm32f7xx_hal_sdram.c
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4 * @author MCD Application Team
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6 * @date 24-March-2015
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7 * @brief SDRAM HAL module driver.
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8 * This file provides a generic firmware to drive SDRAM memories mounted
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9 * as external device.
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12 ==============================================================================
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13 ##### How to use this driver #####
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14 ==============================================================================
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16 This driver is a generic layered driver which contains a set of APIs used to
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17 control SDRAM memories. It uses the FMC layer functions to interface
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18 with SDRAM devices.
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19 The following sequence should be followed to configure the FMC to interface
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20 with SDRAM memories:
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22 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
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23 SDRAM_HandleTypeDef hdsram
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25 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
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26 values of the structure member.
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28 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
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29 base register instance for NOR or SDRAM device
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31 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
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32 FMC_SDRAM_TimingTypeDef Timing;
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33 and fill its fields with the allowed values of the structure member.
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35 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
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36 performs the following sequence:
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38 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
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39 (##) Control register configuration using the FMC SDRAM interface function
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41 (##) Timing register configuration using the FMC SDRAM interface function
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42 FMC_SDRAM_Timing_Init()
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43 (##) Program the SDRAM external device by applying its initialization sequence
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44 according to the device plugged in your hardware. This step is mandatory
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45 for accessing the SDRAM device.
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47 (#) At this stage you can perform read/write accesses from/to the memory connected
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48 to the SDRAM Bank. You can perform either polling or DMA transfer using the
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50 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
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51 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
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53 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
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54 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
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55 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
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56 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
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59 (#) You can continuously monitor the SDRAM device HAL state by calling the function
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60 HAL_SDRAM_GetState()
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63 ******************************************************************************
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66 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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68 * Redistribution and use in source and binary forms, with or without modification,
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69 * are permitted provided that the following conditions are met:
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70 * 1. Redistributions of source code must retain the above copyright notice,
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71 * this list of conditions and the following disclaimer.
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72 * 2. Redistributions in binary form must reproduce the above copyright notice,
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73 * this list of conditions and the following disclaimer in the documentation
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74 * and/or other materials provided with the distribution.
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75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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76 * may be used to endorse or promote products derived from this software
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77 * without specific prior written permission.
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79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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90 ******************************************************************************
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93 /* Includes ------------------------------------------------------------------*/
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94 #include "stm32f7xx_hal.h"
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96 /** @addtogroup STM32F7xx_HAL_Driver
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100 /** @defgroup SDRAM SDRAM
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101 * @brief SDRAM driver modules
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104 #ifdef HAL_SDRAM_MODULE_ENABLED
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106 /* Private typedef -----------------------------------------------------------*/
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107 /* Private define ------------------------------------------------------------*/
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108 /* Private macro -------------------------------------------------------------*/
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109 /* Private variables ---------------------------------------------------------*/
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110 /* Private functions ---------------------------------------------------------*/
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111 /* Exported functions --------------------------------------------------------*/
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112 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
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116 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
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117 * @brief Initialization and Configuration functions
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120 ==============================================================================
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121 ##### SDRAM Initialization and de_initialization functions #####
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122 ==============================================================================
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124 This section provides functions allowing to initialize/de-initialize
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132 * @brief Performs the SDRAM device initialization sequence.
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133 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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134 * the configuration information for SDRAM module.
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135 * @param Timing: Pointer to SDRAM control timing structure
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136 * @retval HAL status
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138 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
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140 /* Check the SDRAM handle parameter */
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146 if(hsdram->State == HAL_SDRAM_STATE_RESET)
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148 /* Initialize the low level hardware (MSP) */
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149 HAL_SDRAM_MspInit(hsdram);
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152 /* Initialize the SDRAM controller state */
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153 hsdram->State = HAL_SDRAM_STATE_BUSY;
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155 /* Initialize SDRAM control Interface */
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156 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
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158 /* Initialize SDRAM timing Interface */
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159 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
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161 /* Update the SDRAM controller state */
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162 hsdram->State = HAL_SDRAM_STATE_READY;
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168 * @brief Perform the SDRAM device initialization sequence.
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169 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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170 * the configuration information for SDRAM module.
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171 * @retval HAL status
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173 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
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175 /* Initialize the low level hardware (MSP) */
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176 HAL_SDRAM_MspDeInit(hsdram);
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178 /* Configure the SDRAM registers with their reset values */
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179 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
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181 /* Reset the SDRAM controller state */
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182 hsdram->State = HAL_SDRAM_STATE_RESET;
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185 __HAL_UNLOCK(hsdram);
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191 * @brief SDRAM MSP Init.
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192 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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193 * the configuration information for SDRAM module.
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196 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
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198 /* NOTE: This function Should not be modified, when the callback is needed,
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199 the HAL_SDRAM_MspInit could be implemented in the user file
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204 * @brief SDRAM MSP DeInit.
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205 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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206 * the configuration information for SDRAM module.
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209 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
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211 /* NOTE: This function Should not be modified, when the callback is needed,
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212 the HAL_SDRAM_MspDeInit could be implemented in the user file
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217 * @brief This function handles SDRAM refresh error interrupt request.
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218 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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219 * the configuration information for SDRAM module.
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220 * @retval HAL status
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222 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
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224 /* Check SDRAM interrupt Rising edge flag */
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225 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
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227 /* SDRAM refresh error interrupt callback */
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228 HAL_SDRAM_RefreshErrorCallback(hsdram);
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230 /* Clear SDRAM refresh error interrupt pending bit */
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231 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
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236 * @brief SDRAM Refresh error callback.
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237 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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238 * the configuration information for SDRAM module.
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241 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
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243 /* NOTE: This function Should not be modified, when the callback is needed,
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244 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
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249 * @brief DMA transfer complete callback.
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250 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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251 * the configuration information for the specified DMA module.
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254 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
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256 /* NOTE: This function Should not be modified, when the callback is needed,
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257 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
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262 * @brief DMA transfer complete error callback.
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263 * @param hdma: DMA handle
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266 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
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268 /* NOTE: This function Should not be modified, when the callback is needed,
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269 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
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277 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
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278 * @brief Input Output and memory control functions
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281 ==============================================================================
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282 ##### SDRAM Input and Output functions #####
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283 ==============================================================================
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285 This section provides functions allowing to use and control the SDRAM memory
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292 * @brief Reads 8-bit data buffer from the SDRAM memory.
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293 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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294 * the configuration information for SDRAM module.
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295 * @param pAddress: Pointer to read start address
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296 * @param pDstBuffer: Pointer to destination buffer
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297 * @param BufferSize: Size of the buffer to read from memory
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298 * @retval HAL status
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300 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
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302 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
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304 /* Process Locked */
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305 __HAL_LOCK(hsdram);
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307 /* Check the SDRAM controller state */
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308 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
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312 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
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317 /* Read data from source */
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318 for(; BufferSize != 0; BufferSize--)
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320 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
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325 /* Process Unlocked */
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326 __HAL_UNLOCK(hsdram);
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333 * @brief Writes 8-bit data buffer to SDRAM memory.
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334 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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335 * the configuration information for SDRAM module.
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336 * @param pAddress: Pointer to write start address
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337 * @param pSrcBuffer: Pointer to source buffer to write
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338 * @param BufferSize: Size of the buffer to write to memory
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339 * @retval HAL status
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341 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
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343 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
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346 /* Process Locked */
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347 __HAL_LOCK(hsdram);
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349 /* Check the SDRAM controller state */
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350 tmp = hsdram->State;
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352 if(tmp == HAL_SDRAM_STATE_BUSY)
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356 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
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361 /* Write data to memory */
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362 for(; BufferSize != 0; BufferSize--)
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364 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
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369 /* Process Unlocked */
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370 __HAL_UNLOCK(hsdram);
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377 * @brief Reads 16-bit data buffer from the SDRAM memory.
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378 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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379 * the configuration information for SDRAM module.
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380 * @param pAddress: Pointer to read start address
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381 * @param pDstBuffer: Pointer to destination buffer
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382 * @param BufferSize: Size of the buffer to read from memory
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383 * @retval HAL status
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385 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
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387 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
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389 /* Process Locked */
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390 __HAL_LOCK(hsdram);
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392 /* Check the SDRAM controller state */
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393 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
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397 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
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402 /* Read data from source */
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403 for(; BufferSize != 0; BufferSize--)
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405 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
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410 /* Process Unlocked */
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411 __HAL_UNLOCK(hsdram);
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417 * @brief Writes 16-bit data buffer to SDRAM memory.
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418 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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419 * the configuration information for SDRAM module.
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420 * @param pAddress: Pointer to write start address
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421 * @param pSrcBuffer: Pointer to source buffer to write
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422 * @param BufferSize: Size of the buffer to write to memory
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423 * @retval HAL status
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425 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
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427 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
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430 /* Process Locked */
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431 __HAL_LOCK(hsdram);
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433 /* Check the SDRAM controller state */
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434 tmp = hsdram->State;
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436 if(tmp == HAL_SDRAM_STATE_BUSY)
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440 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
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445 /* Write data to memory */
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446 for(; BufferSize != 0; BufferSize--)
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448 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
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453 /* Process Unlocked */
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454 __HAL_UNLOCK(hsdram);
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460 * @brief Reads 32-bit data buffer from the SDRAM memory.
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461 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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462 * the configuration information for SDRAM module.
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463 * @param pAddress: Pointer to read start address
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464 * @param pDstBuffer: Pointer to destination buffer
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465 * @param BufferSize: Size of the buffer to read from memory
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466 * @retval HAL status
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468 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
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470 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
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472 /* Process Locked */
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473 __HAL_LOCK(hsdram);
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475 /* Check the SDRAM controller state */
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476 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
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480 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
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485 /* Read data from source */
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486 for(; BufferSize != 0; BufferSize--)
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488 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
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493 /* Process Unlocked */
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494 __HAL_UNLOCK(hsdram);
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500 * @brief Writes 32-bit data buffer to SDRAM memory.
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501 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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502 * the configuration information for SDRAM module.
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503 * @param pAddress: Pointer to write start address
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504 * @param pSrcBuffer: Pointer to source buffer to write
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505 * @param BufferSize: Size of the buffer to write to memory
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506 * @retval HAL status
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508 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
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510 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
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513 /* Process Locked */
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514 __HAL_LOCK(hsdram);
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516 /* Check the SDRAM controller state */
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517 tmp = hsdram->State;
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519 if(tmp == HAL_SDRAM_STATE_BUSY)
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523 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
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528 /* Write data to memory */
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529 for(; BufferSize != 0; BufferSize--)
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531 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
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536 /* Process Unlocked */
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537 __HAL_UNLOCK(hsdram);
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543 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
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544 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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545 * the configuration information for SDRAM module.
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546 * @param pAddress: Pointer to read start address
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547 * @param pDstBuffer: Pointer to destination buffer
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548 * @param BufferSize: Size of the buffer to read from memory
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549 * @retval HAL status
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551 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
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555 /* Process Locked */
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556 __HAL_LOCK(hsdram);
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558 /* Check the SDRAM controller state */
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559 tmp = hsdram->State;
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561 if(tmp == HAL_SDRAM_STATE_BUSY)
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565 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
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570 /* Configure DMA user callbacks */
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571 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
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572 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
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574 /* Enable the DMA Stream */
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575 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
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577 /* Process Unlocked */
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578 __HAL_UNLOCK(hsdram);
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584 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
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585 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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586 * the configuration information for SDRAM module.
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587 * @param pAddress: Pointer to write start address
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588 * @param pSrcBuffer: Pointer to source buffer to write
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589 * @param BufferSize: Size of the buffer to write to memory
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590 * @retval HAL status
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592 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
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596 /* Process Locked */
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597 __HAL_LOCK(hsdram);
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599 /* Check the SDRAM controller state */
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600 tmp = hsdram->State;
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602 if(tmp == HAL_SDRAM_STATE_BUSY)
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606 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
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611 /* Configure DMA user callbacks */
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612 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
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613 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
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615 /* Enable the DMA Stream */
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616 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
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618 /* Process Unlocked */
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619 __HAL_UNLOCK(hsdram);
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628 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
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629 * @brief management functions
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632 ==============================================================================
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633 ##### SDRAM Control functions #####
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634 ==============================================================================
\r
636 This subsection provides a set of functions allowing to control dynamically
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637 the SDRAM interface.
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644 * @brief Enables dynamically SDRAM write protection.
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645 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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646 * the configuration information for SDRAM module.
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647 * @retval HAL status
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649 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
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651 /* Check the SDRAM controller state */
\r
652 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
\r
657 /* Update the SDRAM state */
\r
658 hsdram->State = HAL_SDRAM_STATE_BUSY;
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660 /* Enable write protection */
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661 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
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663 /* Update the SDRAM state */
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664 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
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670 * @brief Disables dynamically SDRAM write protection.
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671 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
\r
672 * the configuration information for SDRAM module.
\r
673 * @retval HAL status
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675 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
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677 /* Check the SDRAM controller state */
\r
678 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
\r
683 /* Update the SDRAM state */
\r
684 hsdram->State = HAL_SDRAM_STATE_BUSY;
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686 /* Disable write protection */
\r
687 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
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689 /* Update the SDRAM state */
\r
690 hsdram->State = HAL_SDRAM_STATE_READY;
\r
696 * @brief Sends Command to the SDRAM bank.
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697 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
\r
698 * the configuration information for SDRAM module.
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699 * @param Command: SDRAM command structure
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700 * @param Timeout: Timeout duration
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701 * @retval HAL status
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703 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
\r
705 /* Check the SDRAM controller state */
\r
706 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
\r
711 /* Update the SDRAM state */
\r
712 hsdram->State = HAL_SDRAM_STATE_BUSY;
\r
714 /* Send SDRAM command */
\r
715 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
\r
717 /* Update the SDRAM controller state state */
\r
718 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
\r
720 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
\r
724 hsdram->State = HAL_SDRAM_STATE_READY;
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731 * @brief Programs the SDRAM Memory Refresh rate.
\r
732 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
\r
733 * the configuration information for SDRAM module.
\r
734 * @param RefreshRate: The SDRAM refresh rate value
\r
735 * @retval HAL status
\r
737 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
\r
739 /* Check the SDRAM controller state */
\r
740 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
\r
745 /* Update the SDRAM state */
\r
746 hsdram->State = HAL_SDRAM_STATE_BUSY;
\r
748 /* Program the refresh rate */
\r
749 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
\r
751 /* Update the SDRAM state */
\r
752 hsdram->State = HAL_SDRAM_STATE_READY;
\r
758 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
\r
759 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
\r
760 * the configuration information for SDRAM module.
\r
761 * @param AutoRefreshNumber: The SDRAM auto Refresh number
\r
762 * @retval HAL status
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764 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
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766 /* Check the SDRAM controller state */
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767 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
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772 /* Update the SDRAM state */
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773 hsdram->State = HAL_SDRAM_STATE_BUSY;
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775 /* Set the Auto-Refresh number */
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776 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
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778 /* Update the SDRAM state */
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779 hsdram->State = HAL_SDRAM_STATE_READY;
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785 * @brief Returns the SDRAM memory current mode.
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786 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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787 * the configuration information for SDRAM module.
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788 * @retval The SDRAM memory mode.
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790 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
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792 /* Return the SDRAM memory current mode */
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793 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
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800 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
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801 * @brief Peripheral State functions
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804 ==============================================================================
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805 ##### SDRAM State functions #####
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806 ==============================================================================
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808 This subsection permits to get in run-time the status of the SDRAM controller
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816 * @brief Returns the SDRAM state.
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817 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
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818 * the configuration information for SDRAM module.
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819 * @retval HAL state
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821 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
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823 return hsdram->State;
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833 #endif /* HAL_SDRAM_MODULE_ENABLED */
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842 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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