2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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70 BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.
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72 ***Note*** This example uses queues to send each character into an interrupt
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73 service routine and out of an interrupt service routine individually. This
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74 is done to demonstrate queues being used in an interrupt, and to deliberately
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75 load the system to test the FreeRTOS port. It is *NOT* meant to be an
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76 example of an efficient implementation. An efficient implementation should
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77 use FIFOs or DMA if available, and only use FreeRTOS API functions when
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78 enough has been received to warrant a task being unblocked to process the
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 #include "comtest2.h"
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88 /* Library includes. */
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89 #include "mb9bf506n.h"
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90 #include "system_mb9bf50x.h"
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92 /* Demo application includes. */
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94 /*-----------------------------------------------------------*/
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96 /* Register bit definitions. */
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97 #define serRX_INT_ENABLE 0x10
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98 #define serTX_INT_ENABLE 0x08
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99 #define serRX_ENABLE 0x02
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100 #define serTX_ENABLE 0x01
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101 #define serORE_ERROR_BIT 0x08
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102 #define serFRE_ERROR_BIT 0x10
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103 #define serPE_ERROR_BIT 0x20
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104 #define serRX_INT 0x04
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105 #define serTX_INT 0x02
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107 /* Misc defines. */
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108 #define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
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109 #define serNO_BLOCK ( ( portTickType ) 0 )
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111 /*-----------------------------------------------------------*/
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113 /* The queue used to hold received characters. */
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114 static xQueueHandle xRxedChars;
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115 static xQueueHandle xCharsForTx;
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117 /*-----------------------------------------------------------*/
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120 * See the serial2.h header file.
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122 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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124 /* Create the queues used to hold Rx/Tx characters. */
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125 xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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126 xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
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128 /* If the queues were created correctly then setup the serial port
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130 if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )
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132 /* Ensure interrupts don't fire during the init process. Interrupts
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133 will be enabled automatically when the first task start running. */
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134 portDISABLE_INTERRUPTS();
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136 /* Configure P21 and P22 for use by the UART. */
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137 FM3_GPIO->PFR2 |= ( 1 << 0x01 ) | ( 1 << 0x02 );
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139 /* SIN0_0 and SOT0_0. */
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140 FM3_GPIO->EPFR07 |= ( 1 << 6 );
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143 FM3_MFS0_UART->SCR = 0x80;
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145 /* Enable output in mode 0. */
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146 FM3_MFS0_UART->SMR = 0x01;
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148 /* Clear all errors that may already be present. */
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149 FM3_MFS0_UART->SSR = 0x00;
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150 FM3_MFS0_UART->ESCR = 0x00;
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152 FM3_MFS0_UART->BGR = ( configCPU_CLOCK_HZ / 2UL ) / ( ulWantedBaud - 1UL );
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154 /* Enable Rx, Tx, and the Rx interrupt. */
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155 FM3_MFS0_UART->SCR |= ( serRX_ENABLE | serTX_ENABLE | serRX_INT_ENABLE );
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157 /* Configure the NVIC for UART interrupts. */
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158 NVIC_ClearPendingIRQ( MFS0RX_IRQn );
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159 NVIC_EnableIRQ( MFS0RX_IRQn );
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161 /* The priority *MUST* be at or below
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162 configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY as FreeRTOS API functions
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163 are called in the interrupt handler. */
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164 NVIC_SetPriority( MFS0RX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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166 /* Do the same for the Tx interrupts. */
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167 NVIC_ClearPendingIRQ( MFS0TX_IRQn );
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168 NVIC_EnableIRQ( MFS0TX_IRQn );
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170 /* The priority *MUST* be at or below
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171 configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY as FreeRTOS API functions
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172 are called in the interrupt handler. */
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173 NVIC_SetPriority( MFS0TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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176 /* This demo file only supports a single port but we have to return
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177 something to comply with the standard demo header file. */
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178 return ( xComPortHandle ) 0;
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180 /*-----------------------------------------------------------*/
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182 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )
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184 /* The port handle is not required as this driver only supports one port. */
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187 /* Get the next character from the buffer. Return false if no characters
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188 are available, or arrive before xBlockTime expires. */
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189 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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198 /*-----------------------------------------------------------*/
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200 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )
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202 signed char *pxNext;
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204 /* A couple of parameters that this port does not use. */
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205 ( void ) usStringLength;
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208 /* NOTE: This implementation does not handle the queue being full as no
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209 block time is used! */
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211 /* The port handle is not required as this driver only supports one UART. */
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214 /* Send each character in the string, one at a time. */
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215 pxNext = ( signed char * ) pcString;
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218 xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
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222 /*-----------------------------------------------------------*/
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224 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )
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226 signed portBASE_TYPE xReturn;
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228 if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )
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232 /* Enable the UART Tx interrupt. */
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233 FM3_MFS0_UART->SCR |= serTX_INT_ENABLE;
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242 /*-----------------------------------------------------------*/
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244 void vSerialClose( xComPortHandle xPort )
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246 /* Not supported as not required by the demo application. */
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248 /*-----------------------------------------------------------*/
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250 void MFS0RX_IRQHandler( void )
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252 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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255 if( ( FM3_MFS0_UART->SSR & ( serORE_ERROR_BIT | serFRE_ERROR_BIT | serPE_ERROR_BIT ) ) != 0 )
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257 /* A PE, ORE or FRE error occurred. Clear it. */
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258 FM3_MFS0_UART->SSR |= ( 1 << 7 );
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259 cChar = FM3_MFS0_UART->RDR;
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261 else if( FM3_MFS0_UART->SSR & serRX_INT )
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263 /* A character has been received on the USART, send it to the Rx
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265 cChar = FM3_MFS0_UART->RDR;
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266 xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );
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269 /* If sending or receiving from a queue has caused a task to unblock, and
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270 the unblocked task has a priority equal to or higher than the currently
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271 running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
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272 will have automatically been set to pdTRUE within the queue send or receive
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273 function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
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274 directly to the higher priority unblocked task. */
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275 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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277 /*-----------------------------------------------------------*/
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279 void MFS0TX_IRQHandler( void )
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281 portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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284 if( FM3_MFS0_UART->SSR & serTX_INT )
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286 /* The interrupt was caused by the TX register becoming empty. Are
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287 there any more characters to transmit? */
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288 if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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290 /* A character was retrieved from the queue so can be sent to the
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292 FM3_MFS0_UART->TDR = cChar;
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296 /* Disable the Tx interrupt. */
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297 FM3_MFS0_UART->SCR &= ~serTX_INT_ENABLE;
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301 /* If sending or receiving from a queue has caused a task to unblock, and
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302 the unblocked task has a priority equal to or higher than the currently
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303 running task (the task this ISR interrupted), then xHigherPriorityTaskWoken
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304 will have automatically been set to pdTRUE within the queue send or receive
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305 function. portEND_SWITCHING_ISR() will then ensure that this ISR returns
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306 directly to the higher priority unblocked task. */
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307 portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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