git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/GCC_Specific/RegTest.c

   1 /*\r
   2  * FreeRTOS Kernel V10.0.0\r
   3  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software. If you wish to use our Amazon\r
  14  * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
  15  *\r
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  18  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  19  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  20  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  22  *\r
  23  * http://www.FreeRTOS.org\r
  24  * http://aws.amazon.com/freertos\r
  25  *\r
  26  * 1 tab == 4 spaces!\r
  27  */\r
  28 \r
  29 /* FreeRTOS includes. */\r
  30 #include "FreeRTOS.h"\r
  31 #include "queue.h"\r
  32 \r
  33 /*\r
  34  * "Reg test" tasks - These fill the registers with known values, then check\r
  35  * that each register maintains its expected value for the lifetime of the\r
  36  * task.  Each task uses a different set of values.  The reg test tasks execute\r
  37  * with a very low priority, so get preempted very frequently.  A register\r
  38  * containing an unexpected value is indicative of an error in the context\r
  39  * switching mechanism.\r
  40  */\r
  41 \r
  42 void vRegTest1Implementation( void *pvParameters );\r
  43 void vRegTest2Implementation( void *pvParameters );\r
  44 void vRegTest3Implementation( void ) __attribute__ ((naked));\r
  45 void vRegTest4Implementation( void ) __attribute__ ((naked));\r
  46 \r
  47 /*\r
  48  * Used as an easy way of deleting a task from inline assembly.\r
  49  */\r
  50 extern void vMainDeleteMe( void ) __attribute__((noinline));\r
  51 \r
  52 /*\r
  53  * Used by the first two reg test tasks and a software timer callback function\r
  54  * to send messages to the check task.  The message just lets the check task\r
  55  * know that the tasks and timer are still functioning correctly.  If a reg test\r
  56  * task detects an error it will delete itself, and in so doing prevent itself\r
  57  * from sending any more 'I'm Alive' messages to the check task.\r
  58  */\r
  59 extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );\r
  60 \r
  61 /* The queue used to send a message to the check task. */\r
  62 extern QueueHandle_t xGlobalScopeCheckQueue;\r
  63 \r
  64 /*-----------------------------------------------------------*/\r
  65 \r
  66 void vRegTest1Implementation( void *pvParameters )\r
  67 {\r
  68 /* This task is created in privileged mode so can access the file scope\r
  69 queue variable.  Take a stack copy of this before the task is set into user\r
  70 mode.  Once this task is in user mode the file scope queue variable will no\r
  71 longer be accessible but the stack copy will. */\r
  72 QueueHandle_t xQueue = xGlobalScopeCheckQueue;\r
  73 \r
  74         /* Now the queue handle has been obtained the task can switch to user\r
  75         mode.  This is just one method of passing a handle into a protected\r
  76         task, the other reg test task uses the task parameter instead. */\r
  77         portSWITCH_TO_USER_MODE();\r
  78 \r
  79         /* First check that the parameter value is as expected. */\r
  80         if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )\r
  81         {\r
  82                 /* Error detected.  Delete the task so it stops communicating with\r
  83                 the check task. */\r
  84                 vMainDeleteMe();\r
  85         }\r
  86 \r
  87         for( ;; )\r
  88         {\r
  89                 /* This task tests the kernel context switch mechanism by reading and\r
  90                 writing directly to registers - which requires the test to be written\r
  91                 in assembly code. */\r
  92                 __asm volatile\r
  93                 (\r
  94                         "               MOV     R4, #104                        \n" /* Set registers to a known value.  R0 to R1 are done in the loop below. */\r
  95                         "               MOV     R5, #105                        \n"\r
  96                         "               MOV     R6, #106                        \n"\r
  97                         "               MOV     R8, #108                        \n"\r
  98                         "               MOV     R9, #109                        \n"\r
  99                         "               MOV     R10, #110                       \n"\r
 100                         "               MOV     R11, #111                       \n"\r
 101                         "reg1loop:                                              \n"\r
 102                         "               MOV     R0, #100                        \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
 103                         "               MOV     R1, #101                        \n"\r
 104                         "               MOV     R2, #102                        \n"\r
 105                         "               MOV R3, #103                    \n"\r
 106                         "               MOV     R12, #112                       \n"\r
 107                         "               SVC #1                                  \n" /* Yield just to increase test coverage. */\r
 108                         "               CMP     R0, #100                        \n" /* Check all the registers still contain their expected values. */\r
 109                         "               BNE     vMainDeleteMe           \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */\r
 110                         "               CMP     R1, #101                        \n"\r
 111                         "               BNE     vMainDeleteMe           \n"\r
 112                         "               CMP     R2, #102                        \n"\r
 113                         "               BNE     vMainDeleteMe           \n"\r
 114                         "               CMP R3, #103                    \n"\r
 115                         "               BNE     vMainDeleteMe           \n"\r
 116                         "               CMP     R4, #104                        \n"\r
 117                         "               BNE     vMainDeleteMe           \n"\r
 118                         "               CMP     R5, #105                        \n"\r
 119                         "               BNE     vMainDeleteMe           \n"\r
 120                         "               CMP     R6, #106                        \n"\r
 121                         "               BNE     vMainDeleteMe           \n"\r
 122                         "               CMP     R8, #108                        \n"\r
 123                         "               BNE     vMainDeleteMe           \n"\r
 124                         "               CMP     R9, #109                        \n"\r
 125                         "               BNE     vMainDeleteMe           \n"\r
 126                         "               CMP     R10, #110                       \n"\r
 127                         "               BNE     vMainDeleteMe           \n"\r
 128                         "               CMP     R11, #111                       \n"\r
 129                         "               BNE     vMainDeleteMe           \n"\r
 130                         "               CMP     R12, #112                       \n"\r
 131                         "               BNE     vMainDeleteMe           \n"\r
 132                         :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
 133                 );\r
 134 \r
 135                 /* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this\r
 136                 task is still functioning. */\r
 137                 vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );\r
 138 \r
 139                 /* Go back to check all the register values again. */\r
 140                 __asm volatile( "               B reg1loop      " );\r
 141         }\r
 142 }\r
 143 /*-----------------------------------------------------------*/\r
 144 \r
 145 void vRegTest2Implementation( void *pvParameters )\r
 146 {\r
 147 /* The queue handle is passed in as the task parameter.  This is one method of\r
 148 passing data into a protected task, the other reg test task uses a different\r
 149 method. */\r
 150 QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;\r
 151 \r
 152         for( ;; )\r
 153         {\r
 154                 /* This task tests the kernel context switch mechanism by reading and\r
 155                 writing directly to registers - which requires the test to be written\r
 156                 in assembly code. */\r
 157                 __asm volatile\r
 158                 (\r
 159                         "               MOV     R4, #4                          \n" /* Set registers to a known value.  R0 to R1 are done in the loop below. */\r
 160                         "               MOV     R5, #5                          \n"\r
 161                         "               MOV     R6, #6                          \n"\r
 162                         "               MOV     R8, #8                          \n" /* Frame pointer is omitted as it must not be changed. */\r
 163                         "               MOV     R9, #9                          \n"\r
 164                         "               MOV     R10, 10                         \n"\r
 165                         "               MOV     R11, #11                        \n"\r
 166                         "reg2loop:                                              \n"\r
 167                         "               MOV     R0, #13                         \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
 168                         "               MOV     R1, #1                          \n"\r
 169                         "               MOV     R2, #2                          \n"\r
 170                         "               MOV R3, #3                              \n"\r
 171                         "               MOV     R12, #12                        \n"\r
 172                         "               CMP     R0, #13                         \n" /* Check all the registers still contain their expected values. */\r
 173                         "               BNE     vMainDeleteMe           \n" /* Value was not as expected, delete the task so it stops communicating with the check task */\r
 174                         "               CMP     R1, #1                          \n"\r
 175                         "               BNE     vMainDeleteMe           \n"\r
 176                         "               CMP     R2, #2                          \n"\r
 177                         "               BNE     vMainDeleteMe           \n"\r
 178                         "               CMP R3, #3                              \n"\r
 179                         "               BNE     vMainDeleteMe           \n"\r
 180                         "               CMP     R4, #4                          \n"\r
 181                         "               BNE     vMainDeleteMe           \n"\r
 182                         "               CMP     R5, #5                          \n"\r
 183                         "               BNE     vMainDeleteMe           \n"\r
 184                         "               CMP     R6, #6                          \n"\r
 185                         "               BNE     vMainDeleteMe           \n"\r
 186                         "               CMP     R8, #8                          \n"\r
 187                         "               BNE     vMainDeleteMe           \n"\r
 188                         "               CMP     R9, #9                          \n"\r
 189                         "               BNE     vMainDeleteMe           \n"\r
 190                         "               CMP     R10, #10                        \n"\r
 191                         "               BNE     vMainDeleteMe           \n"\r
 192                         "               CMP     R11, #11                        \n"\r
 193                         "               BNE     vMainDeleteMe           \n"\r
 194                         "               CMP     R12, #12                        \n"\r
 195                         "               BNE     vMainDeleteMe           \n"\r
 196                         :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
 197                 );\r
 198 \r
 199                 /* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate that this\r
 200                 task is still functioning. */\r
 201                 vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );\r
 202 \r
 203                 /* Go back to check all the register values again. */\r
 204                 __asm volatile( "               B reg2loop      " );\r
 205         }\r
 206 }\r
 207 /*-----------------------------------------------------------*/\r
 208 \r
 209 void vRegTest3Implementation( void )\r
 210 {\r
 211         __asm volatile\r
 212         (\r
 213                 ".extern pulRegTest3LoopCounter \n"\r
 214                 "/* Fill the core registers with known values. */               \n"\r
 215                 "mov    r0, #100                        \n"\r
 216                 "mov    r1, #101                        \n"\r
 217                 "mov    r2, #102                        \n"\r
 218                 "mov    r3, #103                        \n"\r
 219                 "mov    r4, #104                        \n"\r
 220                 "mov    r5, #105                        \n"\r
 221                 "mov    r6, #106                        \n"\r
 222                 "mov    r7, #107                        \n"\r
 223                 "mov    r8, #108                        \n"\r
 224                 "mov    r9, #109                        \n"\r
 225                 "mov    r10, #110                       \n"\r
 226                 "mov    r11, #111                       \n"\r
 227                 "mov    r12, #112                       \n"\r
 228 \r
 229                 "/* Fill the VFP registers with known values. */                \n"\r
 230                 "vmov   d0, r0, r1                      \n"\r
 231                 "vmov   d1, r2, r3                      \n"\r
 232                 "vmov   d2, r4, r5                      \n"\r
 233                 "vmov   d3, r6, r7                      \n"\r
 234                 "vmov   d4, r8, r9                      \n"\r
 235                 "vmov   d5, r10, r11            \n"\r
 236                 "vmov   d6, r0, r1                      \n"\r
 237                 "vmov   d7, r2, r3                      \n"\r
 238                 "vmov   d8, r4, r5                      \n"\r
 239                 "vmov   d9, r6, r7                      \n"\r
 240                 "vmov   d10, r8, r9                     \n"\r
 241                 "vmov   d11, r10, r11           \n"\r
 242                 "vmov   d12, r0, r1                     \n"\r
 243                 "vmov   d13, r2, r3                     \n"\r
 244                 "vmov   d14, r4, r5                     \n"\r
 245                 "vmov   d15, r6, r7                     \n"\r
 246 \r
 247         "reg1_loop:                                             \n"\r
 248                 "/* Check all the VFP registers still contain the values set above.             \n"\r
 249                 "First save registers that are clobbered by the test. */                                \n"\r
 250                 "push { r0-r1 }                         \n"\r
 251 \r
 252                 "vmov   r0, r1, d0                      \n"\r
 253                 "cmp    r0, #100                        \n"\r
 254                 "bne    reg1_error_loopf        \n"\r
 255                 "cmp    r1, #101                        \n"\r
 256                 "bne    reg1_error_loopf        \n"\r
 257                 "vmov   r0, r1, d1                      \n"\r
 258                 "cmp    r0, #102                        \n"\r
 259                 "bne    reg1_error_loopf        \n"\r
 260                 "cmp    r1, #103                        \n"\r
 261                 "bne    reg1_error_loopf        \n"\r
 262                 "vmov   r0, r1, d2                      \n"\r
 263                 "cmp    r0, #104                        \n"\r
 264                 "bne    reg1_error_loopf        \n"\r
 265                 "cmp    r1, #105                        \n"\r
 266                 "bne    reg1_error_loopf        \n"\r
 267                 "vmov   r0, r1, d3                      \n"\r
 268                 "cmp    r0, #106                        \n"\r
 269                 "bne    reg1_error_loopf        \n"\r
 270                 "cmp    r1, #107                        \n"\r
 271                 "bne    reg1_error_loopf        \n"\r
 272                 "vmov   r0, r1, d4                      \n"\r
 273                 "cmp    r0, #108                        \n"\r
 274                 "bne    reg1_error_loopf        \n"\r
 275                 "cmp    r1, #109                        \n"\r
 276                 "bne    reg1_error_loopf        \n"\r
 277                 "vmov   r0, r1, d5                      \n"\r
 278                 "cmp    r0, #110                        \n"\r
 279                 "bne    reg1_error_loopf        \n"\r
 280                 "cmp    r1, #111                        \n"\r
 281                 "bne    reg1_error_loopf        \n"\r
 282                 "vmov   r0, r1, d6                      \n"\r
 283                 "cmp    r0, #100                        \n"\r
 284                 "bne    reg1_error_loopf        \n"\r
 285                 "cmp    r1, #101                        \n"\r
 286                 "bne    reg1_error_loopf        \n"\r
 287                 "vmov   r0, r1, d7                      \n"\r
 288                 "cmp    r0, #102                        \n"\r
 289                 "bne    reg1_error_loopf        \n"\r
 290                 "cmp    r1, #103                        \n"\r
 291                 "bne    reg1_error_loopf        \n"\r
 292                 "vmov   r0, r1, d8                      \n"\r
 293                 "cmp    r0, #104                        \n"\r
 294                 "bne    reg1_error_loopf        \n"\r
 295                 "cmp    r1, #105                        \n"\r
 296                 "bne    reg1_error_loopf        \n"\r
 297                 "vmov   r0, r1, d9                      \n"\r
 298                 "cmp    r0, #106                        \n"\r
 299                 "bne    reg1_error_loopf        \n"\r
 300                 "cmp    r1, #107                        \n"\r
 301                 "bne    reg1_error_loopf        \n"\r
 302                 "vmov   r0, r1, d10                     \n"\r
 303                 "cmp    r0, #108                        \n"\r
 304                 "bne    reg1_error_loopf        \n"\r
 305                 "cmp    r1, #109                        \n"\r
 306                 "bne    reg1_error_loopf        \n"\r
 307                 "vmov   r0, r1, d11                     \n"\r
 308                 "cmp    r0, #110                        \n"\r
 309                 "bne    reg1_error_loopf        \n"\r
 310                 "cmp    r1, #111                        \n"\r
 311                 "bne    reg1_error_loopf        \n"\r
 312                 "vmov   r0, r1, d12                     \n"\r
 313                 "cmp    r0, #100                        \n"\r
 314                 "bne    reg1_error_loopf        \n"\r
 315                 "cmp    r1, #101                        \n"\r
 316                 "bne    reg1_error_loopf        \n"\r
 317                 "vmov   r0, r1, d13                     \n"\r
 318                 "cmp    r0, #102                        \n"\r
 319                 "bne    reg1_error_loopf        \n"\r
 320                 "cmp    r1, #103                        \n"\r
 321                 "bne    reg1_error_loopf        \n"\r
 322                 "vmov   r0, r1, d14                     \n"\r
 323                 "cmp    r0, #104                        \n"\r
 324                 "bne    reg1_error_loopf        \n"\r
 325                 "cmp    r1, #105                        \n"\r
 326                 "bne    reg1_error_loopf        \n"\r
 327                 "vmov   r0, r1, d15                     \n"\r
 328                 "cmp    r0, #106                        \n"\r
 329                 "bne    reg1_error_loopf        \n"\r
 330                 "cmp    r1, #107                        \n"\r
 331                 "bne    reg1_error_loopf        \n"\r
 332 \r
 333                 "/* Restore the registers that were clobbered by the test. */           \n"\r
 334                 "pop    {r0-r1}                         \n"\r
 335 \r
 336                 "/* VFP register test passed.  Jump to the core register test. */       \n"\r
 337                 "b              reg1_loopf_pass         \n"\r
 338 \r
 339         "reg1_error_loopf:                              \n"\r
 340                 "/* If this line is hit then a VFP register value was found to be incorrect. */         \n"\r
 341                 "b reg1_error_loopf                     \n"\r
 342 \r
 343         "reg1_loopf_pass:                               \n"\r
 344 \r
 345                 "cmp    r0, #100                        \n"\r
 346                 "bne    reg1_error_loop         \n"\r
 347                 "cmp    r1, #101                        \n"\r
 348                 "bne    reg1_error_loop         \n"\r
 349                 "cmp    r2, #102                        \n"\r
 350                 "bne    reg1_error_loop         \n"\r
 351                 "cmp    r3, #103                        \n"\r
 352                 "bne    reg1_error_loop         \n"\r
 353                 "cmp    r4, #104                        \n"\r
 354                 "bne    reg1_error_loop         \n"\r
 355                 "cmp    r5, #105                        \n"\r
 356                 "bne    reg1_error_loop         \n"\r
 357                 "cmp    r6, #106                        \n"\r
 358                 "bne    reg1_error_loop         \n"\r
 359                 "cmp    r7, #107                        \n"\r
 360                 "bne    reg1_error_loop         \n"\r
 361                 "cmp    r8, #108                        \n"\r
 362                 "bne    reg1_error_loop         \n"\r
 363                 "cmp    r9, #109                        \n"\r
 364                 "bne    reg1_error_loop         \n"\r
 365                 "cmp    r10, #110                       \n"\r
 366                 "bne    reg1_error_loop         \n"\r
 367                 "cmp    r11, #111                       \n"\r
 368                 "bne    reg1_error_loop         \n"\r
 369                 "cmp    r12, #112                       \n"\r
 370                 "bne    reg1_error_loop         \n"\r
 371 \r
 372                 "/* Everything passed, increment the loop counter. */   \n"\r
 373                 "push   { r0-r1 }                       \n"\r
 374                 "ldr    r0, =pulRegTest3LoopCounter     \n"\r
 375                 "ldr    r0, [r0]                        \n"\r
 376                 "ldr    r1, [r0]                        \n"\r
 377                 "adds   r1, r1, #1                      \n"\r
 378                 "str    r1, [r0]                        \n"\r
 379                 "pop    { r0-r1 }                       \n"\r
 380 \r
 381                 "/* Start again. */                     \n"\r
 382                 "b              reg1_loop                       \n"\r
 383 \r
 384         "reg1_error_loop:                               \n"\r
 385                 "/* If this line is hit then there was an error in a core register value. \n"\r
 386                 "The loop ensures the loop counter stops incrementing. */       \n"\r
 387                 "b      reg1_error_loop                 \n"\r
 388                 "nop                                            "\r
 389         ); /* __asm volatile. */\r
 390 }\r
 391 /*-----------------------------------------------------------*/\r
 392 \r
 393 void vRegTest4Implementation( void )\r
 394 {\r
 395         __asm volatile\r
 396         (\r
 397                 ".extern pulRegTest4LoopCounter \n"\r
 398                 "/* Set all the core registers to known values. */      \n"\r
 399                 "mov    r0, #-1                         \n"\r
 400                 "mov    r1, #1                          \n"\r
 401                 "mov    r2, #2                          \n"\r
 402                 "mov    r3, #3                          \n"\r
 403                 "mov    r4, #4                          \n"\r
 404                 "mov    r5, #5                          \n"\r
 405                 "mov    r6, #6                          \n"\r
 406                 "mov    r7, #7                          \n"\r
 407                 "mov    r8, #8                          \n"\r
 408                 "mov    r9, #9                          \n"\r
 409                 "mov    r10, #10                        \n"\r
 410                 "mov    r11, #11                        \n"\r
 411                 "mov    r12, #12                        \n"\r
 412 \r
 413                 "/* Set all the VFP to known values. */  \n"\r
 414                 "vmov   d0, r0, r1                      \n"\r
 415                 "vmov   d1, r2, r3                      \n"\r
 416                 "vmov   d2, r4, r5                      \n"\r
 417                 "vmov   d3, r6, r7                      \n"\r
 418                 "vmov   d4, r8, r9                      \n"\r
 419                 "vmov   d5, r10, r11            \n"\r
 420                 "vmov   d6, r0, r1                      \n"\r
 421                 "vmov   d7, r2, r3                      \n"\r
 422                 "vmov   d8, r4, r5                      \n"\r
 423                 "vmov   d9, r6, r7                      \n"\r
 424                 "vmov   d10, r8, r9                     \n"\r
 425                 "vmov   d11, r10, r11           \n"\r
 426                 "vmov   d12, r0, r1                     \n"\r
 427                 "vmov   d13, r2, r3                     \n"\r
 428                 "vmov   d14, r4, r5                     \n"\r
 429                 "vmov   d15, r6, r7                     \n"\r
 430 \r
 431         "reg2_loop:                                             \n"\r
 432 \r
 433                 "/* Check all the VFP registers still contain the values set above.             \n"\r
 434                 "First save registers that are clobbered by the test. */                                \n"\r
 435                 "push { r0-r1 }                         \n"\r
 436 \r
 437                 "vmov   r0, r1, d0                      \n"\r
 438                 "cmp    r0, #-1                         \n"\r
 439                 "bne    reg2_error_loopf        \n"\r
 440                 "cmp    r1, #1                          \n"\r
 441                 "bne    reg2_error_loopf        \n"\r
 442                 "vmov   r0, r1, d1                      \n"\r
 443                 "cmp    r0, #2                          \n"\r
 444                 "bne    reg2_error_loopf        \n"\r
 445                 "cmp    r1, #3                          \n"\r
 446                 "bne    reg2_error_loopf        \n"\r
 447                 "vmov   r0, r1, d2                      \n"\r
 448                 "cmp    r0, #4                          \n"\r
 449                 "bne    reg2_error_loopf        \n"\r
 450                 "cmp    r1, #5                          \n"\r
 451                 "bne    reg2_error_loopf        \n"\r
 452                 "vmov   r0, r1, d3                      \n"\r
 453                 "cmp    r0, #6                          \n"\r
 454                 "bne    reg2_error_loopf        \n"\r
 455                 "cmp    r1, #7                          \n"\r
 456                 "bne    reg2_error_loopf        \n"\r
 457                 "vmov   r0, r1, d4                      \n"\r
 458                 "cmp    r0, #8                          \n"\r
 459                 "bne    reg2_error_loopf        \n"\r
 460                 "cmp    r1, #9                          \n"\r
 461                 "bne    reg2_error_loopf        \n"\r
 462                 "vmov   r0, r1, d5                      \n"\r
 463                 "cmp    r0, #10                         \n"\r
 464                 "bne    reg2_error_loopf        \n"\r
 465                 "cmp    r1, #11                         \n"\r
 466                 "bne    reg2_error_loopf        \n"\r
 467                 "vmov   r0, r1, d6                      \n"\r
 468                 "cmp    r0, #-1                         \n"\r
 469                 "bne    reg2_error_loopf        \n"\r
 470                 "cmp    r1, #1                          \n"\r
 471                 "bne    reg2_error_loopf        \n"\r
 472                 "vmov   r0, r1, d7                      \n"\r
 473                 "cmp    r0, #2                          \n"\r
 474                 "bne    reg2_error_loopf        \n"\r
 475                 "cmp    r1, #3                          \n"\r
 476                 "bne    reg2_error_loopf        \n"\r
 477                 "vmov   r0, r1, d8                      \n"\r
 478                 "cmp    r0, #4                          \n"\r
 479                 "bne    reg2_error_loopf        \n"\r
 480                 "cmp    r1, #5                          \n"\r
 481                 "bne    reg2_error_loopf        \n"\r
 482                 "vmov   r0, r1, d9                      \n"\r
 483                 "cmp    r0, #6                          \n"\r
 484                 "bne    reg2_error_loopf        \n"\r
 485                 "cmp    r1, #7                          \n"\r
 486                 "bne    reg2_error_loopf        \n"\r
 487                 "vmov   r0, r1, d10                     \n"\r
 488                 "cmp    r0, #8                          \n"\r
 489                 "bne    reg2_error_loopf        \n"\r
 490                 "cmp    r1, #9                          \n"\r
 491                 "bne    reg2_error_loopf        \n"\r
 492                 "vmov   r0, r1, d11                     \n"\r
 493                 "cmp    r0, #10                         \n"\r
 494                 "bne    reg2_error_loopf        \n"\r
 495                 "cmp    r1, #11                         \n"\r
 496                 "bne    reg2_error_loopf        \n"\r
 497                 "vmov   r0, r1, d12                     \n"\r
 498                 "cmp    r0, #-1                         \n"\r
 499                 "bne    reg2_error_loopf        \n"\r
 500                 "cmp    r1, #1                          \n"\r
 501                 "bne    reg2_error_loopf        \n"\r
 502                 "vmov   r0, r1, d13                     \n"\r
 503                 "cmp    r0, #2                          \n"\r
 504                 "bne    reg2_error_loopf        \n"\r
 505                 "cmp    r1, #3                          \n"\r
 506                 "bne    reg2_error_loopf        \n"\r
 507                 "vmov   r0, r1, d14                     \n"\r
 508                 "cmp    r0, #4                          \n"\r
 509                 "bne    reg2_error_loopf        \n"\r
 510                 "cmp    r1, #5                          \n"\r
 511                 "bne    reg2_error_loopf        \n"\r
 512                 "vmov   r0, r1, d15                     \n"\r
 513                 "cmp    r0, #6                          \n"\r
 514                 "bne    reg2_error_loopf        \n"\r
 515                 "cmp    r1, #7                          \n"\r
 516                 "bne    reg2_error_loopf        \n"\r
 517 \r
 518                 "/* Restore the registers that were clobbered by the test. */           \n"\r
 519                 "pop    {r0-r1}                         \n"\r
 520 \r
 521                 "/* VFP register test passed.  Jump to the core register test. */               \n"\r
 522                 "b              reg2_loopf_pass         \n"\r
 523 \r
 524         "reg2_error_loopf:                              \n"\r
 525                 "/* If this line is hit then a VFP register value was found to be               \n"\r
 526                 "incorrect. */                          \n"\r
 527                 "b reg2_error_loopf                     \n"\r
 528 \r
 529         "reg2_loopf_pass:                               \n"\r
 530 \r
 531                 "cmp    r0, #-1                         \n"\r
 532                 "bne    reg2_error_loop         \n"\r
 533                 "cmp    r1, #1                          \n"\r
 534                 "bne    reg2_error_loop         \n"\r
 535                 "cmp    r2, #2                          \n"\r
 536                 "bne    reg2_error_loop         \n"\r
 537                 "cmp    r3, #3                          \n"\r
 538                 "bne    reg2_error_loop         \n"\r
 539                 "cmp    r4, #4                          \n"\r
 540                 "bne    reg2_error_loop         \n"\r
 541                 "cmp    r5, #5                          \n"\r
 542                 "bne    reg2_error_loop         \n"\r
 543                 "cmp    r6, #6                          \n"\r
 544                 "bne    reg2_error_loop         \n"\r
 545                 "cmp    r7, #7                          \n"\r
 546                 "bne    reg2_error_loop         \n"\r
 547                 "cmp    r8, #8                          \n"\r
 548                 "bne    reg2_error_loop         \n"\r
 549                 "cmp    r9, #9                          \n"\r
 550                 "bne    reg2_error_loop         \n"\r
 551                 "cmp    r10, #10                        \n"\r
 552                 "bne    reg2_error_loop         \n"\r
 553                 "cmp    r11, #11                        \n"\r
 554                 "bne    reg2_error_loop         \n"\r
 555                 "cmp    r12, #12                        \n"\r
 556                 "bne    reg2_error_loop         \n"\r
 557 \r
 558                 "/* Increment the loop counter so the check task knows this task is \n"\r
 559                 "still running. */                      \n"\r
 560                 "push   { r0-r1 }                       \n"\r
 561                 "ldr    r0, =pulRegTest4LoopCounter     \n"\r
 562                 "ldr    r0, [r0]                        \n"\r
 563                 "ldr    r1, [r0]                        \n"\r
 564                 "adds   r1, r1, #1                      \n"\r
 565                 "str    r1, [r0]                        \n"\r
 566                 "pop { r0-r1 }                          \n"\r
 567 \r
 568                 "/* Yield to increase test coverage. */                 \n"\r
 569                 "SVC #1                                         \n"\r
 570 \r
 571                 "/* Start again. */                     \n"\r
 572                 "b reg2_loop                            \n"\r
 573 \r
 574         "reg2_error_loop:                               \n"\r
 575                 "/* If this line is hit then there was an error in a core register value.       \n"\r
 576                 "This loop ensures the loop counter variable stops incrementing. */                     \n"\r
 577                 "b reg2_error_loop                      \n"\r
 578         ); /* __asm volatile */\r
 579 }\r
 580 /*-----------------------------------------------------------*/\r
 581 \r
 582 /* Fault handlers are here for convenience as they use compiler specific syntax\r
 583 and this file is specific to the GCC compiler. */\r
 584 void hard_fault_handler( uint32_t * hardfault_args )\r
 585 {\r
 586 volatile uint32_t stacked_r0;\r
 587 volatile uint32_t stacked_r1;\r
 588 volatile uint32_t stacked_r2;\r
 589 volatile uint32_t stacked_r3;\r
 590 volatile uint32_t stacked_r12;\r
 591 volatile uint32_t stacked_lr;\r
 592 volatile uint32_t stacked_pc;\r
 593 volatile uint32_t stacked_psr;\r
 594 \r
 595         stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);\r
 596         stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);\r
 597         stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);\r
 598         stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);\r
 599 \r
 600         stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);\r
 601         stacked_lr = ((uint32_t) hardfault_args[ 5 ]);\r
 602         stacked_pc = ((uint32_t) hardfault_args[ 6 ]);\r
 603         stacked_psr = ((uint32_t) hardfault_args[ 7 ]);\r
 604 \r
 605         /* Inspect stacked_pc to locate the offending instruction. */\r
 606         for( ;; );\r
 607 \r
 608         ( void ) stacked_psr;\r
 609         ( void ) stacked_pc;\r
 610         ( void ) stacked_lr;\r
 611         ( void ) stacked_r12;\r
 612     ( void ) stacked_r0;\r
 613     ( void ) stacked_r1;\r
 614     ( void ) stacked_r2;\r
 615     ( void ) stacked_r3;\r
 616 }\r
 617 /*-----------------------------------------------------------*/\r
 618 \r
 619 void HardFault_Handler( void ) __attribute__((naked));\r
 620 void HardFault_Handler( void )\r
 621 {\r
 622         __asm volatile\r
 623         (\r
 624                 " tst lr, #4                                                                            \n"\r
 625                 " ite eq                                                                                        \n"\r
 626                 " mrseq r0, msp                                                                         \n"\r
 627                 " mrsne r0, psp                                                                         \n"\r
 628                 " ldr r1, [r0, #24]                                                                     \n"\r
 629                 " ldr r2, handler_address_const                                         \n"\r
 630                 " bx r2                                                                                         \n"\r
 631                 " handler_address_const: .word hard_fault_handler       \n"\r
 632         );\r
 633 }\r
 634 /*-----------------------------------------------------------*/\r
 635 \r
 636 void MemManage_Handler( void ) __attribute__((naked));\r
 637 void MemManage_Handler( void )\r
 638 {\r
 639         __asm volatile\r
 640         (\r
 641                 " tst lr, #4                                                                            \n"\r
 642                 " ite eq                                                                                        \n"\r
 643                 " mrseq r0, msp                                                                         \n"\r
 644                 " mrsne r0, psp                                                                         \n"\r
 645                 " ldr r1, [r0, #24]                                                                     \n"\r
 646                 " ldr r2, handler2_address_const                                        \n"\r
 647                 " bx r2                                                                                         \n"\r
 648                 " handler2_address_const: .word hard_fault_handler      \n"\r
 649         );\r
 650 }/*-----------------------------------------------------------*/\r
 651 \r