1 /****************************************************************************
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2 * © 2013 Microchip Technology Inc. and its subsidiaries.
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3 * You may use this software and any derivatives exclusively with
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4 * Microchip products.
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5 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
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6 * NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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7 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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8 * AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
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9 * PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
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10 * IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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11 * INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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12 * WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
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13 * BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
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14 * TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
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15 * CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
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16 * FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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17 * MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
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21 /** @defgroup pwm pwm_c_wrapper
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24 /** @file pwm_c_wrapper.cpp
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25 \brief the pwm component C wrapper
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26 This program is designed to allow the other C programs to be able to use this component
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28 There are entry points for all C wrapper API implementation
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30 <b>Platform:</b> This is ARC-based component
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32 <b>Toolset:</b> Metaware IDE(8.5.1)
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33 <b>Reference:</b> smsc_reusable_fw_requirement.doc */
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35 /*******************************************************************************
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36 * SMSC version control information (Perforce):
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38 * FILE: $File: //depot_pcs/FWEng/projects/MEC2016/Playground/pramans/160623_FreeRTOS_Microchip_MEC170x/Demo/CORTEX_MPU_MEC1701_Keil_GCC/peripheral_library/platform.h $
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39 * REVISION: $Revision: #1 $
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40 * DATETIME: $DateTime: 2016/09/22 08:03:49 $
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41 * AUTHOR: $Author: pramans $
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43 * Revision history (latest first):
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45 ***********************************************************************************
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48 #ifndef _PLATFORM_H_
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49 #define _PLATFORM_H_
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52 /* Enable any one of the below flag which enables either Aggregated or Disaggregated Interrupts */
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53 #define DISAGGREGATED_INPT_DEFINED 1
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54 //#define AGGREGATED_INPT_DEFINED 1
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56 /* Platform Configuration PreProcessor Conditions */
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62 #define PCLINT 9 //added to satisfy PC Lint's need for a value here
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64 #ifdef __CC_ARM // Keil ARM MDK
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65 #define TOOLSET TOOLMDK
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69 #ifdef _WIN32 //always defined by visual c++
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70 #define TOOLSET TOOLPC
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73 #ifdef __WIN32__ //always defined by borland
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74 #define TOOLSET TOOLPC
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80 #define TOOLSET TOOLMW // ARC Metaware
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84 //#error "ERROR: cfg.h TOOLSET not defined!"
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87 #if TOOLSET == TOOLMDK
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88 #define _KEIL_ARM_ 1 /* Make 1 for Keil MDK Compiler */
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89 #define _KEIL_ 0 /* Make 1 for Keil Compiler */
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91 #define _ARC_CORE_ 0
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94 #if TOOLSET == TOOLKEIL
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95 #define _KEIL_ARM_ 0
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96 #define _KEIL_ 1 /* Make 1 for Keil Compiler */
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98 #define _ARC_CORE_ 0
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101 #if TOOLSET == TOOLPC
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102 #define _KEIL_ARM_ 0
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104 #define _PC_ 1 /* Make 1 for PC Environment */
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105 #define _ARC_CORE_ 0
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108 #if TOOLSET == TOOLMW
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109 #define _KEIL_ARM_ 0
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112 #define _ARC_CORE_ 1
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115 /* Short form for Standard Data Types */
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116 typedef unsigned char UINT8;
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117 typedef unsigned short UINT16;
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118 typedef unsigned long UINT32;
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120 typedef volatile unsigned char REG8;
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122 typedef unsigned char BYTE;
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123 typedef unsigned short WORD;
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124 typedef unsigned long DWORD;
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126 typedef unsigned char UCHAR;
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127 typedef unsigned short USHORT;
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128 typedef unsigned long ULONG;
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130 typedef unsigned char BOOL;
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131 typedef unsigned int UINT;
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134 typedef signed char INT8;
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135 typedef signed short INT16;
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136 typedef signed long INT32;
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140 typedef volatile unsigned char VUINT8;
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141 typedef volatile unsigned short int VUINT16;
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142 typedef volatile unsigned long int VUINT32;
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144 typedef union _BITS_8
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161 /* MACROS FOR Platform Portability */
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163 /* macro for defining MMCR register */
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164 /* add MMCRARRAY() & EXTERNMMCRARRAY() */
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166 #define MMCR(name,address) volatile unsigned char xdata name _at_ address
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167 #define MMCRARRAY(name,length,address) volatile unsigned char xdata name[length] _at_ address
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168 #define MMCRTYPE(name,dtype,address) volatile dtype xdata name _at_ address
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169 #define EXTERNMMCR(name) extern volatile unsigned char xdata name
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170 #define EXTERNMMCRARRAY(name) extern volatile unsigned char xdata name[]
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171 #define EXTERNMMCRTYPE(name,dtype) extern volatile dtype xdata name
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172 #define SFR(name,address) sfr name = address
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173 #define SFRBIT(name,address) sbit name = address
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174 #define EXTERNSFR(name)
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175 #define BITADDRESSTYPE(name) bit name
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176 #define XDATA xdata
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179 #define IDATA idata
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180 #define INTERRUPT(x) interrupt x
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181 #define SET_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = TRUE;)
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182 #define CLR_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = FALSE;)
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183 #define NULLPTR (char *)(0)
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184 #define PLATFORM_TRIM_OSC() // TODO
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186 #define DISABLE_INTERRUPTS() sfrIE_EAbit=0
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187 #define ENABLE_INTERRUPTS() sfrIE_EAbit=1
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188 #define SAVE_DIS_INTERRUPTS(x) { x=sfrIE_EAbit; sfrIE_EAbit=0; }
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189 #define RESTORE_INTERRUPTS(x) { sfrIE_EAbit=x; }
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190 #define ATOMIC_CPU_SLEEP()
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191 #define NUM_IRQ_VECTORS 12 // DW-8051
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192 #define IRQ_VECTOR_SIZE 8
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193 #define USE_INLINE_PATCHER 1
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194 #define IRQ_VECTABLE_IN_RAM 0
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195 #define PLAT_ROM_IRQ_VECTOR_BASE 0x03 // ROM start
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196 #define PLAT_IRQ_VECTOR_BASE 0x1003 // RAM start
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197 #define FUNC_NEVER_RETURNS
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198 #define BEGIN_SMALL_DATA_BLOCK(x)
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199 #define END_SMALL_DATA_BLOCK()
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200 UINT32 soft_norm(UINT32 val);
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201 #define NORM(x) soft_norm(x)
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203 #define USE_FUNC_REPLACEMENT 0
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207 #define MMCR(name,address) volatile unsigned char name
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208 #define MMCRARRAY(name,length,address) volatile unsigned char name[length]
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209 #define MMCRTYPE(name,dtype,address) volatile dtype name
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210 #define EXTERNMMCR(name) extern volatile unsigned char name
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211 #define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]
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212 #define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name
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213 #define SFR(name,address) volatile unsigned char name
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214 #define SFRBIT(name,address) volatile unsigned char name
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215 #define EXTERNSFR(name) extern volatile unsigned char name
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216 #define BITADDRESSTYPE(name) volatile unsigned char name
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221 #define INTERRUPT(x)
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222 #define SET_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = TRUE;)
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223 #define CLR_GLOBAL_INTR_ENABLE() (sfrIE_EAbit = FALSE;)
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224 #define NULLPTR (char *)(0)
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225 #define PLATFORM_TRIM_OSC() // TODO
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227 #define DISABLE_INTERRUPTS()
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228 #define ENABLE_INTERRUPTS()
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229 #define SAVE_DIS_INTERRUPTS(x)
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230 #define RESTORE_INTERRUPTS(x)
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231 #define ATOMIC_CPU_SLEEP()
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232 #define NUM_IRQ_VECTORS 24
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233 #define IRQ_VECTOR_SIZE 8
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234 #define USE_INLINE_PATCHER 1
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235 #define IRQ_VECTABLE_IN_RAM 0
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236 #define FUNC_NEVER_RETURNS
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237 #define BEGIN_SMALL_DATA_BLOCK(x)
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238 #define END_SMALL_DATA_BLOCK()
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239 UINT32 soft_norm(UINT32 val);
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240 #define NORM(x) soft_norm(x)
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242 #define USE_FUNC_REPLACEMENT 0
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246 // ARC C has no equivalent operator to specify address of a variable
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247 // ARC MMCR's are 32-bit registers
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248 #define MMCR(name,address) volatile unsigned char name
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249 #define MMCRARRAY(name,length,address) volatile unsigned char name[length]
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250 #define MMCRTYPE(name,dtype,address) volatile dtype name
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251 #define EXTERNMMCR(name) extern volatile unsigned char name
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252 #define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]
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253 #define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name
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254 #define SFR(name,address) volatile unsigned char name
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255 #define SFRBIT(name,address) volatile unsigned char name
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256 #define EXTERNSFR(name) extern volatile unsigned char name
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257 #define BITADDRESSTYPE(name)
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262 #define INTERRUPT(x)
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263 #define SET_GLOBAL_INTR_ENABLE() (_enable())
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264 #define CLR_GLOBAL_INTR_ENABLE() (_disable())
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265 #define NULLPTR (char *)(0)
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266 #define NULLVOIDPTR (void *)(0)
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267 #define NULLFPTR (void (*)(void))0
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268 #define PLATFORM_TRIM_OSC() // TODO
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269 #define PNOP() _nop()
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270 #define DISABLE_INTERRUPTS() _disable()
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271 #define ENABLE_INTERRUPTS() _enable()
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272 #define SAVE_DIS_INTERRUPTS(x) { x=_lr(REG_STATUS32);_flag(x & ~(REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT));_nop(); }
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273 #define RESTORE_INTERRUPTS(x) { _flag((_lr(REG_STATUS32) | (x & (REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT))));_nop(); }
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274 #define ATOMIC_CPU_SLEEP() _flag(6);_sleep();_nop();_nop();
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275 #define NUM_IRQ_VECTORS 24
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276 #define IRQ_VECTOR_SIZE 8
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277 #define USE_INLINE_PATCHER 0
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278 #define DCCM_CODE_ALIAS_ADDR 0x00060000
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279 #define PLAT_ROM_IRQ_VECTOR_BASE 0
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280 #define PLAT_IRQ_VECTOR_BASE (DCCM_CODE_ALIAS_ADDR)
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281 /// y #define IRQ_VECTABLE_IN_RAM 1
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282 #define IRQ_VECTABLE_IN_RAM 0
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283 #define FUNC_NEVER_RETURNS _CC(_NEVER_RETURNS)
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284 #define BEGIN_SMALL_DATA_BLOCK(x) #pragma Push_small_data(x)
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285 #define END_SMALL_DATA_BLOCK() #pragma Pop_small_data()
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286 #define NORM(x) _norm(x)
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288 #define INLINE_FUNCTION(x) #pragma On_inline(x)
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291 #define USE_FUNC_REPLACEMENT 0
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295 // For ARM MDK compiler
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296 // ARM MMCR's are 32-bit registers
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297 #define MMCR(name,address) volatile unsigned char name
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298 #define MMCRARRAY(name,length,address) volatile unsigned char name[length]
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299 #define MMCRTYPE(name,dtype,address) volatile dtype name
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300 #define EXTERNMMCR(name) extern volatile unsigned char name
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301 #define EXTERNMMCRARRAY(name) extern volatile unsigned char name[]
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302 #define EXTERNMMCRTYPE(name,dtype) extern volatile dtype name
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303 #define SFR(name,address) volatile unsigned char name
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304 #define SFRBIT(name,address) volatile unsigned char name
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305 #define EXTERNSFR(name) extern volatile unsigned char name
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306 #define BITADDRESSTYPE(name)
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311 #define INTERRUPT(x)
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312 #define SET_GLOBAL_INTR_ENABLE() (__enable_irq())
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313 #define CLR_GLOBAL_INTR_ENABLE() (__disable_irq())
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314 #define NULLPTR (char *)(0)
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315 #define NULLVOIDPTR (void *)(0)
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316 #define NULLFPTR (void (*)(void))0
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317 #define PLATFORM_TRIM_OSC() // TODO
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318 #define PNOP() __NOP()
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319 #define DISABLE_INTERRUPTS() __disable_irq()
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320 #define ENABLE_INTERRUPTS() __enable_irq()
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321 #define ATOMIC_CPU_SLEEP() __wfi();__nop();__nop();
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323 #if 0 /* need further efforts if needed */
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324 #define SAVE_DIS_INTERRUPTS(x) { x=_lr(REG_STATUS32);_flag(x & ~(REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT));_nop(); }
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325 #define RESTORE_INTERRUPTS(x) { _flag((_lr(REG_STATUS32) | (x & (REG_STATUS32_E1_BIT | REG_STATUS32_E2_BIT))));_nop(); }
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326 #define NUM_IRQ_VECTORS 24
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327 #define IRQ_VECTOR_SIZE 8
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328 #define USE_INLINE_PATCHER 0
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329 #define DCCM_CODE_ALIAS_ADDR 0x00060000
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330 #define PLAT_ROM_IRQ_VECTOR_BASE 0
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331 #define PLAT_IRQ_VECTOR_BASE (DCCM_CODE_ALIAS_ADDR)
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332 /// y #define IRQ_VECTABLE_IN_RAM 1
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333 #define IRQ_VECTABLE_IN_RAM 0
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334 #define BEGIN_SMALL_DATA_BLOCK(x) #pragma Push_small_data(x)
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335 #define END_SMALL_DATA_BLOCK() #pragma Pop_small_data()
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336 #define INLINE_FUNCTION(x) #pragma On_inline(x)
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337 #define USE_FUNC_REPLACEMENT 0
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341 #define FUNC_NEVER_RETURNS _CC(_NEVER_RETURNS)
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342 #define NORM(x) _norm(x)
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345 #define FUNC_NEVER_RETURNS
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346 UINT32 soft_norm(UINT32 val);
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347 #define NORM(x) soft_norm(x)
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351 /* General Constants */
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353 #define TRUE !FALSE
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355 #define BIT_n_MASK(n) (1U << (n))
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356 #define BIT_0_MASK (1<<0)
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357 #define BIT_1_MASK (1<<1)
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358 #define BIT_2_MASK (1<<2)
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359 #define BIT_3_MASK (1<<3)
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360 #define BIT_4_MASK (1<<4)
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361 #define BIT_5_MASK (1<<5)
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362 #define BIT_6_MASK (1<<6)
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363 #define BIT_7_MASK (1<<7)
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364 #define BIT_8_MASK ((UINT16)1<<8)
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365 #define BIT_9_MASK ((UINT16)1<<9)
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366 #define BIT_10_MASK ((UINT16)1<<10)
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367 #define BIT_11_MASK ((UINT16)1<<11)
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368 #define BIT_12_MASK ((UINT16)1<<12)
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369 #define BIT_13_MASK ((UINT16)1<<13)
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370 #define BIT_14_MASK ((UINT16)1<<14)
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371 #define BIT_15_MASK ((UINT16)1<<15)
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372 #define BIT_16_MASK ((UINT32)1<<16)
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373 #define BIT_17_MASK ((UINT32)1<<17)
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374 #define BIT_18_MASK ((UINT32)1<<18)
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375 #define BIT_19_MASK ((UINT32)1<<19)
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376 #define BIT_20_MASK ((UINT32)1<<20)
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377 #define BIT_21_MASK ((UINT32)1<<21)
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378 #define BIT_22_MASK ((UINT32)1<<22)
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379 #define BIT_23_MASK ((UINT32)1<<23)
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380 #define BIT_24_MASK ((UINT32)1<<24)
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381 #define BIT_25_MASK ((UINT32)1<<25)
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382 #define BIT_26_MASK ((UINT32)1<<26)
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383 #define BIT_27_MASK ((UINT32)1<<27)
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384 #define BIT_28_MASK ((UINT32)1<<28)
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385 #define BIT_29_MASK ((UINT32)1<<29)
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386 #define BIT_30_MASK ((UINT32)1<<30)
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387 #define BIT_31_MASK ((UINT32)1<<31)
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390 /* For CEC application */
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394 #endif /*_PLATFORM_H_*/
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