2 "libcr_semihost_nf.a"
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4 "libcr_eabihelpers.a"
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9 * LPC54018 does not execute from Flash but from RAM (SRAMX). As a result, the
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10 * MPU needs to be programmed to set the portion of SRAMX containing kernel
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11 * code as privileged Read Only and the portion of SRAMX containing remaining
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12 * of the code as Read Only. To facilitate this, SRAMX is divided into two
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14 * 1. SRAMX_CODE - 128KB. Contains code.
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15 * 2. SRAMX_DATA - 64 KB. Contains data (only stack and heap as of now).
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17 * SRAM_0_1_2_3 is of size 160 KB which is not a power of 2. ARM v7 MPU requires
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18 * the size of an MPU region to be a power of two. Since FreeRTOS Cortex M4 MPU
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19 * port programs MPU to grant access to all SRAM (for tasks created using
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20 * xTaskCreate), we need to ensure that the size of SRAM region is a power of
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21 * two. This is why SRAM_0_1_2_3 is divided into two parts:
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22 * 1. SRAM_0_1_2_3 - 128 KB. Contains data. Since the size is now a power
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23 * of two, an MPU region can be used to grant access to it.
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24 * 2. SRAM_0_1_2_3_UNUSED - 32 KB. Unused.
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28 /* Define each memory region. */
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29 BOARD_FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x1000000 /* 16M bytes (alias Flash). */
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30 SRAMX_CODE (rwx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes. */
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31 SRAMX_DATA (rwx) : ORIGIN = 0x20000, LENGTH = 0x10000 /* 64K bytes (alias RAM). */
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32 SRAM_0_1_2_3 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000 /* 128K bytes (alias RAM2). */
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33 SRAM_0_1_2_3_UNUSED (rwx) : ORIGIN = 0x20020000, LENGTH = 0x8000 /* 32K bytes. */
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34 USB_RAM (rwx) : ORIGIN = 0x40100000, LENGTH = 0x2000 /* 8K bytes (alias RAM3). */
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37 /* Initial 32K SRAMX_CODE is used to store kernel functions and
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38 * initial 512 bytes of SRAM_0_1_2_3 is used to store kernel data. */
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39 __privileged_functions_region_size__ = 32K;
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40 __privileged_data_region_size__ = 512;
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42 /* Symbols needed by the MPU setup code. */
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43 __FLASH_segment_start__ = ORIGIN( SRAMX_CODE );
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44 __FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( SRAMX_CODE );
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45 __SRAM_segment_start__ = ORIGIN( SRAM_0_1_2_3 );
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46 __SRAM_segment_end__ = __SRAM_segment_start__ + LENGTH( SRAM_0_1_2_3 );
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54 /* The startup code and FreeRTOS kernel code are placed at the beginning
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56 .privileged_functions : ALIGN(4)
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59 __vectors_start__ = ABSOLUTE(.);
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60 __FLASH_segment_start__ = __vectors_start__;
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61 __privileged_functions_start__ = __vectors_start__;
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62 KEEP(*(.isr_vector))
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64 /* Global Section Table. */
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66 __section_table_start = .;
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68 __data_section_table = .;
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69 LONG((LOADADDR(.data_RAM) - LOADADDR(.privileged_functions)) + ORIGIN(SRAMX_CODE));
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70 LONG( ADDR(.data_RAM));
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71 LONG( SIZEOF(.data_RAM));
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73 LONG((LOADADDR(.data) - LOADADDR(.privileged_functions)) + ORIGIN(SRAMX_CODE));
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75 LONG( SIZEOF(.data));
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77 LONG((LOADADDR(.data_RAM3) - LOADADDR(.privileged_functions)) + ORIGIN(SRAMX_CODE));
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78 LONG( ADDR(.data_RAM3));
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79 LONG( SIZEOF(.data_RAM3));
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80 __data_section_table_end = .;
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82 __bss_section_table = .;
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83 LONG( ADDR(.bss_RAM));
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84 LONG( SIZEOF(.bss_RAM));
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87 LONG( SIZEOF(.bss));
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89 LONG( ADDR(.bss_RAM3));
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90 LONG( SIZEOF(.bss_RAM3));
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91 __bss_section_table_end = .;
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93 __section_table_end = .;
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94 /* End of Global Section Table. */
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96 /* Functions placed after vector table. */
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100 *(privileged_functions)
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103 /* Ensure that non-privileged code is placed after the region reserved for
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104 * privileged kernel code. */
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105 /* Note that dot (.) actually refers to the byte offset from the start of
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106 * the current section (.privileged_functions in this case). As a result,
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107 * setting dot (.) to a value sets the size of the section. */
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108 . = __privileged_functions_region_size__;
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109 __privileged_functions_end__ = .;
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110 } > SRAMX_CODE AT> BOARD_FLASH
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112 /* Text Section. */
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115 /* Place the FreeRTOS System Calls first in the unprivileged region. */
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116 __syscalls_flash_start__ = .;
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117 *(freertos_system_calls)
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118 __syscalls_flash_end__ = .;
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120 /* Unprivileged code and RO data. */
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122 KEEP(*freertos*/tasks.o(.rodata*)) /* FreeRTOS Debug Config. */
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123 *(.rodata .rodata.* .constdata .constdata.*)
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125 } > SRAMX_CODE AT> BOARD_FLASH
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127 /* For exception handling/unwind - some Newlib functions (in common
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128 * with C++ and STDC++) use this. */
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129 .ARM.extab : ALIGN(4)
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131 *(.ARM.extab* .gnu.linkonce.armextab.*)
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132 } > SRAMX_CODE AT> BOARD_FLASH
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136 .ARM.exidx : ALIGN(4)
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138 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
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139 } > SRAMX_CODE AT> BOARD_FLASH
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143 /* End of text section. */
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147 .m_usb_data (NOLOAD) :
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150 } > USB_RAM AT> USB_RAM
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152 /* Data section for SRAMX_DATA. */
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153 .data_RAM : ALIGN(4)
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156 PROVIDE(__start_data_RAM = .);
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157 PROVIDE(__start_data_SRAMX_DATA = .);
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165 PROVIDE(__end_data_RAM = .);
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166 PROVIDE(__end_data_SRAMX_DATA = .);
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167 } > SRAMX_DATA AT>BOARD_FLASH
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169 /* Data section for USB_RAM. */
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170 .data_RAM3 : ALIGN(4)
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173 PROVIDE(__start_data_RAM3 = .);
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174 PROVIDE(__start_data_USB_RAM = .);
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176 *(.ramfunc.$USB_RAM)
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180 *(.data.$USB_RAM.*)
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182 PROVIDE(__end_data_RAM3 = .);
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183 PROVIDE(__end_data_USB_RAM = .);
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184 } > USB_RAM AT>BOARD_FLASH
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186 /* Main Data Section - Reserved. */
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187 .uninit_RESERVED (NOLOAD) : ALIGN(4)
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189 _start_uninit_RESERVED = .;
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190 __privileged_data_start__ = _start_uninit_RESERVED;
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192 KEEP(*(.bss.$RESERVED*))
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195 _end_uninit_RESERVED = .;
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196 } > SRAM_0_1_2_3 AT> SRAM_0_1_2_3
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198 /* Main DATA section (SRAM_0_1_2_3). */
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202 PROVIDE(__start_data_RAM2 = .);
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203 PROVIDE(__start_data_SRAM_0_1_2_3 = .);
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205 /* FreeRTOS kernel data. */
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208 /* Ensure that non-privileged data is placed after the region reserved for
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209 * privileged kernel data. */
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210 /* Note that dot (.) actually refers to the byte offset from the start of
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211 * the current section (.data in this case). As a result, setting
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212 * dot (.) to a value extends the size of the section. */
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213 . = __privileged_data_region_size__;
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214 __privileged_data_end__ = .;
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219 KEEP(*(CodeQuickAccess))
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220 KEEP(*(DataQuickAccess))
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225 PROVIDE(__end_data_RAM2 = .);
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226 PROVIDE(__end_data_SRAM_0_1_2_3 = .);
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227 } > SRAM_0_1_2_3 AT>BOARD_FLASH
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229 /* BSS section for SRAMX_DATA. */
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230 .bss_RAM : ALIGN(4)
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232 PROVIDE(__start_bss_RAM = .);
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233 PROVIDE(__start_bss_SRAMX_DATA = .);
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238 . = ALIGN (. != 0 ? 4 : 1); /* Avoid empty segment. */
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239 PROVIDE(__end_bss_RAM = .);
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240 PROVIDE(__end_bss_SRAMX_DATA = .);
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241 } > SRAMX_DATA AT> SRAMX_DATA
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243 /* BSS section for USB_RAM. */
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244 .bss_RAM3 : ALIGN(4)
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246 PROVIDE(__start_bss_RAM3 = .);
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247 PROVIDE(__start_bss_USB_RAM = .);
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252 . = ALIGN (. != 0 ? 4 : 1); /* Avoid empty segment. */
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253 PROVIDE(__end_bss_RAM3 = .);
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254 PROVIDE(__end_bss_USB_RAM = .);
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255 } > USB_RAM AT> USB_RAM
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257 /* Main BSS Section. */
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261 PROVIDE(__start_bss_RAM2 = .);
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262 PROVIDE(__start_bss_SRAM_0_1_2_3 = .);
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267 PROVIDE(__end_bss_RAM2 = .);
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268 PROVIDE(__end_bss_SRAM_0_1_2_3 = .);
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270 } > SRAM_0_1_2_3 AT> SRAM_0_1_2_3
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272 /* NOINIT section for SRAMX_DATA. */
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273 .noinit_RAM (NOLOAD) : ALIGN(4)
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275 PROVIDE(__start_noinit_RAM = .);
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276 PROVIDE(__start_noinit_SRAMX_DATA = .);
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280 *(.noinit.$SRAMX.*)
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282 PROVIDE(__end_noinit_RAM = .);
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283 PROVIDE(__end_noinit_SRAMX_DATA = .);
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284 } > SRAMX_DATA AT> SRAMX_DATA
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286 /* NOINIT section for USB_RAM. */
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287 .noinit_RAM3 (NOLOAD) : ALIGN(4)
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289 PROVIDE(__start_noinit_RAM3 = .);
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290 PROVIDE(__start_noinit_USB_RAM = .);
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292 *(.noinit.$USB_RAM)
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294 *(.noinit.$USB_RAM.*)
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296 PROVIDE(__end_noinit_RAM3 = .);
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297 PROVIDE(__end_noinit_USB_RAM = .);
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298 } > USB_RAM AT> USB_RAM
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300 /* Default NOINIT Section. */
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301 .noinit (NOLOAD): ALIGN(4)
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304 PROVIDE(__start_noinit_RAM2 = .);
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305 PROVIDE(__start_noinit_SRAM_0_1_2_3 = .);
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309 PROVIDE(__end_noinit_RAM2 = .);
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310 PROVIDE(__end_noinit_SRAM_0_1_2_3 = .);
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311 } > SRAM_0_1_2_3 AT> SRAM_0_1_2_3
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313 /* Reserve and place Heap within memory map. */
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314 _HeapSize = 0x1000;
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323 /* Reserve space in memory for Stack. */
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324 _StackSize = 0x1000;
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330 /* Locate actual Stack in memory map. */
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331 .stack ORIGIN(SRAMX_DATA) + LENGTH(SRAMX_DATA) - _StackSize - 0: ALIGN(4)
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335 _vStackTop = . + _StackSize;
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338 /* ## Create checksum value (used in startup). ## */
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339 PROVIDE(__valid_user_code_checksum = 0 -
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342 + (NMI_Handler + 1)
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343 + (HardFault_Handler + 1)
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344 + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined. */
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345 + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined. */
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346 + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined. */
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349 /* Provide basic symbols giving location and size of main text
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350 * block, including initial values of RW data sections. Note that
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351 * these will need extending to give a complete picture with
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352 * complex images (e.g multiple Flash banks). */
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353 _image_start = LOADADDR(.privileged_functions);
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354 _image_end = LOADADDR(.data) + SIZEOF(.data);
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355 _image_size = _image_end - _image_start;
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357 /* Provide symbols for LPC540xx parts for startup code to use
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358 * to set image to be plain load image or XIP.
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359 * Config : Plain load image = true. */
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360 __imghdr_loadaddress = ADDR(.privileged_functions);
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361 __imghdr_imagetype = 1;
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