2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
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3 * Copyright 2016-2019 NXP
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4 * All rights reserved.
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6 * SPDX-License-Identifier: BSD-3-Clause
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10 #define _LPC_GPIO_H_
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12 #include "fsl_common.h"
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15 * @addtogroup lpc_gpio
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21 /*******************************************************************************
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23 ******************************************************************************/
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25 /*! @name Driver version */
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27 /*! @brief LPC GPIO driver version. */
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28 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 5))
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31 /*! @brief LPC GPIO direction definition */
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32 typedef enum _gpio_pin_direction
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34 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
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35 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
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36 } gpio_pin_direction_t;
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39 * @brief The GPIO pin configuration structure.
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41 * Every pin can only be configured as either output pin or input pin at a time.
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42 * If configured as a input pin, then leave the outputConfig unused.
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44 typedef struct _gpio_pin_config
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46 gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
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47 /* Output configurations, please ignore if configured as a input one */
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48 uint8_t outputLogic; /*!< Set default output logic, no use in input */
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49 } gpio_pin_config_t;
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51 #if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT)
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52 #define GPIO_PIN_INT_LEVEL 0x00U
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53 #define GPIO_PIN_INT_EDGE 0x01U
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55 #define PINT_PIN_INT_HIGH_OR_RISE_TRIGGER 0x00U
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56 #define PINT_PIN_INT_LOW_OR_FALL_TRIGGER 0x01U
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58 /*! @brief GPIO Pin Interrupt enable mode */
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59 typedef enum _gpio_pin_enable_mode
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61 kGPIO_PinIntEnableLevel = GPIO_PIN_INT_LEVEL, /*!< Generate Pin Interrupt on level mode */
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62 kGPIO_PinIntEnableEdge = GPIO_PIN_INT_EDGE /*!< Generate Pin Interrupt on edge mode */
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63 } gpio_pin_enable_mode_t;
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65 /*! @brief GPIO Pin Interrupt enable polarity */
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66 typedef enum _gpio_pin_enable_polarity
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68 kGPIO_PinIntEnableHighOrRise =
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69 PINT_PIN_INT_HIGH_OR_RISE_TRIGGER, /*!< Generate Pin Interrupt on high level or rising edge */
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70 kGPIO_PinIntEnableLowOrFall =
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71 PINT_PIN_INT_LOW_OR_FALL_TRIGGER /*!< Generate Pin Interrupt on low level or falling edge */
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72 } gpio_pin_enable_polarity_t;
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74 /*! @brief LPC GPIO interrupt index definition */
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75 typedef enum _gpio_interrupt_index
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77 kGPIO_InterruptA = 0U, /*!< Set current pin as interrupt A*/
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78 kGPIO_InterruptB = 1U, /*!< Set current pin as interrupt B*/
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79 } gpio_interrupt_index_t;
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81 /*! @brief Configures the interrupt generation condition. */
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82 typedef struct _gpio_interrupt_config
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84 uint8_t mode; /* The trigger mode of GPIO interrupts */
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85 uint8_t polarity; /* The polarity of GPIO interrupts */
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86 } gpio_interrupt_config_t;
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89 /*******************************************************************************
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91 ******************************************************************************/
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92 #if defined(__cplusplus)
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96 /*! @name GPIO Configuration */
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100 * @brief Initializes the GPIO peripheral.
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102 * This function ungates the GPIO clock.
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104 * @param base GPIO peripheral base pointer.
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105 * @param port GPIO port number.
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107 void GPIO_PortInit(GPIO_Type *base, uint32_t port);
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110 * @brief Initializes a GPIO pin used by the board.
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112 * To initialize the GPIO, define a pin configuration, either input or output, in the user file.
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113 * Then, call the GPIO_PinInit() function.
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115 * This is an example to define an input pin or output pin configuration:
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117 * Define a digital input pin configuration,
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118 * gpio_pin_config_t config =
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120 * kGPIO_DigitalInput,
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123 * Define a digital output pin configuration,
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124 * gpio_pin_config_t config =
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126 * kGPIO_DigitalOutput,
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131 * @param base GPIO peripheral base pointer(Typically GPIO)
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132 * @param port GPIO port number
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133 * @param pin GPIO pin number
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134 * @param config GPIO pin configuration pointer
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136 void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config);
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140 /*! @name GPIO Output Operations */
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144 * @brief Sets the output level of the one GPIO pin to the logic 1 or 0.
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146 * @param base GPIO peripheral base pointer(Typically GPIO)
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147 * @param port GPIO port number
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148 * @param pin GPIO pin number
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149 * @param output GPIO pin output logic level.
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150 * - 0: corresponding pin output low-logic level.
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151 * - 1: corresponding pin output high-logic level.
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153 static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)
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155 base->B[port][pin] = output;
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159 /*! @name GPIO Input Operations */
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163 * @brief Reads the current input value of the GPIO PIN.
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165 * @param base GPIO peripheral base pointer(Typically GPIO)
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166 * @param port GPIO port number
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167 * @param pin GPIO pin number
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168 * @retval GPIO port input value
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169 * - 0: corresponding pin input low-logic level.
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170 * - 1: corresponding pin input high-logic level.
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172 static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)
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174 return (uint32_t)base->B[port][pin];
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180 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
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182 * @param base GPIO peripheral base pointer(Typically GPIO)
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183 * @param port GPIO port number
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184 * @param mask GPIO pin number macro
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186 static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)
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188 base->SET[port] = mask;
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192 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
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194 * @param base GPIO peripheral base pointer(Typically GPIO)
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195 * @param port GPIO port number
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196 * @param mask GPIO pin number macro
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198 static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)
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200 base->CLR[port] = mask;
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204 * @brief Reverses current output logic of the multiple GPIO pins.
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206 * @param base GPIO peripheral base pointer(Typically GPIO)
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207 * @param port GPIO port number
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208 * @param mask GPIO pin number macro
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210 static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)
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212 base->NOT[port] = mask;
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218 * @brief Reads the current input value of the whole GPIO port.
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220 * @param base GPIO peripheral base pointer(Typically GPIO)
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221 * @param port GPIO port number
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223 static inline uint32_t GPIO_PortRead(GPIO_Type *base, uint32_t port)
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225 return (uint32_t)base->PIN[port];
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229 /*! @name GPIO Mask Operations */
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233 * @brief Sets port mask, 0 - enable pin, 1 - disable pin.
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235 * @param base GPIO peripheral base pointer(Typically GPIO)
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236 * @param port GPIO port number
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237 * @param mask GPIO pin number macro
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239 static inline void GPIO_PortMaskedSet(GPIO_Type *base, uint32_t port, uint32_t mask)
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241 base->MASK[port] = mask;
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245 * @brief Sets the output level of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be affected.
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247 * @param base GPIO peripheral base pointer(Typically GPIO)
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248 * @param port GPIO port number
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249 * @param output GPIO port output value.
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251 static inline void GPIO_PortMaskedWrite(GPIO_Type *base, uint32_t port, uint32_t output)
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253 base->MPIN[port] = output;
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257 * @brief Reads the current input value of the masked GPIO port. Only pins enabled by GPIO_SetPortMask() will be
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260 * @param base GPIO peripheral base pointer(Typically GPIO)
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261 * @param port GPIO port number
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262 * @retval masked GPIO port value
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264 static inline uint32_t GPIO_PortMaskedRead(GPIO_Type *base, uint32_t port)
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266 return (uint32_t)base->MPIN[port];
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269 #if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT
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271 * @brief Configures the gpio pin interrupt.
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273 * @param base GPIO base pointer.
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274 * @param port GPIO port number
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275 * @param pin GPIO pin number.
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276 * @param config GPIO pin interrupt configuration..
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278 void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config);
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281 * @brief Enables multiple pins interrupt.
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283 * @param base GPIO base pointer.
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284 * @param port GPIO port number.
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285 * @param index GPIO interrupt number.
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286 * @param mask GPIO pin number macro.
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288 void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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291 * @brief Disables multiple pins interrupt.
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293 * @param base GPIO base pointer.
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294 * @param port GPIO port number.
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295 * @param index GPIO interrupt number.
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296 * @param mask GPIO pin number macro.
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298 void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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301 * @brief Clears pin interrupt flag. Status flags are cleared by
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302 * writing a 1 to the corresponding bit position.
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304 * @param base GPIO base pointer.
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305 * @param port GPIO port number.
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306 * @param index GPIO interrupt number.
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307 * @param mask GPIO pin number macro.
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309 void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);
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312 * @ Read port interrupt status.
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314 * @param base GPIO base pointer.
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315 * @param port GPIO port number
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316 * @param index GPIO interrupt number.
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317 * @retval masked GPIO status value
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319 uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);
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322 * @brief Enables the specific pin interrupt.
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324 * @param base GPIO base pointer.
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325 * @param port GPIO port number.
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326 * @param pin GPIO pin number.
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327 * @param index GPIO interrupt number.
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329 void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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332 * @brief Disables the specific pin interrupt.
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334 * @param base GPIO base pointer.
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335 * @param port GPIO port number.
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336 * @param pin GPIO pin number.
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337 * @param index GPIO interrupt number.
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339 void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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342 * @brief Clears the specific pin interrupt flag. Status flags are cleared by
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343 * writing a 1 to the corresponding bit position.
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345 * @param base GPIO base pointer.
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346 * @param port GPIO port number.
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347 * @param pin GPIO pin number.
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348 * @param index GPIO interrupt number.
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350 void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);
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352 #endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */
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356 #if defined(__cplusplus)
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364 #endif /* _LPC_GPIO_H_*/
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