2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
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3 * Copyright 2016-2019 NXP
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4 * All rights reserved.
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6 * SPDX-License-Identifier: BSD-3-Clause
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9 #ifndef _FSL_IOCON_H_
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10 #define _FSL_IOCON_H_
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12 #include "fsl_common.h"
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15 * @addtogroup lpc_iocon
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21 /*******************************************************************************
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23 ******************************************************************************/
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25 /* Component ID definition, used by tools. */
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26 #ifndef FSL_COMPONENT_ID
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27 #define FSL_COMPONENT_ID "platform.drivers.lpc_iocon"
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30 /*! @name Driver version */
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32 /*! @brief IOCON driver version 2.1.1. */
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33 #define FSL_IOCON_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
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37 * @brief Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format
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39 typedef struct _iocon_group
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41 uint32_t port : 8; /* Pin port */
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42 uint32_t pin : 8; /* Pin number */
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43 uint32_t ionumber : 8; /* IO number */
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44 uint32_t modefunc : 16; /* Function and mode */
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48 * @brief IOCON function and mode selection definitions
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49 * @note See the User Manual for specific modes and functions supported by the various pins.
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51 #if defined(FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH) && (FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH == 4)
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52 #define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
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53 #define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
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54 #define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
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55 #define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
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56 #define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
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57 #define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
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58 #define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
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59 #define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
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60 #define IOCON_FUNC8 0x8 /*!< Selects pin function 8 */
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61 #define IOCON_FUNC9 0x9 /*!< Selects pin function 9 */
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62 #define IOCON_FUNC10 0xA /*!< Selects pin function 10 */
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63 #define IOCON_FUNC11 0xB /*!< Selects pin function 11 */
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64 #define IOCON_FUNC12 0xC /*!< Selects pin function 12 */
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65 #define IOCON_FUNC13 0xD /*!< Selects pin function 13 */
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66 #define IOCON_FUNC14 0xE /*!< Selects pin function 14 */
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67 #define IOCON_FUNC15 0xF /*!< Selects pin function 15 */
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68 #if defined(IOCON_PIO_MODE_SHIFT)
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69 #define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
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70 #define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
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71 #define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
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72 #define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
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75 #if defined(IOCON_PIO_I2CSLEW_SHIFT)
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76 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
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77 #define IOCON_I2C_SLEW (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
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80 #if defined(IOCON_PIO_EGP_SHIFT)
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81 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
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82 #define IOCON_I2C_SLEW (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
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85 #if defined(IOCON_PIO_SLEW_SHIFT)
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86 #define IOCON_SLEW_STANDARD (0x0 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
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87 #define IOCON_SLEW_FAST (0x1 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
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90 #if defined(IOCON_PIO_INVERT_SHIFT)
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91 #define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
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94 #if defined(IOCON_PIO_DIGIMODE_SHIFT)
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95 #define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
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96 #define IOCON_DIGITAL_EN \
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97 (0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
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100 #if defined(IOCON_PIO_FILTEROFF_SHIFT)
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101 #define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
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102 #define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
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105 #if defined(IOCON_PIO_I2CDRIVE_SHIFT)
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106 #define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
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107 #define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
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110 #if defined(IOCON_PIO_OD_SHIFT)
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111 #define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
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114 #if defined(IOCON_PIO_I2CFILTER_SHIFT)
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115 #define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
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116 #define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled, */
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119 #if defined(IOCON_PIO_ASW_SHIFT)
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120 #define IOCON_AWS_EN (0x1 << IOCON_PIO_ASW_SHIFT) /*!< Enables analog switch function */
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123 #if defined(IOCON_PIO_SSEL_SHIFT)
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124 #define IOCON_SSEL_3V3 (0x0 << IOCON_PIO_SSEL_SHIFT) /*!< 3V3 signaling in I2C mode */
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125 #define IOCON_SSEL_1V8 (0x1 << IOCON_PIO_SSEL_SHIFT) /*!< 1V8 signaling in I2C mode */
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128 #if defined(IOCON_PIO_ECS_SHIFT)
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129 #define IOCON_ECS_OFF (0x0 << IOCON_PIO_ECS_SHIFT) /*!< IO is an open drain cell */
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130 #define IOCON_ECS_ON (0x1 << IOCON_PIO_ECS_SHIFT) /*!< Pull-up resistor is connected */
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133 #if defined(IOCON_PIO_S_MODE_SHIFT)
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134 #define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
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135 #define IOCON_S_MODE_1CLK \
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136 (0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
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138 #define IOCON_S_MODE_2CLK \
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139 (0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
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141 #define IOCON_S_MODE_3CLK \
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142 (0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
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144 #define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
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147 #if defined(IOCON_PIO_CLK_DIV_SHIFT)
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148 #define IOCON_CLKDIV(div) \
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150 << IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
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154 #define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
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155 #define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
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156 #define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
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157 #define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
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158 #define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
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159 #define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
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160 #define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
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161 #define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
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163 #if defined(IOCON_PIO_MODE_SHIFT)
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164 #define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
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165 #define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
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166 #define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
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167 #define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
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170 #if defined(IOCON_PIO_I2CSLEW_SHIFT)
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171 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
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172 #define IOCON_I2C_SLEW (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
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175 #if defined(IOCON_PIO_EGP_SHIFT)
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176 #define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
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177 #define IOCON_I2C_SLEW (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
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180 #if defined(IOCON_PIO_INVERT_SHIFT)
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181 #define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
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184 #if defined(IOCON_PIO_DIGIMODE_SHIFT)
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185 #define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
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186 #define IOCON_DIGITAL_EN \
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187 (0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
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190 #if defined(IOCON_PIO_FILTEROFF_SHIFT)
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191 #define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
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192 #define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
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195 #if defined(IOCON_PIO_I2CDRIVE_SHIFT)
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196 #define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
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197 #define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
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200 #if defined(IOCON_PIO_OD_SHIFT)
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201 #define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
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204 #if defined(IOCON_PIO_I2CFILTER_SHIFT)
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205 #define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
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206 #define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled */
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209 #if defined(IOCON_PIO_S_MODE_SHIFT)
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210 #define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
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211 #define IOCON_S_MODE_1CLK \
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212 (0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
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214 #define IOCON_S_MODE_2CLK \
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215 (0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
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217 #define IOCON_S_MODE_3CLK \
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218 (0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
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220 #define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
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223 #if defined(IOCON_PIO_CLK_DIV_SHIFT)
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224 #define IOCON_CLKDIV(div) \
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226 << IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
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230 #if defined(__cplusplus)
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234 #if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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236 * @brief Sets I/O Control pin mux
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237 * @param base : The base of IOCON peripheral on the chip
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238 * @param ionumber : GPIO number to mux
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239 * @param modefunc : OR'ed values of type IOCON_*
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242 __STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
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244 base->PIO[ionumber] = modefunc;
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248 * @brief Sets I/O Control pin mux
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249 * @param base : The base of IOCON peripheral on the chip
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250 * @param port : GPIO port to mux
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251 * @param pin : GPIO pin to mux
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252 * @param modefunc : OR'ed values of type IOCON_*
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255 __STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
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257 base->PIO[port][pin] = modefunc;
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262 * @brief Set all I/O Control pin muxing
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263 * @param base : The base of IOCON peripheral on the chip
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264 * @param pinArray : Pointer to array of pin mux selections
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265 * @param arrayLength : Number of entries in pinArray
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268 __STATIC_INLINE void IOCON_SetPinMuxing(IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
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272 for (i = 0; i < arrayLength; i++)
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274 #if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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275 IOCON_PinMuxSet(base, pinArray[i].ionumber, pinArray[i].modefunc);
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277 IOCON_PinMuxSet(base, pinArray[i].port, pinArray[i].pin, pinArray[i].modefunc);
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278 #endif /* FSL_FEATURE_IOCON_ONE_DIMENSION */
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284 #if defined(__cplusplus)
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288 #endif /* _FSL_IOCON_H_ */
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