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[freertos] / FreeRTOS / Demo / CORTEX_MPU_Simulator_Keil_GCC / GCC_Specific / RegTest.c
1 /*\r
2     FreeRTOS V9.0.0rc2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     This file is part of the FreeRTOS distribution.\r
8 \r
9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
10     the terms of the GNU General Public License (version 2) as published by the\r
11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
12 \r
13     ***************************************************************************\r
14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
16     >>!   obliged to provide the source code for proprietary components     !<<\r
17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
18     ***************************************************************************\r
19 \r
20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
23     link: http://www.freertos.org/a00114.html\r
24 \r
25     ***************************************************************************\r
26      *                                                                       *\r
27      *    FreeRTOS provides completely free yet professionally developed,    *\r
28      *    robust, strictly quality controlled, supported, and cross          *\r
29      *    platform software that is more than just the market leader, it     *\r
30      *    is the industry's de facto standard.                               *\r
31      *                                                                       *\r
32      *    Help yourself get started quickly while simultaneously helping     *\r
33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
34      *    tutorial book, reference manual, or both:                          *\r
35      *    http://www.FreeRTOS.org/Documentation                              *\r
36      *                                                                       *\r
37     ***************************************************************************\r
38 \r
39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
41     defined configASSERT()?\r
42 \r
43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
44     embedded software for free we request you assist our global community by\r
45     participating in the support forum.\r
46 \r
47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
48     be as productive as possible as early as possible.  Now you can receive\r
49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
50     Ltd, and the world's leading authority on the world's leading RTOS.\r
51 \r
52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
55 \r
56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
58 \r
59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
61     licenses offer ticketed support, indemnification and commercial middleware.\r
62 \r
63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
64     engineered and independently SIL3 certified version for use in safety and\r
65     mission critical applications that require provable dependability.\r
66 \r
67     1 tab == 4 spaces!\r
68 */\r
69 \r
70 /* FreeRTOS includes. */\r
71 #include "FreeRTOS.h"\r
72 #include "queue.h"\r
73 \r
74 /*\r
75  * "Reg test" tasks - These fill the registers with known values, then check\r
76  * that each register maintains its expected value for the lifetime of the\r
77  * task.  Each task uses a different set of values.  The reg test tasks execute\r
78  * with a very low priority, so get preempted very frequently.  A register\r
79  * containing an unexpected value is indicative of an error in the context\r
80  * switching mechanism.\r
81  */\r
82 \r
83 void vRegTest1Implementation( void *pvParameters );\r
84 void vRegTest2Implementation( void *pvParameters );\r
85 void vRegTest3Implementation( void ) __attribute__ ((naked));\r
86 void vRegTest4Implementation( void ) __attribute__ ((naked));\r
87 \r
88 /*\r
89  * Used as an easy way of deleting a task from inline assembly.\r
90  */\r
91 extern void vMainDeleteMe( void ) __attribute__((noinline));\r
92 \r
93 /*\r
94  * Used by the first two reg test tasks and a software timer callback function\r
95  * to send messages to the check task.  The message just lets the check task\r
96  * know that the tasks and timer are still functioning correctly.  If a reg test\r
97  * task detects an error it will delete itself, and in so doing prevent itself\r
98  * from sending any more 'I'm Alive' messages to the check task.\r
99  */\r
100 extern void vMainSendImAlive( QueueHandle_t xHandle, uint32_t ulTaskNumber );\r
101 \r
102 /* The queue used to send a message to the check task. */\r
103 extern QueueHandle_t xGlobalScopeCheckQueue;\r
104 \r
105 /*-----------------------------------------------------------*/\r
106 \r
107 void vRegTest1Implementation( void *pvParameters )\r
108 {\r
109 /* This task is created in privileged mode so can access the file scope\r
110 queue variable.  Take a stack copy of this before the task is set into user\r
111 mode.  Once this task is in user mode the file scope queue variable will no\r
112 longer be accessible but the stack copy will. */\r
113 QueueHandle_t xQueue = xGlobalScopeCheckQueue;\r
114 \r
115         /* Now the queue handle has been obtained the task can switch to user\r
116         mode.  This is just one method of passing a handle into a protected\r
117         task, the other reg test task uses the task parameter instead. */\r
118         portSWITCH_TO_USER_MODE();\r
119 \r
120         /* First check that the parameter value is as expected. */\r
121         if( pvParameters != ( void * ) configREG_TEST_TASK_1_PARAMETER )\r
122         {\r
123                 /* Error detected.  Delete the task so it stops communicating with\r
124                 the check task. */\r
125                 vMainDeleteMe();\r
126         }\r
127 \r
128         for( ;; )\r
129         {\r
130                 /* This task tests the kernel context switch mechanism by reading and\r
131                 writing directly to registers - which requires the test to be written\r
132                 in assembly code. */\r
133                 __asm volatile\r
134                 (\r
135                         "               MOV     R4, #104                        \n" /* Set registers to a known value.  R0 to R1 are done in the loop below. */\r
136                         "               MOV     R5, #105                        \n"\r
137                         "               MOV     R6, #106                        \n"\r
138                         "               MOV     R8, #108                        \n"\r
139                         "               MOV     R9, #109                        \n"\r
140                         "               MOV     R10, #110                       \n"\r
141                         "               MOV     R11, #111                       \n"\r
142                         "reg1loop:                                              \n"\r
143                         "               MOV     R0, #100                        \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
144                         "               MOV     R1, #101                        \n"\r
145                         "               MOV     R2, #102                        \n"\r
146                         "               MOV R3, #103                    \n"\r
147                         "               MOV     R12, #112                       \n"\r
148                         "               SVC #1                                  \n" /* Yield just to increase test coverage. */\r
149                         "               CMP     R0, #100                        \n" /* Check all the registers still contain their expected values. */\r
150                         "               BNE     vMainDeleteMe           \n" /* Value was not as expected, delete the task so it stops communicating with the check task. */\r
151                         "               CMP     R1, #101                        \n"\r
152                         "               BNE     vMainDeleteMe           \n"\r
153                         "               CMP     R2, #102                        \n"\r
154                         "               BNE     vMainDeleteMe           \n"\r
155                         "               CMP R3, #103                    \n"\r
156                         "               BNE     vMainDeleteMe           \n"\r
157                         "               CMP     R4, #104                        \n"\r
158                         "               BNE     vMainDeleteMe           \n"\r
159                         "               CMP     R5, #105                        \n"\r
160                         "               BNE     vMainDeleteMe           \n"\r
161                         "               CMP     R6, #106                        \n"\r
162                         "               BNE     vMainDeleteMe           \n"\r
163                         "               CMP     R8, #108                        \n"\r
164                         "               BNE     vMainDeleteMe           \n"\r
165                         "               CMP     R9, #109                        \n"\r
166                         "               BNE     vMainDeleteMe           \n"\r
167                         "               CMP     R10, #110                       \n"\r
168                         "               BNE     vMainDeleteMe           \n"\r
169                         "               CMP     R11, #111                       \n"\r
170                         "               BNE     vMainDeleteMe           \n"\r
171                         "               CMP     R12, #112                       \n"\r
172                         "               BNE     vMainDeleteMe           \n"\r
173                         :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
174                 );\r
175 \r
176                 /* Send configREG_TEST_1_STILL_EXECUTING to the check task to indicate that this\r
177                 task is still functioning. */\r
178                 vMainSendImAlive( xQueue, configREG_TEST_1_STILL_EXECUTING );\r
179 \r
180                 /* Go back to check all the register values again. */\r
181                 __asm volatile( "               B reg1loop      " );\r
182         }\r
183 }\r
184 /*-----------------------------------------------------------*/\r
185 \r
186 void vRegTest2Implementation( void *pvParameters )\r
187 {\r
188 /* The queue handle is passed in as the task parameter.  This is one method of\r
189 passing data into a protected task, the other reg test task uses a different\r
190 method. */\r
191 QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters;\r
192 \r
193         for( ;; )\r
194         {\r
195                 /* This task tests the kernel context switch mechanism by reading and\r
196                 writing directly to registers - which requires the test to be written\r
197                 in assembly code. */\r
198                 __asm volatile\r
199                 (\r
200                         "               MOV     R4, #4                          \n" /* Set registers to a known value.  R0 to R1 are done in the loop below. */\r
201                         "               MOV     R5, #5                          \n"\r
202                         "               MOV     R6, #6                          \n"\r
203                         "               MOV     R8, #8                          \n" /* Frame pointer is omitted as it must not be changed. */\r
204                         "               MOV     R9, #9                          \n"\r
205                         "               MOV     R10, 10                         \n"\r
206                         "               MOV     R11, #11                        \n"\r
207                         "reg2loop:                                              \n"\r
208                         "               MOV     R0, #13                         \n" /* Set the scratch registers to known values - done inside the loop as they get clobbered. */\r
209                         "               MOV     R1, #1                          \n"\r
210                         "               MOV     R2, #2                          \n"\r
211                         "               MOV R3, #3                              \n"\r
212                         "               MOV     R12, #12                        \n"\r
213                         "               CMP     R0, #13                         \n" /* Check all the registers still contain their expected values. */\r
214                         "               BNE     vMainDeleteMe           \n" /* Value was not as expected, delete the task so it stops communicating with the check task */\r
215                         "               CMP     R1, #1                          \n"\r
216                         "               BNE     vMainDeleteMe           \n"\r
217                         "               CMP     R2, #2                          \n"\r
218                         "               BNE     vMainDeleteMe           \n"\r
219                         "               CMP R3, #3                              \n"\r
220                         "               BNE     vMainDeleteMe           \n"\r
221                         "               CMP     R4, #4                          \n"\r
222                         "               BNE     vMainDeleteMe           \n"\r
223                         "               CMP     R5, #5                          \n"\r
224                         "               BNE     vMainDeleteMe           \n"\r
225                         "               CMP     R6, #6                          \n"\r
226                         "               BNE     vMainDeleteMe           \n"\r
227                         "               CMP     R8, #8                          \n"\r
228                         "               BNE     vMainDeleteMe           \n"\r
229                         "               CMP     R9, #9                          \n"\r
230                         "               BNE     vMainDeleteMe           \n"\r
231                         "               CMP     R10, #10                        \n"\r
232                         "               BNE     vMainDeleteMe           \n"\r
233                         "               CMP     R11, #11                        \n"\r
234                         "               BNE     vMainDeleteMe           \n"\r
235                         "               CMP     R12, #12                        \n"\r
236                         "               BNE     vMainDeleteMe           \n"\r
237                         :::"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r8", "r9", "r10", "r11", "r12"\r
238                 );\r
239 \r
240                 /* Send configREG_TEST_2_STILL_EXECUTING to the check task to indicate that this\r
241                 task is still functioning. */\r
242                 vMainSendImAlive( xQueue, configREG_TEST_2_STILL_EXECUTING );\r
243 \r
244                 /* Go back to check all the register values again. */\r
245                 __asm volatile( "               B reg2loop      " );\r
246         }\r
247 }\r
248 /*-----------------------------------------------------------*/\r
249 \r
250 void vRegTest3Implementation( void )\r
251 {\r
252         __asm volatile\r
253         (\r
254                 ".extern pulRegTest3LoopCounter \n"\r
255                 "/* Fill the core registers with known values. */               \n"\r
256                 "mov    r0, #100                        \n"\r
257                 "mov    r1, #101                        \n"\r
258                 "mov    r2, #102                        \n"\r
259                 "mov    r3, #103                        \n"\r
260                 "mov    r4, #104                        \n"\r
261                 "mov    r5, #105                        \n"\r
262                 "mov    r6, #106                        \n"\r
263                 "mov    r7, #107                        \n"\r
264                 "mov    r8, #108                        \n"\r
265                 "mov    r9, #109                        \n"\r
266                 "mov    r10, #110                       \n"\r
267                 "mov    r11, #111                       \n"\r
268                 "mov    r12, #112                       \n"\r
269 \r
270                 "/* Fill the VFP registers with known values. */                \n"\r
271                 "vmov   d0, r0, r1                      \n"\r
272                 "vmov   d1, r2, r3                      \n"\r
273                 "vmov   d2, r4, r5                      \n"\r
274                 "vmov   d3, r6, r7                      \n"\r
275                 "vmov   d4, r8, r9                      \n"\r
276                 "vmov   d5, r10, r11            \n"\r
277                 "vmov   d6, r0, r1                      \n"\r
278                 "vmov   d7, r2, r3                      \n"\r
279                 "vmov   d8, r4, r5                      \n"\r
280                 "vmov   d9, r6, r7                      \n"\r
281                 "vmov   d10, r8, r9                     \n"\r
282                 "vmov   d11, r10, r11           \n"\r
283                 "vmov   d12, r0, r1                     \n"\r
284                 "vmov   d13, r2, r3                     \n"\r
285                 "vmov   d14, r4, r5                     \n"\r
286                 "vmov   d15, r6, r7                     \n"\r
287 \r
288         "reg1_loop:                                             \n"\r
289                 "/* Check all the VFP registers still contain the values set above.             \n"\r
290                 "First save registers that are clobbered by the test. */                                \n"\r
291                 "push { r0-r1 }                         \n"\r
292 \r
293                 "vmov   r0, r1, d0                      \n"\r
294                 "cmp    r0, #100                        \n"\r
295                 "bne    reg1_error_loopf        \n"\r
296                 "cmp    r1, #101                        \n"\r
297                 "bne    reg1_error_loopf        \n"\r
298                 "vmov   r0, r1, d1                      \n"\r
299                 "cmp    r0, #102                        \n"\r
300                 "bne    reg1_error_loopf        \n"\r
301                 "cmp    r1, #103                        \n"\r
302                 "bne    reg1_error_loopf        \n"\r
303                 "vmov   r0, r1, d2                      \n"\r
304                 "cmp    r0, #104                        \n"\r
305                 "bne    reg1_error_loopf        \n"\r
306                 "cmp    r1, #105                        \n"\r
307                 "bne    reg1_error_loopf        \n"\r
308                 "vmov   r0, r1, d3                      \n"\r
309                 "cmp    r0, #106                        \n"\r
310                 "bne    reg1_error_loopf        \n"\r
311                 "cmp    r1, #107                        \n"\r
312                 "bne    reg1_error_loopf        \n"\r
313                 "vmov   r0, r1, d4                      \n"\r
314                 "cmp    r0, #108                        \n"\r
315                 "bne    reg1_error_loopf        \n"\r
316                 "cmp    r1, #109                        \n"\r
317                 "bne    reg1_error_loopf        \n"\r
318                 "vmov   r0, r1, d5                      \n"\r
319                 "cmp    r0, #110                        \n"\r
320                 "bne    reg1_error_loopf        \n"\r
321                 "cmp    r1, #111                        \n"\r
322                 "bne    reg1_error_loopf        \n"\r
323                 "vmov   r0, r1, d6                      \n"\r
324                 "cmp    r0, #100                        \n"\r
325                 "bne    reg1_error_loopf        \n"\r
326                 "cmp    r1, #101                        \n"\r
327                 "bne    reg1_error_loopf        \n"\r
328                 "vmov   r0, r1, d7                      \n"\r
329                 "cmp    r0, #102                        \n"\r
330                 "bne    reg1_error_loopf        \n"\r
331                 "cmp    r1, #103                        \n"\r
332                 "bne    reg1_error_loopf        \n"\r
333                 "vmov   r0, r1, d8                      \n"\r
334                 "cmp    r0, #104                        \n"\r
335                 "bne    reg1_error_loopf        \n"\r
336                 "cmp    r1, #105                        \n"\r
337                 "bne    reg1_error_loopf        \n"\r
338                 "vmov   r0, r1, d9                      \n"\r
339                 "cmp    r0, #106                        \n"\r
340                 "bne    reg1_error_loopf        \n"\r
341                 "cmp    r1, #107                        \n"\r
342                 "bne    reg1_error_loopf        \n"\r
343                 "vmov   r0, r1, d10                     \n"\r
344                 "cmp    r0, #108                        \n"\r
345                 "bne    reg1_error_loopf        \n"\r
346                 "cmp    r1, #109                        \n"\r
347                 "bne    reg1_error_loopf        \n"\r
348                 "vmov   r0, r1, d11                     \n"\r
349                 "cmp    r0, #110                        \n"\r
350                 "bne    reg1_error_loopf        \n"\r
351                 "cmp    r1, #111                        \n"\r
352                 "bne    reg1_error_loopf        \n"\r
353                 "vmov   r0, r1, d12                     \n"\r
354                 "cmp    r0, #100                        \n"\r
355                 "bne    reg1_error_loopf        \n"\r
356                 "cmp    r1, #101                        \n"\r
357                 "bne    reg1_error_loopf        \n"\r
358                 "vmov   r0, r1, d13                     \n"\r
359                 "cmp    r0, #102                        \n"\r
360                 "bne    reg1_error_loopf        \n"\r
361                 "cmp    r1, #103                        \n"\r
362                 "bne    reg1_error_loopf        \n"\r
363                 "vmov   r0, r1, d14                     \n"\r
364                 "cmp    r0, #104                        \n"\r
365                 "bne    reg1_error_loopf        \n"\r
366                 "cmp    r1, #105                        \n"\r
367                 "bne    reg1_error_loopf        \n"\r
368                 "vmov   r0, r1, d15                     \n"\r
369                 "cmp    r0, #106                        \n"\r
370                 "bne    reg1_error_loopf        \n"\r
371                 "cmp    r1, #107                        \n"\r
372                 "bne    reg1_error_loopf        \n"\r
373 \r
374                 "/* Restore the registers that were clobbered by the test. */           \n"\r
375                 "pop    {r0-r1}                         \n"\r
376 \r
377                 "/* VFP register test passed.  Jump to the core register test. */       \n"\r
378                 "b              reg1_loopf_pass         \n"\r
379 \r
380         "reg1_error_loopf:                              \n"\r
381                 "/* If this line is hit then a VFP register value was found to be incorrect. */         \n"\r
382                 "b reg1_error_loopf                     \n"\r
383 \r
384         "reg1_loopf_pass:                               \n"\r
385 \r
386                 "cmp    r0, #100                        \n"\r
387                 "bne    reg1_error_loop         \n"\r
388                 "cmp    r1, #101                        \n"\r
389                 "bne    reg1_error_loop         \n"\r
390                 "cmp    r2, #102                        \n"\r
391                 "bne    reg1_error_loop         \n"\r
392                 "cmp    r3, #103                        \n"\r
393                 "bne    reg1_error_loop         \n"\r
394                 "cmp    r4, #104                        \n"\r
395                 "bne    reg1_error_loop         \n"\r
396                 "cmp    r5, #105                        \n"\r
397                 "bne    reg1_error_loop         \n"\r
398                 "cmp    r6, #106                        \n"\r
399                 "bne    reg1_error_loop         \n"\r
400                 "cmp    r7, #107                        \n"\r
401                 "bne    reg1_error_loop         \n"\r
402                 "cmp    r8, #108                        \n"\r
403                 "bne    reg1_error_loop         \n"\r
404                 "cmp    r9, #109                        \n"\r
405                 "bne    reg1_error_loop         \n"\r
406                 "cmp    r10, #110                       \n"\r
407                 "bne    reg1_error_loop         \n"\r
408                 "cmp    r11, #111                       \n"\r
409                 "bne    reg1_error_loop         \n"\r
410                 "cmp    r12, #112                       \n"\r
411                 "bne    reg1_error_loop         \n"\r
412 \r
413                 "/* Everything passed, increment the loop counter. */   \n"\r
414                 "push   { r0-r1 }                       \n"\r
415                 "ldr    r0, =pulRegTest3LoopCounter     \n"\r
416                 "ldr    r0, [r0]                        \n"\r
417                 "ldr    r1, [r0]                        \n"\r
418                 "adds   r1, r1, #1                      \n"\r
419                 "str    r1, [r0]                        \n"\r
420                 "pop    { r0-r1 }                       \n"\r
421 \r
422                 "/* Start again. */                     \n"\r
423                 "b              reg1_loop                       \n"\r
424 \r
425         "reg1_error_loop:                               \n"\r
426                 "/* If this line is hit then there was an error in a core register value. \n"\r
427                 "The loop ensures the loop counter stops incrementing. */       \n"\r
428                 "b      reg1_error_loop                 \n"\r
429                 "nop                                            "\r
430         ); /* __asm volatile. */\r
431 }\r
432 /*-----------------------------------------------------------*/\r
433 \r
434 void vRegTest4Implementation( void )\r
435 {\r
436         __asm volatile\r
437         (\r
438                 ".extern pulRegTest4LoopCounter \n"\r
439                 "/* Set all the core registers to known values. */      \n"\r
440                 "mov    r0, #-1                         \n"\r
441                 "mov    r1, #1                          \n"\r
442                 "mov    r2, #2                          \n"\r
443                 "mov    r3, #3                          \n"\r
444                 "mov    r4, #4                          \n"\r
445                 "mov    r5, #5                          \n"\r
446                 "mov    r6, #6                          \n"\r
447                 "mov    r7, #7                          \n"\r
448                 "mov    r8, #8                          \n"\r
449                 "mov    r9, #9                          \n"\r
450                 "mov    r10, #10                        \n"\r
451                 "mov    r11, #11                        \n"\r
452                 "mov    r12, #12                        \n"\r
453 \r
454                 "/* Set all the VFP to known values. */  \n"\r
455                 "vmov   d0, r0, r1                      \n"\r
456                 "vmov   d1, r2, r3                      \n"\r
457                 "vmov   d2, r4, r5                      \n"\r
458                 "vmov   d3, r6, r7                      \n"\r
459                 "vmov   d4, r8, r9                      \n"\r
460                 "vmov   d5, r10, r11            \n"\r
461                 "vmov   d6, r0, r1                      \n"\r
462                 "vmov   d7, r2, r3                      \n"\r
463                 "vmov   d8, r4, r5                      \n"\r
464                 "vmov   d9, r6, r7                      \n"\r
465                 "vmov   d10, r8, r9                     \n"\r
466                 "vmov   d11, r10, r11           \n"\r
467                 "vmov   d12, r0, r1                     \n"\r
468                 "vmov   d13, r2, r3                     \n"\r
469                 "vmov   d14, r4, r5                     \n"\r
470                 "vmov   d15, r6, r7                     \n"\r
471 \r
472         "reg2_loop:                                             \n"\r
473 \r
474                 "/* Check all the VFP registers still contain the values set above.             \n"\r
475                 "First save registers that are clobbered by the test. */                                \n"\r
476                 "push { r0-r1 }                         \n"\r
477 \r
478                 "vmov   r0, r1, d0                      \n"\r
479                 "cmp    r0, #-1                         \n"\r
480                 "bne    reg2_error_loopf        \n"\r
481                 "cmp    r1, #1                          \n"\r
482                 "bne    reg2_error_loopf        \n"\r
483                 "vmov   r0, r1, d1                      \n"\r
484                 "cmp    r0, #2                          \n"\r
485                 "bne    reg2_error_loopf        \n"\r
486                 "cmp    r1, #3                          \n"\r
487                 "bne    reg2_error_loopf        \n"\r
488                 "vmov   r0, r1, d2                      \n"\r
489                 "cmp    r0, #4                          \n"\r
490                 "bne    reg2_error_loopf        \n"\r
491                 "cmp    r1, #5                          \n"\r
492                 "bne    reg2_error_loopf        \n"\r
493                 "vmov   r0, r1, d3                      \n"\r
494                 "cmp    r0, #6                          \n"\r
495                 "bne    reg2_error_loopf        \n"\r
496                 "cmp    r1, #7                          \n"\r
497                 "bne    reg2_error_loopf        \n"\r
498                 "vmov   r0, r1, d4                      \n"\r
499                 "cmp    r0, #8                          \n"\r
500                 "bne    reg2_error_loopf        \n"\r
501                 "cmp    r1, #9                          \n"\r
502                 "bne    reg2_error_loopf        \n"\r
503                 "vmov   r0, r1, d5                      \n"\r
504                 "cmp    r0, #10                         \n"\r
505                 "bne    reg2_error_loopf        \n"\r
506                 "cmp    r1, #11                         \n"\r
507                 "bne    reg2_error_loopf        \n"\r
508                 "vmov   r0, r1, d6                      \n"\r
509                 "cmp    r0, #-1                         \n"\r
510                 "bne    reg2_error_loopf        \n"\r
511                 "cmp    r1, #1                          \n"\r
512                 "bne    reg2_error_loopf        \n"\r
513                 "vmov   r0, r1, d7                      \n"\r
514                 "cmp    r0, #2                          \n"\r
515                 "bne    reg2_error_loopf        \n"\r
516                 "cmp    r1, #3                          \n"\r
517                 "bne    reg2_error_loopf        \n"\r
518                 "vmov   r0, r1, d8                      \n"\r
519                 "cmp    r0, #4                          \n"\r
520                 "bne    reg2_error_loopf        \n"\r
521                 "cmp    r1, #5                          \n"\r
522                 "bne    reg2_error_loopf        \n"\r
523                 "vmov   r0, r1, d9                      \n"\r
524                 "cmp    r0, #6                          \n"\r
525                 "bne    reg2_error_loopf        \n"\r
526                 "cmp    r1, #7                          \n"\r
527                 "bne    reg2_error_loopf        \n"\r
528                 "vmov   r0, r1, d10                     \n"\r
529                 "cmp    r0, #8                          \n"\r
530                 "bne    reg2_error_loopf        \n"\r
531                 "cmp    r1, #9                          \n"\r
532                 "bne    reg2_error_loopf        \n"\r
533                 "vmov   r0, r1, d11                     \n"\r
534                 "cmp    r0, #10                         \n"\r
535                 "bne    reg2_error_loopf        \n"\r
536                 "cmp    r1, #11                         \n"\r
537                 "bne    reg2_error_loopf        \n"\r
538                 "vmov   r0, r1, d12                     \n"\r
539                 "cmp    r0, #-1                         \n"\r
540                 "bne    reg2_error_loopf        \n"\r
541                 "cmp    r1, #1                          \n"\r
542                 "bne    reg2_error_loopf        \n"\r
543                 "vmov   r0, r1, d13                     \n"\r
544                 "cmp    r0, #2                          \n"\r
545                 "bne    reg2_error_loopf        \n"\r
546                 "cmp    r1, #3                          \n"\r
547                 "bne    reg2_error_loopf        \n"\r
548                 "vmov   r0, r1, d14                     \n"\r
549                 "cmp    r0, #4                          \n"\r
550                 "bne    reg2_error_loopf        \n"\r
551                 "cmp    r1, #5                          \n"\r
552                 "bne    reg2_error_loopf        \n"\r
553                 "vmov   r0, r1, d15                     \n"\r
554                 "cmp    r0, #6                          \n"\r
555                 "bne    reg2_error_loopf        \n"\r
556                 "cmp    r1, #7                          \n"\r
557                 "bne    reg2_error_loopf        \n"\r
558 \r
559                 "/* Restore the registers that were clobbered by the test. */           \n"\r
560                 "pop    {r0-r1}                         \n"\r
561 \r
562                 "/* VFP register test passed.  Jump to the core register test. */               \n"\r
563                 "b              reg2_loopf_pass         \n"\r
564 \r
565         "reg2_error_loopf:                              \n"\r
566                 "/* If this line is hit then a VFP register value was found to be               \n"\r
567                 "incorrect. */                          \n"\r
568                 "b reg2_error_loopf                     \n"\r
569 \r
570         "reg2_loopf_pass:                               \n"\r
571 \r
572                 "cmp    r0, #-1                         \n"\r
573                 "bne    reg2_error_loop         \n"\r
574                 "cmp    r1, #1                          \n"\r
575                 "bne    reg2_error_loop         \n"\r
576                 "cmp    r2, #2                          \n"\r
577                 "bne    reg2_error_loop         \n"\r
578                 "cmp    r3, #3                          \n"\r
579                 "bne    reg2_error_loop         \n"\r
580                 "cmp    r4, #4                          \n"\r
581                 "bne    reg2_error_loop         \n"\r
582                 "cmp    r5, #5                          \n"\r
583                 "bne    reg2_error_loop         \n"\r
584                 "cmp    r6, #6                          \n"\r
585                 "bne    reg2_error_loop         \n"\r
586                 "cmp    r7, #7                          \n"\r
587                 "bne    reg2_error_loop         \n"\r
588                 "cmp    r8, #8                          \n"\r
589                 "bne    reg2_error_loop         \n"\r
590                 "cmp    r9, #9                          \n"\r
591                 "bne    reg2_error_loop         \n"\r
592                 "cmp    r10, #10                        \n"\r
593                 "bne    reg2_error_loop         \n"\r
594                 "cmp    r11, #11                        \n"\r
595                 "bne    reg2_error_loop         \n"\r
596                 "cmp    r12, #12                        \n"\r
597                 "bne    reg2_error_loop         \n"\r
598 \r
599                 "/* Increment the loop counter so the check task knows this task is \n"\r
600                 "still running. */                      \n"\r
601                 "push   { r0-r1 }                       \n"\r
602                 "ldr    r0, =pulRegTest4LoopCounter     \n"\r
603                 "ldr    r0, [r0]                        \n"\r
604                 "ldr    r1, [r0]                        \n"\r
605                 "adds   r1, r1, #1                      \n"\r
606                 "str    r1, [r0]                        \n"\r
607                 "pop { r0-r1 }                          \n"\r
608 \r
609                 "/* Yield to increase test coverage. */                 \n"\r
610                 "SVC #1                                         \n"\r
611 \r
612                 "/* Start again. */                     \n"\r
613                 "b reg2_loop                            \n"\r
614 \r
615         "reg2_error_loop:                               \n"\r
616                 "/* If this line is hit then there was an error in a core register value.       \n"\r
617                 "This loop ensures the loop counter variable stops incrementing. */                     \n"\r
618                 "b reg2_error_loop                      \n"\r
619         ); /* __asm volatile */\r
620 }\r
621 /*-----------------------------------------------------------*/\r
622 \r
623 /* Fault handlers are here for convenience as they use compiler specific syntax\r
624 and this file is specific to the GCC compiler. */\r
625 void hard_fault_handler( uint32_t * hardfault_args )\r
626 {\r
627 volatile uint32_t stacked_r0;\r
628 volatile uint32_t stacked_r1;\r
629 volatile uint32_t stacked_r2;\r
630 volatile uint32_t stacked_r3;\r
631 volatile uint32_t stacked_r12;\r
632 volatile uint32_t stacked_lr;\r
633 volatile uint32_t stacked_pc;\r
634 volatile uint32_t stacked_psr;\r
635 \r
636         stacked_r0 = ((uint32_t) hardfault_args[ 0 ]);\r
637         stacked_r1 = ((uint32_t) hardfault_args[ 1 ]);\r
638         stacked_r2 = ((uint32_t) hardfault_args[ 2 ]);\r
639         stacked_r3 = ((uint32_t) hardfault_args[ 3 ]);\r
640 \r
641         stacked_r12 = ((uint32_t) hardfault_args[ 4 ]);\r
642         stacked_lr = ((uint32_t) hardfault_args[ 5 ]);\r
643         stacked_pc = ((uint32_t) hardfault_args[ 6 ]);\r
644         stacked_psr = ((uint32_t) hardfault_args[ 7 ]);\r
645 \r
646         /* Inspect stacked_pc to locate the offending instruction. */\r
647         for( ;; );\r
648 \r
649         ( void ) stacked_psr;\r
650         ( void ) stacked_pc;\r
651         ( void ) stacked_lr;\r
652         ( void ) stacked_r12;\r
653     ( void ) stacked_r0;\r
654     ( void ) stacked_r1;\r
655     ( void ) stacked_r2;\r
656     ( void ) stacked_r3;\r
657 }\r
658 /*-----------------------------------------------------------*/\r
659 \r
660 void HardFault_Handler( void ) __attribute__((naked));\r
661 void HardFault_Handler( void )\r
662 {\r
663         __asm volatile\r
664         (\r
665                 " tst lr, #4                                                                            \n"\r
666                 " ite eq                                                                                        \n"\r
667                 " mrseq r0, msp                                                                         \n"\r
668                 " mrsne r0, psp                                                                         \n"\r
669                 " ldr r1, [r0, #24]                                                                     \n"\r
670                 " ldr r2, handler_address_const                                         \n"\r
671                 " bx r2                                                                                         \n"\r
672                 " handler_address_const: .word hard_fault_handler       \n"\r
673         );\r
674 }\r
675 /*-----------------------------------------------------------*/\r
676 \r
677 void MemManage_Handler( void ) __attribute__((naked));\r
678 void MemManage_Handler( void )\r
679 {\r
680         __asm volatile\r
681         (\r
682                 " tst lr, #4                                                                            \n"\r
683                 " ite eq                                                                                        \n"\r
684                 " mrseq r0, msp                                                                         \n"\r
685                 " mrsne r0, psp                                                                         \n"\r
686                 " ldr r1, [r0, #24]                                                                     \n"\r
687                 " ldr r2, handler2_address_const                                        \n"\r
688                 " bx r2                                                                                         \n"\r
689                 " handler2_address_const: .word hard_fault_handler      \n"\r
690         );\r
691 }/*-----------------------------------------------------------*/\r
692 \r