2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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30 * This file contains the non-portable and therefore RZ/T specific parts of
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31 * the IntQueue standard demo task - namely the configuration of the timers
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32 * that generate the interrupts and the interrupt entry points.
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35 /* Scheduler includes. */
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36 #include "FreeRTOS.h"
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39 /* Demo includes. */
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40 #include "IntQueueTimer.h"
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41 #include "IntQueue.h"
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43 /* Renesas includes. */
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44 #include "r_cg_macrodriver.h"
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45 #include "r_cg_cmt.h"
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46 #include "r_reset.h"
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48 #define tmrCMT_1_CHANNEL_0_HZ ( 4000UL )
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49 #define tmrCMT_1_CHANNEL_1_HZ ( 2011UL )
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52 * Handlers for the two timers used. See the documentation page
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53 * for this port on TBD for more information on writing
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54 * interrupt handlers.
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56 void vCMT_1_Channel_0_ISR( void );
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57 void vCMT_1_Channel_1_ISR( void );
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60 * Entry point for the handlers. These set the pxISRFunction variable to point
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61 * to the C handler for each timer, then branch to the FreeRTOS IRQ handler.
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64 static void vCMT_1_Channel_0_ISR_Entry( void ) __attribute__((naked));
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65 static void vCMT_1_Channel_1_ISR_Entry( void ) __attribute__((naked));
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66 #endif /* __GNUC__ */
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68 /* IAR requires the entry point to be in an assembly file. The functions
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69 are implemented in $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm. */
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70 extern void vCMT_1_Channel_0_ISR_Entry( void );
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71 extern void vCMT_1_Channel_1_ISR_Entry( void );
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72 #endif /* __ICCARM__ */
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73 /*-----------------------------------------------------------*/
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75 void vInitialiseTimerForIntQueueTest( void )
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77 uint32_t ulCompareMatchValue;
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78 const uint32_t ulPeripheralClockDivider = 6UL, ulCMTClockDivider = 8UL;
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80 /* Disable CMI2 and CMI3 interrupts. */
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81 VIC.IEC0.LONG = ( 1UL << 23UL ) | ( 1UL << 24UL );
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83 /* Cancel CMT stop state in LPC. */
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84 r_rst_write_enable();
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86 r_rst_write_disable();
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88 /* Interrupt on compare match. */
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89 CMT2.CMCR.BIT.CMIE = 1;
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90 CMT3.CMCR.BIT.CMIE = 1;
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92 /* Calculate the compare match value. */
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93 ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;
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94 ulCompareMatchValue /= ulCMTClockDivider;
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95 ulCompareMatchValue /= tmrCMT_1_CHANNEL_0_HZ;
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96 ulCompareMatchValue -= 1UL;
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97 CMT2.CMCOR = ( unsigned short ) ulCompareMatchValue;
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99 ulCompareMatchValue = configCPU_CLOCK_HZ / ulPeripheralClockDivider;
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100 ulCompareMatchValue /= ulCMTClockDivider;
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101 ulCompareMatchValue /= tmrCMT_1_CHANNEL_1_HZ;
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102 ulCompareMatchValue -= 1UL;
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103 CMT3.CMCOR = ( unsigned short ) ulCompareMatchValue;
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105 /* Divide the PCLK by 8. */
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106 CMT2.CMCR.BIT.CKS = 0;
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107 CMT3.CMCR.BIT.CKS = 0;
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109 /* Clear count to 0. */
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113 /* Set CMI2 and CMI3 edge detection type. */
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114 VIC.PLS0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );
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116 /* Set CMI2 and CMI3 priority levels so they nest. */
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117 VIC.PRL23.LONG = _CMT_PRIORITY_LEVEL2;
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118 VIC.PRL24.LONG = _CMT_PRIORITY_LEVEL9;
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120 /* Set CMI2 and CMI3 interrupt address. */
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121 VIC.VAD23.LONG = ( uint32_t ) vCMT_1_Channel_0_ISR_Entry;
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122 VIC.VAD24.LONG = ( uint32_t ) vCMT_1_Channel_1_ISR_Entry;
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124 /* Enable CMI2 and CMI3 interrupts in ICU. */
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125 VIC.IEN0.LONG |= ( 1UL << 23UL ) | ( 1UL << 24UL );
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127 /* Start CMT1 channel 0 and 1 count. */
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128 CMT.CMSTR1.BIT.STR2 = 1U;
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129 CMT.CMSTR1.BIT.STR3 = 1U;
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131 /*-----------------------------------------------------------*/
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133 void vCMT_1_Channel_0_ISR( void )
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135 /* Clear the interrupt. */
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136 VIC.PIC0.LONG = ( 1UL << 23UL );
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138 /* Call the handler that is part of the common code - this is where the
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139 non-portable code ends and the actual test is performed. */
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140 portYIELD_FROM_ISR( xFirstTimerHandler() );
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142 /*-----------------------------------------------------------*/
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144 void vCMT_1_Channel_1_ISR( void )
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146 /* Clear the interrupt. */
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147 VIC.PIC0.LONG = ( 1UL << 24UL );
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149 /* Call the handler that is part of the common code - this is where the
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150 non-portable code ends and the actual test is performed. */
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151 portYIELD_FROM_ISR( xSecondTimerHandler() );
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153 /*-----------------------------------------------------------*/
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156 * The RZ/T vectors directly to a peripheral specific interrupt handler, rather
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157 * than using the Cortex-R IRQ vector. Therefore each interrupt handler
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158 * installed by the application must follow the examples below, which save a
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159 * pointer to a standard C function in the pxISRFunction variable, before
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160 * branching to the FreeRTOS IRQ handler. The FreeRTOS IRQ handler then manages
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161 * interrupt entry (including interrupt nesting), before calling the C function
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162 * saved in the pxISRFunction variable. NOTE: The entry points are naked
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163 * functions - do not add C code to these functions.
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165 * See http://www.freertos.org/Renesas_RZ-T_Cortex-R4F-RTOS.html
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168 /* The IAR equivalent is implemented in
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169 $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */
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170 static void vCMT_1_Channel_0_ISR_Entry( void )
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173 "PUSH {r0-r1} \t\n"
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174 "LDR r0, =pxISRFunction \t\n"
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175 "LDR r1, =vCMT_1_Channel_0_ISR \t\n"
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176 "STR r1, [r0] \t\n"
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178 "B FreeRTOS_IRQ_Handler "
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181 #endif /* __GNUC__ */
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182 /*-----------------------------------------------------------*/
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185 /* The IAR equivalent is implemented in
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186 $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */
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187 static void vCMT_1_Channel_1_ISR_Entry( void )
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190 "PUSH {r0-r1} \t\n"
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191 "LDR r0, =pxISRFunction \t\n"
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192 "LDR r1, =vCMT_1_Channel_1_ISR \t\n"
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193 "STR r1, [r0] \t\n"
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195 "B FreeRTOS_IRQ_Handler "
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198 #endif /* __GNUC__ */
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