git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/cg_src/r_cg_scifa_user.c

   1 /***********************************************************************************************************************\r
   2 * DISCLAIMER\r
   3 * This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.\r
   4 * No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all\r
   5 * applicable laws, including copyright laws.\r
   6 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED\r
   7 * OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\r
   8 * NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY\r
   9 * LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,\r
  10 * INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR\r
  11 * ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
  12 * Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability\r
  13 * of this software. By using this software, you agree to the additional terms and conditions found by accessing the\r
  14 * following link:\r
  15 * http://www.renesas.com/disclaimer\r
  16 *\r
  17 * Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.\r
  18 ***********************************************************************************************************************/\r
  19 \r
  20 /***********************************************************************************************************************\r
  21 * File Name    : r_cg_scifa_user.c\r
  22 * Version      : Code Generator for RZ/T1 V1.00.00.09 [02 Mar 2015]\r
  23 * Device(s)    : R7S910018CBG\r
  24 * Tool-Chain   : GCCARM\r
  25 * Description  : This file implements device driver for SCIF module.\r
  26 * Creation Date: 19/04/2015\r
  27 ***********************************************************************************************************************/\r
  28 \r
  29 /***********************************************************************************************************************\r
  30 Pragma directive\r
  31 ***********************************************************************************************************************/\r
  32 /* Start user code for pragma. Do not edit comment generated here */\r
  33 /* End user code. Do not edit comment generated here */\r
  34 \r
  35 /***********************************************************************************************************************\r
  36 Includes\r
  37 ***********************************************************************************************************************/\r
  38 #include "r_cg_macrodriver.h"\r
  39 #include "r_cg_scifa.h"\r
  40 /* Start user code for include. Do not edit comment generated here */\r
  41 #include "r_typedefs.h"\r
  42 #include "FreeRTOS.h"\r
  43 #include "task.h"\r
  44 #include "queue.h"\r
  45 #include "serial.h"\r
  46 /* End user code. Do not edit comment generated here */\r
  47 #include "r_cg_userdefine.h"\r
  48 \r
  49 /***********************************************************************************************************************\r
  50 Global variables and functions\r
  51 ***********************************************************************************************************************/\r
  52 extern const uint8_t * gp_scifa2_tx_address;   /* SCIFA2 send buffer address */\r
  53 extern uint16_t        g_scifa2_tx_count;      /* SCIFA2 send data number */\r
  54 extern uint8_t *       gp_scifa2_rx_address;   /* SCIFA2 receive buffer address */\r
  55 extern uint16_t        g_scifa2_rx_count;      /* SCIFA2 receive data number */\r
  56 extern uint16_t        g_scifa2_rx_length;     /* SCIFA2 receive data length */\r
  57 \r
  58 /* Start user code for global. Do not edit comment generated here */\r
  59 \r
  60 /* Characters received from the UART are stored in this queue, ready to be\r
  61 received by the application.  ***NOTE*** Using a queue in this way is very\r
  62 convenient, but also very inefficient.  It can be used here because characters\r
  63 will only arrive slowly.  In a higher bandwidth system a circular RAM buffer or\r
  64 DMA should be used in place of this queue. */\r
  65 static QueueHandle_t xRxQueue = NULL;\r
  66 \r
  67 /* When a task calls vSerialPutString() its handle is stored in xSendingTask,\r
  68 before being placed into the Blocked state (so does not use any CPU time) to\r
  69 wait for the transmission to end.  The task handle is then used from the UART\r
  70 transmit end interrupt to remove the task from the Blocked state. */\r
  71 static TaskHandle_t xSendingTask = NULL;\r
  72 \r
  73 /*\r
  74  * Entry point for the handlers.  These set the pxISRFunction variable to point\r
  75  * to the C handler for each timer, then branch to the FreeRTOS IRQ handler.\r
  76  */\r
  77 #ifdef __GNUC__\r
  78         void r_scifa2_txif2_interrupt_entry( void ) __attribute__((naked));\r
  79         void r_scifa2_rxif2_interrupt_entry( void ) __attribute__((naked));\r
  80         void r_scifa2_drif2_interrupt_entry( void ) __attribute__((naked));\r
  81         void r_scifa2_brif2_interrupt_entry( void ) __attribute__((naked));\r
  82 #endif /* __GNUC__ */\r
  83 \r
  84 #ifdef __ICCARM__\r
  85         /* IAR requires the entry point to be in an assembly file.  The functions\r
  86         are     implemented in $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm. */\r
  87         extern void r_scifa2_txif2_interrupt_entry( void );\r
  88         extern void r_scifa2_rxif2_interrupt_entry( void );\r
  89         extern void r_scifa2_drif2_interrupt_entry( void );\r
  90         extern void r_scifa2_brif2_interrupt_entry( void );\r
  91 #endif /* __ICCARM__ */\r
  92 \r
  93 \r
  94 /* End user code. Do not edit comment generated here */\r
  95 \r
  96 /***********************************************************************************************************************\r
  97 * Function Name: r_scifa2_txif2_interrupt\r
  98 * Description  : This function is TXIF2 interrupt service routine.\r
  99 * Arguments    : None\r
 100 * Return Value : None\r
 101 ***********************************************************************************************************************/\r
 102 void r_scifa2_txif2_interrupt(void)\r
 103 {\r
 104         uint16_t count = 0;\r
 105 \r
 106         /* Get the amount of untransmitted data stored in the FRDR register */\r
 107         uint16_t dummy_fdr = SCIFA2.FDR.BIT.T;\r
 108 \r
 109         /* Write data to the transmit FIFO data register */\r
 110         while ((g_scifa2_tx_count > 0U) && (count < _SCIF_FIFO_MAX_SIZE - dummy_fdr))\r
 111         {\r
 112                 SCIFA2.FTDR = *gp_scifa2_tx_address;\r
 113                 gp_scifa2_tx_address++;\r
 114                 g_scifa2_tx_count--;\r
 115                 count++;\r
 116         }\r
 117 \r
 118         if (SCIFA2.FSR.BIT.TDFE == 1U)\r
 119         {\r
 120                 SCIFA2.FSR.BIT.TDFE = 0U;\r
 121         }\r
 122 \r
 123         if (g_scifa2_tx_count <= 0U)\r
 124         {\r
 125                 SCIFA2.SCR.BIT.TIE = 0U;\r
 126                 SCIFA2.SCR.BIT.TEIE = 1U;\r
 127         }\r
 128 \r
 129         /* Wait the interrupt signal is disabled */\r
 130         while (0U != (VIC.IRQS3.LONG & 0x00008000UL))\r
 131         {\r
 132                 VIC.IEC3.LONG = 0x00008000UL;\r
 133         }\r
 134 \r
 135         VIC.IEN3.LONG |= 0x00008000UL;\r
 136 \r
 137         /* Dummy write */\r
 138         VIC.HVA0.LONG = 0x00000000UL;\r
 139 }\r
 140 /***********************************************************************************************************************\r
 141 * Function Name: r_scifa2_rxif2_interrupt\r
 142 * Description  : This function is RXIF2 interrupt service routine.\r
 143 * Arguments    : None\r
 144 * Return Value : None\r
 145 ***********************************************************************************************************************/\r
 146 void r_scifa2_rxif2_interrupt(void)\r
 147 {\r
 148         uint16_t count = 0;\r
 149 \r
 150         /* Get the amount of receive data stored in FRDR register */\r
 151         uint16_t dummy_fdr = SCIFA2.FDR.BIT.R;\r
 152 \r
 153         /* Read data from the receive FIFO data register */\r
 154         while ((g_scifa2_rx_length > g_scifa2_rx_count) && (count < dummy_fdr))\r
 155         {\r
 156                 *gp_scifa2_rx_address = SCIFA2.FRDR;\r
 157                 gp_scifa2_rx_address++;\r
 158                 g_scifa2_rx_count++;\r
 159                 count++;\r
 160         }\r
 161 \r
 162         /* If remaining data is less than the receive trigger number, receive interrupt will not occur.\r
 163            In this case, set trigger number to 1 to force receive interrupt for each one byte of data in FRDR */\r
 164         if ((g_scifa2_rx_length - g_scifa2_rx_count < _SCIF_RX_TRIG_NUM_2) && (SCIFA2.FTCR.BIT.RFTC != 1U))\r
 165         {\r
 166                 SCIFA2.FTCR.BIT.RFTC = 1U;\r
 167         }\r
 168 \r
 169         /* Clear receive FIFO data full flag */\r
 170         if (SCIFA2.FSR.BIT.RDF == 1U)\r
 171         {\r
 172                 SCIFA2.FSR.BIT.RDF = 0U;\r
 173         }\r
 174 \r
 175         if (g_scifa2_rx_length <= g_scifa2_rx_count)\r
 176         {\r
 177                 /* All data received */\r
 178                 SCIFA2.SCR.BIT.RE = 0U;\r
 179                 r_scifa2_callback_receiveend();\r
 180         }\r
 181 \r
 182         /* Wait the interrupt signal is disabled */\r
 183         while (0U != (VIC.IRQS3.LONG & 0x00004000UL))\r
 184         {\r
 185                 VIC.IEC3.LONG = 0x00004000UL;\r
 186         }\r
 187 \r
 188         VIC.IEN3.LONG |= 0x00004000UL;\r
 189 \r
 190         /* Dummy write */\r
 191         VIC.HVA0.LONG = 0x00000000UL;\r
 192 }\r
 193 /***********************************************************************************************************************\r
 194 * Function Name: r_scifa2_drif2_interrupt\r
 195 * Description  : This function is TEIF 2 or DRIF2 interrupt service routine.\r
 196 * Arguments    : None\r
 197 * Return Value : None\r
 198 ***********************************************************************************************************************/\r
 199 void r_scifa2_drif2_interrupt(void)\r
 200 {\r
 201         if (1U == SCIFA2.FSR.BIT.TEND)\r
 202         {\r
 203                 SCIFA2.SPTR.BIT.SPB2DT = 0U;\r
 204                 SCIFA2.SPTR.BIT.SPB2IO = 1U;\r
 205                 SCIFA2.SCR.BIT.TE = 0U;\r
 206                 SCIFA2.SCR.BIT.TEIE = 0U;\r
 207         }\r
 208         r_scifa2_callback_transmitend();\r
 209 \r
 210         /* Clear data ready detect flag */\r
 211         if (1U == SCIFA2.FSR.BIT.DR)\r
 212         {\r
 213         /* Start user code. Do not edit comment generated here */\r
 214         /* End user code. Do not edit comment generated here */\r
 215                 SCIFA2.FSR.BIT.DR = 0U;\r
 216         }\r
 217 \r
 218         /* Wait the interrupt signal is disabled */\r
 219         while (0U != (VIC.IRQS3.LONG & 0x00010000UL))\r
 220         {\r
 221                 VIC.IEC3.LONG = 0x00010000UL;\r
 222         }\r
 223 \r
 224         VIC.IEN3.LONG |= 0x00010000UL;\r
 225 \r
 226         /* Dummy write */\r
 227         VIC.HVA0.LONG = 0x00000000UL;\r
 228 }\r
 229 /***********************************************************************************************************************\r
 230 * Function Name: r_scifa2_brif2_interrupt\r
 231 * Description  : This function is BRIF2 or ERIF2 interrupt service routine.\r
 232 * Arguments    : None\r
 233 * Return Value : None\r
 234 ***********************************************************************************************************************/\r
 235 void r_scifa2_brif2_interrupt(void)\r
 236 {\r
 237         if (1U == SCIFA2.FSR.BIT.BRK)\r
 238         {\r
 239                 r_scifa2_callback_error(BREAK_DETECT);\r
 240                 /* Clear break detect flag */\r
 241                 SCIFA2.FSR.BIT.BRK = 0U;\r
 242         }\r
 243 \r
 244         if (1U == SCIFA2.FSR.BIT.ER)\r
 245         {\r
 246                 r_scifa2_callback_error(RECEIVE_ERROR);\r
 247                 /* Clear receive error flag */\r
 248                 SCIFA2.FSR.BIT.ER = 0U;\r
 249         }\r
 250 \r
 251         if (1U == SCIFA2.LSR.BIT.ORER)\r
 252         {\r
 253                 r_scifa2_callback_error(OVERRUN_ERROR);\r
 254                 /* Clear overrun error flag */\r
 255                 SCIFA2.LSR.BIT.ORER = 0U;\r
 256         }\r
 257 \r
 258         /* Wait the interrupt signal is disabled */\r
 259         while (0U != (VIC.IRQS3.LONG & 0x00002000UL))\r
 260         {\r
 261                 VIC.IEC3.LONG = 0x00002000UL;\r
 262         }\r
 263 \r
 264         VIC.IEN3.LONG |= 0x00002000UL;\r
 265 \r
 266         /* Dummy write */\r
 267         VIC.HVA0.LONG = 0x00000000UL;\r
 268 }\r
 269 /***********************************************************************************************************************\r
 270 * Function Name: r_scifa2_callback_transmitend\r
 271 * Description  : This function is a callback function when SCIFA2 finishes transmission.\r
 272 * Arguments    : None\r
 273 * Return Value : None\r
 274 ***********************************************************************************************************************/\r
 275 void r_scifa2_callback_transmitend(void)\r
 276 {\r
 277         /* Start user code. Do not edit comment generated here */\r
 278         BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
 279 \r
 280         if( xSendingTask != NULL )\r
 281         {\r
 282                 /* A task is waiting for the end of the Tx, unblock it now.\r
 283                 http://www.freertos.org/vTaskNotifyGiveFromISR.html */\r
 284                 vTaskNotifyGiveFromISR( xSendingTask, &xHigherPriorityTaskWoken );\r
 285                 xSendingTask = NULL;\r
 286 \r
 287                 portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
 288         }\r
 289 \r
 290         /* End user code. Do not edit comment generated here */\r
 291 }\r
 292 /***********************************************************************************************************************\r
 293 * Function Name: r_scifa2_callback_receiveend\r
 294 * Description  : This function is a callback function when SCIFA2 finishes reception.\r
 295 * Arguments    : None\r
 296 * Return Value : None\r
 297 ***********************************************************************************************************************/\r
 298 void r_scifa2_callback_receiveend(void)\r
 299 {\r
 300         /* Start user code. Do not edit comment generated here */\r
 301         uint8_t ucRxedChar = 0;\r
 302         BaseType_t xHigherPriorityTaskWoken = pdFALSE;\r
 303 \r
 304         /* Read the received data */\r
 305         ucRxedChar = SCIFA2.FRDR;\r
 306 \r
 307         /* Characters received from the UART are stored in this queue, ready to be\r
 308         received by the application.  ***NOTE*** Using a queue in this way is very\r
 309         convenient, but also very inefficient.  It can be used here because\r
 310         characters will only arrive slowly.  In a higher bandwidth system a circular\r
 311         RAM buffer or DMA should be used in place of this queue. */\r
 312         xQueueSendFromISR( xRxQueue, ( void * ) &ucRxedChar, &xHigherPriorityTaskWoken );\r
 313 \r
 314         /* Re-enable receptions */\r
 315         SCIFA2.SCR.BIT.RE = 1U;\r
 316 \r
 317         /* End user code. Do not edit comment generated here */\r
 318 }\r
 319 /***********************************************************************************************************************\r
 320 * Function Name: r_scifa2_callback_error\r
 321 * Description  : This function is a callback function when SCIFA2 reception encounters error.\r
 322 * Arguments    : error_type -\r
 323 *                    reception error type\r
 324 * Return Value : None\r
 325 ***********************************************************************************************************************/\r
 326 void r_scifa2_callback_error(scif_error_type_t error_type)\r
 327 {\r
 328         /* Start user code. Do not edit comment generated here */\r
 329 \r
 330         /* Used to suppress the warning message generated for unused variables */\r
 331         UNUSED_PARAM(error_type);\r
 332 \r
 333         /* End user code. Do not edit comment generated here */\r
 334 }\r
 335 \r
 336 /* Start user code for adding. Do not edit comment generated here */\r
 337 \r
 338 /* Function required in order to link UARTCommandConsole.c - which is used by\r
 339 multiple different demo application. */\r
 340 xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
 341 {\r
 342         ( void ) ulWantedBaud;\r
 343         ( void ) uxQueueLength;\r
 344 \r
 345         /* Characters received from the UART are stored in this queue, ready to be\r
 346         received by the application.  ***NOTE*** Using a queue in this way is very\r
 347         convenient, but also very inefficient.  It can be used here because\r
 348         characters will only arrive slowly.  In a higher bandwidth system a circular\r
 349         RAM buffer or DMA should be used in place of this queue. */\r
 350         xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) );\r
 351         configASSERT( xRxQueue );\r
 352 \r
 353         /* Enable the receive. */\r
 354         SCIFA2.FTCR.BIT.RFTC = _SCIF_RX_TRIG_NUM_2;\r
 355 \r
 356         SCIFA2.SCR.BIT.RE = 1U;\r
 357         SCIFA2.SCR.BIT.RIE = 1U;\r
 358         SCIFA2.SCR.BIT.REIE = 1U;\r
 359 \r
 360         /* Enable SCI1 operations */\r
 361         R_SCIFA2_Start();\r
 362 \r
 363         /* Only one UART is supported, so it doesn't matter what is returned\r
 364         here. */\r
 365         return 0;\r
 366 }\r
 367 \r
 368 /* Function required in order to link UARTCommandConsole.c - which is used by\r
 369 multiple different demo application. */\r
 370 void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength )\r
 371 {\r
 372 const TickType_t xMaxBlockTime = pdMS_TO_TICKS( 5000 );\r
 373 \r
 374         /* Only one port is supported. */\r
 375         ( void ) pxPort;\r
 376 \r
 377         /* Don't send the string unless the previous string has been sent. */\r
 378         if( xSendingTask == NULL )\r
 379         {\r
 380                 /* Ensure the calling task's notification state is not already\r
 381                 pending. */\r
 382                 vTaskNotifyStateClear( NULL );\r
 383 \r
 384                 /* Store the handle of the transmitting task.  This is used to unblock\r
 385                 the task when the transmission has completed. */\r
 386                 xSendingTask = xTaskGetCurrentTaskHandle();\r
 387 \r
 388                 /* Send the string using the auto-generated API. */\r
 389                 R_SCIFA2_Serial_Send( ( uint8_t * ) pcString, usStringLength );\r
 390 \r
 391                 /* Wait in the Blocked state (so not using any CPU time) until the\r
 392                 transmission has completed. */\r
 393                 ulTaskNotifyTake( pdTRUE, xMaxBlockTime );\r
 394         }\r
 395 }\r
 396 \r
 397 /* Function required in order to link UARTCommandConsole.c - which is used by\r
 398 multiple different demo application. */\r
 399 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime )\r
 400 {\r
 401         /* Only one UART is supported. */\r
 402         ( void ) pxPort;\r
 403 \r
 404         /* Return a received character, if any are available.  Otherwise block to\r
 405         wait for a character. */\r
 406         return xQueueReceive( xRxQueue, pcRxedChar, xBlockTime );\r
 407 }\r
 408 \r
 409 /* Function required in order to link UARTCommandConsole.c - which is used by\r
 410 multiple different demo application. */\r
 411 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime )\r
 412 {\r
 413         /* Just mapped to vSerialPutString() so the block time is not used. */\r
 414         ( void ) xBlockTime;\r
 415 \r
 416         vSerialPutString( pxPort, &cOutChar, sizeof( cOutChar ) );\r
 417         return pdPASS;\r
 418 }\r
 419 /* End user code. Do not edit comment generated here */\r
 420 \r
 421 /*\r
 422  * The RZ/T vectors directly to a peripheral specific interrupt handler, rather\r
 423  * than using the Cortex-R IRQ vector.  Therefore each interrupt handler\r
 424  * installed by the application must follow the examples below, which save a\r
 425  * pointer to a standard C function in the pxISRFunction variable, before\r
 426  * branching to the FreeRTOS IRQ handler.  The FreeRTOS IRQ handler then manages\r
 427  * interrupt entry (including interrupt nesting), before calling the C function\r
 428  * saved in the pxISRFunction variable.  NOTE:  The entry points are naked\r
 429  * functions - do not add C code to these functions.\r
 430  */\r
 431 #ifdef __GNUC__\r
 432         /* The IAR equivalent is implemented in\r
 433         $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */\r
 434         void r_scifa2_txif2_interrupt_entry( void )\r
 435         {\r
 436                 __asm volatile (                                                                                                                \\r
 437                                                         "PUSH   {r0-r1}                                                         \t\n"   \\r
 438                                                         "LDR    r0, =pxISRFunction                                      \t\n"   \\r
 439                                                         "LDR    r1, =r_scifa2_txif2_interrupt           \t\n"   \\r
 440                                                         "STR    r1, [r0]                                                        \t\n"   \\r
 441                                                         "POP    {r0-r1}                                                         \t\n"   \\r
 442                                                         "B              FreeRTOS_IRQ_Handler                                    "\r
 443                                                 );\r
 444         }\r
 445 #endif /* __GNUC__ */\r
 446 /*-----------------------------------------------------------*/\r
 447 \r
 448 #ifdef __GNUC__\r
 449         /* The IAR equivalent is implemented in\r
 450         $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */\r
 451         void r_scifa2_rxif2_interrupt_entry( void )\r
 452         {\r
 453                 __asm volatile (                                                                                                                \\r
 454                                                         "PUSH   {r0-r1}                                                         \t\n"   \\r
 455                                                         "LDR    r0, =pxISRFunction                                      \t\n"   \\r
 456                                                         "LDR    r1, =r_scifa2_rxif2_interrupt           \t\n"   \\r
 457                                                         "STR    r1, [r0]                                                        \t\n"   \\r
 458                                                         "POP    {r0-r1}                                                         \t\n"   \\r
 459                                                         "B              FreeRTOS_IRQ_Handler                                    "\r
 460                                                 );\r
 461         }\r
 462 #endif /* __GNUC__ */\r
 463 /*-----------------------------------------------------------*/\r
 464 \r
 465 #ifdef __GNUC__\r
 466         /* The IAR equivalent is implemented in\r
 467         $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */\r
 468         void r_scifa2_drif2_interrupt_entry( void )\r
 469         {\r
 470                 __asm volatile (                                                                                                                \\r
 471                                                         "PUSH   {r0-r1}                                                         \t\n"   \\r
 472                                                         "LDR    r0, =pxISRFunction                                      \t\n"   \\r
 473                                                         "LDR    r1, =r_scifa2_drif2_interrupt           \t\n"   \\r
 474                                                         "STR    r1, [r0]                                                        \t\n"   \\r
 475                                                         "POP    {r0-r1}                                                         \t\n"   \\r
 476                                                         "B              FreeRTOS_IRQ_Handler                                    "\r
 477                                                 );\r
 478         }\r
 479 #endif /* __GNUC__ */\r
 480 /*-----------------------------------------------------------*/\r
 481 \r
 482 #ifdef __GNUC__\r
 483         /* The IAR equivalent is implemented in\r
 484         $PROJ_DIR$/System/IAR/Interrupt_Entry_Stubs.asm */\r
 485         void r_scifa2_brif2_interrupt_entry( void )\r
 486         {\r
 487                 __asm volatile (                                                                                                                \\r
 488                                                         "PUSH   {r0-r1}                                                         \t\n"   \\r
 489                                                         "LDR    r0, =pxISRFunction                                      \t\n"   \\r
 490                                                         "LDR    r1, =r_scifa2_brif2_interrupt           \t\n"   \\r
 491                                                         "STR    r1, [r0]                                                        \t\n"   \\r
 492                                                         "POP    {r0-r1}                                                         \t\n"   \\r
 493                                                         "B              FreeRTOS_IRQ_Handler                                    "\r
 494                                                 );\r
 495         }\r
 496 #endif /* __GNUC__ */\r
 497 /*-----------------------------------------------------------*/\r