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   1 /******************************************************************************
   2  *
   3  * Copyright (C) 2017 Xilinx, Inc. All rights reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
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  10  * Software is furnished to do so, subject to the following conditions:
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  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * Use of the Software is limited solely to applications:
  16  * (a) running on a Xilinx device, or
  17  * (b) that interact with a Xilinx device through a bus or interconnect.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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  23  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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  25  * SOFTWARE.
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  29  * this Software without prior written authorization from Xilinx.
  30  *
  31  ******************************************************************************/
  32
  33 /*****************************************************************************/
  34 /**
  35  *
  36  * @file xdpdma.h
  37  *
  38  * This file defines the functions implemented by the DPDMA driver present
  39  * in the Zynq Ultrascale MP.
  40  *
  41  * @note        None.
  42  *
  43  * <pre>
  44  * MODIFICATION HISTORY:
  45  *
  46  * Ver  Who   Date     Changes
  47  * ---- ----- -------- ----------------------------------------------------
  48  * 1.0  aad   04/12/16 Initial release.
  49  *
  50  *****************************************************************************/
  51
  52
  53 #ifndef XDPDMA_H_
  54 /* Prevent circular inclusions by using protection macros. */
  55 #define XDPDMA_H_
  56
  57 #ifdef __cplusplus
  58 extern "C" {
  59 #endif
  60
  61 /***************************** Include Files **********************************/
  62
  63 #include "xdpdma_hw.h"
  64 #include "xvidc.h"
  65 #include "xil_io.h"
  66 #include "xil_assert.h"
  67 #include "xstatus.h"
  68 #include "xavbuf.h"
  69 /************************** Constant Definitions ******************************/
  70
  71 /* Alignment for DPDMA Descriptor and Payload */
  72 #define XDPDMA_DESCRIPTOR_ALIGN 256
  73 /* DPDMA preamble field */
  74 #define XDPDMA_DESCRIPTOR_PREAMBLE 0xA5
  75 /**************************** Type Definitions ********************************/
  76
  77 /**
  78  *  This typedef describes the DPDMA descriptor structure and its internals
  79  *  which will be used when fetching data from a nonlive path
  80  */
  81 typedef struct {
  82         u32 Control;                    /**<    [7:0] Descriptor Preamble
  83                                                 [8] Enable completion Interrupt
  84                                                 [9] Enable descriptor update
  85                                                 [10] Ignore Done
  86                                                 [11] AXI burst type
  87                                                 [15:12] AXACHE
  88                                                 [17:16] AXPROT
  89                                                 [18] Descriptor mode
  90                                                 [19] Last Descriptor
  91                                                 [20] Enable CRC
  92                                                 [21] Last descriptor frame
  93                                                 [31:22] Reserved */
  94         u32 DSCR_ID;                    /**<    [15:0] Descriptor ID
  95                                                 [31:16] Reserved */
  96         u32 XFER_SIZE;                  /**<    Size of transfer in bytes */
  97         u32 LINE_SIZE_STRIDE;           /**<    [17:0] Horizontal Resolution
  98                                                 [31:18] Stride */
  99         u32 LSB_Timestamp;              /**<    LSB of the Timestamp */
 100         u32 MSB_Timestamp;              /**<    MSB of the Timestamp */
 101         u32 ADDR_EXT;                   /**<    [15:0] Next descriptor
 102                                                 extenstion
 103                                                 [31:16] SRC address extemsion */
 104         u32 NEXT_DESR;                  /**<    Address of next descriptor */
 105         u32 SRC_ADDR;                   /**<    Source Address */
 106         u32 ADDR_EXT_23;                /**<    [15:0] Address extension for SRC
 107                                                 Address2
 108                                                 [31:16] Address extension for
 109                                                 SRC Address 3 */
 110         u32 ADDR_EXT_45;                /**<    [15:0] Address extension for SRC
 111                                                 Address4
 112                                                 [31:16] Address extension for
 113                                                 SRC Address 5 */
 114         u32 SRC_ADDR2;                  /**<    Source address of 2nd page */
 115         u32 SRC_ADDR3;                  /**<    Source address of 3rd page */
 116         u32 SRC_ADDR4;                  /**<    Source address of 4th page */
 117         u32 SRC_ADDR5;                  /**<    Source address of 5th page */
 118         u32 CRC;                        /**<    Reserved */
 119
 120 } XDpDma_Descriptor __attribute__ ((aligned(XDPDMA_DESCRIPTOR_ALIGN)));
 121
 122 /**
 123  * This typedef contains configuration information for the DPDMA.
 124  */
 125 typedef struct {
 126         u16 DeviceId;                   /**< Device ID */
 127         u32 BaseAddr;                   /**< Base Address */
 128 } XDpDma_Config;
 129
 130 /**
 131  * The following data structure enumerates the types of
 132  * DPDMA channels
 133  */
 134 typedef enum {
 135         VideoChan,
 136         GraphicsChan,
 137         AudioChan0,
 138         AudioChan1,
 139 } XDpDma_ChannelType;
 140
 141 /**
 142  * This typedef lists the channel status.
 143  */
 144 typedef enum {
 145         XDPDMA_DISABLE,
 146         XDPDMA_ENABLE,
 147         XDPDMA_IDLE,
 148         XDPDMA_PAUSE
 149 } XDpDma_ChannelState;
 150
 151 /**
 152  * This typedef is the information needed to transfer video info.
 153  */
 154 typedef struct {
 155         u64 Address;
 156         u32 Size;
 157         u32 Stride;
 158         u32 LineSize;
 159 } XDpDma_FrameBuffer;
 160 /**
 161  * This typedef is the information needed to transfer audio info.
 162  */
 163 typedef struct {
 164         u64 Address;
 165         u64 Size;
 166 } XDpDma_AudioBuffer;
 167
 168 /**
 169  * This typedef defines the Video/Graphics Channel attributes.
 170  */
 171 typedef struct {
 172         XDpDma_Descriptor Descriptor0;
 173         XDpDma_Descriptor Descriptor1;
 174         XDpDma_Descriptor *Current;
 175 } XDpDma_Channel;
 176
 177 /**
 178  * This typedef defines the Video Channel attributes.
 179  */
 180 typedef struct {
 181         XDpDma_Channel Channel[3];
 182         u8 TriggerStatus;
 183         u8 AVBufEn;
 184         XAVBuf_VideoAttribute *VideoInfo;
 185         XDpDma_FrameBuffer *FrameBuffer[3];
 186 } XDpDma_VideoChannel;
 187
 188 /**
 189  * This typedef defines the Graphics Channel attributes.
 190  */
 191 typedef struct {
 192         XDpDma_Channel Channel;
 193         u8 TriggerStatus;
 194         u8 AVBufEn;
 195         XAVBuf_VideoAttribute *VideoInfo;
 196         XDpDma_FrameBuffer *FrameBuffer;
 197 } XDpDma_GfxChannel;
 198
 199 /**
 200  * This typedef defines the Audio Channel attributes.
 201  */
 202 typedef struct {
 203         XDpDma_Descriptor Descriptor0, Descriptor1, Descriptor2;
 204         XDpDma_Descriptor Descriptor3, Descriptor4, Descriptor5;
 205         XDpDma_Descriptor Descriptor6, Descriptor7;
 206         XDpDma_Descriptor *Current;
 207         u8 TriggerStatus;
 208         XDpDma_AudioBuffer *Buffer;
 209         u8 Used;
 210 } XDpDma_AudioChannel;
 211 /*************************************************************************/
 212 /**
 213  * This callback type represents the handler for a DPDMA VSync interrupt.
 214  *
 215  * @param       InstancePtr is a pointer to the XDpDma instance.
 216  *
 217  * @note        None.
 218  *
 219 **************************************************************************/
 220 typedef void (*XDpDma_VSyncInterruptHandler)(void *InstancePtr);
 221
 222 /*************************************************************************/
 223 /**
 224  * This callback type represents the handler for a DPDMA Done interrupt.
 225  *
 226  * @param       InstancePtr is a pointer to the XDpDma instance.
 227  *
 228  * @note        None.
 229  *
 230 **************************************************************************/
 231 typedef void (*XDpDma_DoneInterruptHandler)(void *InstancePtr);
 232
 233 /**
 234  * The XDpDma driver instance data representing the DPDMA operation.
 235  */
 236 typedef struct {
 237         XDpDma_Config Config;
 238         XDpDma_VideoChannel Video;
 239         XDpDma_GfxChannel Gfx;
 240         XDpDma_AudioChannel Audio[2];
 241         XVidC_VideoTiming *Timing;
 242         u8 QOS;
 243
 244         XDpDma_VSyncInterruptHandler VSyncHandler;
 245         void * VSyncInterruptHandler;
 246
 247         XDpDma_DoneInterruptHandler DoneHandler;
 248         void * DoneInterruptHandler;
 249
 250 } XDpDma;
 251
 252 void XDpDma_CfgInitialize(XDpDma *InstancePtr, XDpDma_Config *CfgPtr);
 253 XDpDma_Config *XDpDma_LookupConfig(u16 DeviceId);
 254 int XDpDma_SetChannelState(XDpDma *InstancePtr, XDpDma_ChannelType Channel,
 255                                         XDpDma_ChannelState ChannelState);
 256 void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS);
 257 void XDpDma_SetupChannel(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
 258 int XDpDma_SetVideoFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
 259 int XDpDma_SetGraphicsFormat(XDpDma *InstancePtr, XAVBuf_VideoFormat Format);
 260 void XDpDma_SetVideoTiming(XDpDma *InstancePtr, XVidC_VideoTiming *Timing);
 261 int XDpDma_Trigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
 262 int XDpDma_ReTrigger(XDpDma *InstancePtr, XDpDma_ChannelType Channel);
 263 void XDpDma_InterruptEnable(XDpDma *InstancePtr, u32 Mask);
 264 void XDpDma_InterruptHandler(XDpDma *InstancePtr);
 265 void XDpDma_VSyncHandler(XDpDma *InstancePtr);
 266 void XDpDma_DoneHandler(XDpDma *InstancePtr);
 267 void XDpDma_InitVideoDescriptor(XDpDma_Descriptor *CurrDesc,
 268                                 XDpDma_FrameBuffer *FrameBuffer);
 269 void  XDpDma_DisplayVideoFrameBuffer(XDpDma *InstancePtr,
 270                                    XDpDma_FrameBuffer *Plane1,
 271                                    XDpDma_FrameBuffer *Plane2,
 272                                    XDpDma_FrameBuffer *Plane3);
 273 void XDpDma_DisplayGfxFrameBuffer(XDpDma *InstancePtr,
 274                                    XDpDma_FrameBuffer *Plane);
 275 void XDpDma_InitAudioDescriptor(XDpDma_AudioChannel *Channel,
 276                                XDpDma_AudioBuffer *AudioBuffer);
 277 int XDpDma_PlayAudio(XDpDma *InstancePtr, XDpDma_AudioBuffer *Buffer,
 278                       u8 ChannelNum);
 279 #ifdef __cplusplus
 280 }
 281 #endif
 282
 283 #endif /* _XDPDMA_H_ */