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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /*****************************************************************************/
  33 /**
  34 * @file xtime_l.c
  35 *
  36 * This file contains low level functions to get/set time from the Global Timer
  37 * register in the ARM Cortex R5 core.
  38 *
  39 * <pre>
  40 * MODIFICATION HISTORY:
  41 *
  42 * Ver   Who    Date     Changes
  43 * ----- ------ -------- ---------------------------------------------------
  44 * 5.00  pkp    08/29/14 First release
  45 * 5.04  pkp        02/19/16 XTime_StartTimer API is added to configure TTC3 timer
  46 *                                               when present. XTime_GetTime is modified to give 64bit
  47 *                                               output using timer overflow when TTC3 present.
  48 *                                               XTime_SetTime is modified to configure TTC3 counter
  49 *                                               value when present.
  50 * 5.04  pkp        03/11/16 XTime_StartTimer is modified to avoid enabling the
  51 *                                               overflow interrupt and XTime_GetTime & XTime_SetTime
  52 *                                               are modified to read and write TTC counter value
  53 *                                               respectively
  54 * 5.04  pkp
  55 * </pre>
  56 *
  57 * @note         None.
  58 *
  59 ******************************************************************************/
  60 /***************************** Include Files *********************************/
  61
  62 #include "xtime_l.h"
  63 #include "xpseudo_asm.h"
  64 #include "xil_assert.h"
  65 #include "xil_io.h"
  66
  67 /***************** Macros (Inline Functions) Definitions *********************/
  68
  69 /**************************** Type Definitions *******************************/
  70
  71 /************************** Constant Definitions *****************************/
  72 #define RST_LPD_IOU2                                    0xFF5E0238U
  73 #define RST_LPD_IOU2_TTC3_RESET_MASK    0x00004000U
  74 /************************** Variable Definitions *****************************/
  75
  76 /************************** Function Prototypes ******************************/
  77
  78 /* Function definitions are applicable only when TTC3 is present*/
  79 #ifdef SLEEP_TIMER_BASEADDR
  80 /****************************************************************************
  81 *
  82 * Start the TTC timer.
  83 *
  84 * @param        None.
  85 *
  86 * @return       None.
  87 *
  88 * @note         In multiprocessor environment reference time will reset/lost for
  89 *               all processors, when this function called by any one processor.
  90 *
  91 ****************************************************************************/
  92 void XTime_StartTimer(void)
  93 {
  94         u32 LpdRst;
  95         u32 TimerPrescalar;
  96         u32 TimerCntrl;
  97
  98         LpdRst = Xil_In32(RST_LPD_IOU2);
  99         if ((LpdRst & RST_LPD_IOU2_TTC3_RESET_MASK) != 0 ) {
 100                         LpdRst = LpdRst & (~RST_LPD_IOU2_TTC3_RESET_MASK);
 101                         Xil_Out32(RST_LPD_IOU2, LpdRst);
 102
 103         } else {
 104                 TimerCntrl = Xil_In32(SLEEP_TIMER_BASEADDR +
 105                                                                 SLEEP_TIMER_CNTR_CNTRL_OFFSET);
 106                 /* check if Timer is disabled */
 107                 if ((TimerCntrl & SLEEP_TIMER_COUNTER_CONTROL_DIS_MASK) == 0) {
 108                         TimerPrescalar = Xil_In32(SLEEP_TIMER_BASEADDR +
 109                                                                         SLEEP_TIMER_CLK_CNTRL_OFFSET);
 110
 111                 /* check if Timer is configured with proper functionalty for sleep */
 112                         if ((TimerPrescalar & SLEEP_TIMER_CLOCK_CONTROL_PS_EN_MASK) == 0)
 113                                                 return;
 114                 }
 115         }
 116         /* Disable the timer to configure */
 117         TimerCntrl = Xil_In32(SLEEP_TIMER_BASEADDR +
 118                                                         SLEEP_TIMER_CNTR_CNTRL_OFFSET);
 119         TimerCntrl = TimerCntrl | SLEEP_TIMER_COUNTER_CONTROL_DIS_MASK;
 120         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CNTR_CNTRL_OFFSET,
 121                                 TimerCntrl);
 122
 123         /* Disable the prescalar */
 124         TimerPrescalar = Xil_In32(SLEEP_TIMER_BASEADDR +
 125                                                                 SLEEP_TIMER_CLK_CNTRL_OFFSET);
 126         TimerPrescalar = TimerPrescalar & (~SLEEP_TIMER_CLOCK_CONTROL_PS_EN_MASK);
 127         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CLK_CNTRL_OFFSET,
 128                                 TimerPrescalar);
 129
 130         /* Enable the Timer */
 131         TimerCntrl = SLEEP_TIMER_COUNTER_CONTROL_RST_MASK &
 132                                         (~SLEEP_TIMER_COUNTER_CONTROL_DIS_MASK);
 133         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CNTR_CNTRL_OFFSET,
 134                                 TimerCntrl);
 135
 136 }
 137 /****************************************************************************
 138 *
 139 * Set the time in the Timer Counter Register.
 140 *
 141 * @param        Value to be written to the Timer Counter Register.
 142 *
 143 * @return       None.
 144 *
 145 * @note         In multiprocessor environment reference time will reset/lost for
 146 *               all processors, when this function called by any one processor.
 147 *
 148 ****************************************************************************/
 149 void XTime_SetTime(XTime Xtime_Global)
 150 {
 151         u32 TimerCntrl;
 152         /* Disable the timer to configure */
 153         TimerCntrl = Xil_In32(SLEEP_TIMER_BASEADDR +
 154                                                         SLEEP_TIMER_CNTR_CNTRL_OFFSET);
 155         TimerCntrl = TimerCntrl | SLEEP_TIMER_COUNTER_CONTROL_DIS_MASK;
 156         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CNTR_CNTRL_OFFSET,
 157                                 TimerCntrl);
 158
 159         /* Write the lower 32bit value to timer counter register */
 160         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CNTR_VAL_OFFSET,
 161                                 Xtime_Global);
 162
 163         /* Enable the Timer */
 164         TimerCntrl = Xil_In32(SLEEP_TIMER_BASEADDR +
 165                                                         SLEEP_TIMER_CNTR_CNTRL_OFFSET);
 166         TimerCntrl = TimerCntrl & (~SLEEP_TIMER_COUNTER_CONTROL_DIS_MASK);
 167         Xil_Out32(SLEEP_TIMER_BASEADDR + SLEEP_TIMER_CNTR_CNTRL_OFFSET,
 168                                 TimerCntrl);
 169 }
 170
 171 /****************************************************************************
 172 *
 173 * Get the time from the Timer Counter Register.
 174 *
 175 * @param        Pointer to the location to be updated with the time.
 176 *
 177 * @return       None.
 178 *
 179 * @note         None.
 180 *
 181 ****************************************************************************/
 182 void XTime_GetTime(XTime *Xtime_Global)
 183 {
 184         *Xtime_Global = Xil_In32(SLEEP_TIMER_BASEADDR +
 185                                                                 SLEEP_TIMER_CNTR_VAL_OFFSET);
 186 }
 187 #endif