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[freertos] / FreeRTOS / Demo / CORTEX_R5_UltraScale_MPSoC / RTOSDemo_R5_bsp / psu_cortexr5_0 / libsrc / standalone_v6_1 / src / usleep.c
1 /******************************************************************************
2 *
3 * Copyright (C) 2014 - 2016 Xilinx, Inc. All rights reserved.
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11 *
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13 * all copies or substantial portions of the Software.
14 *
15 * Use of the Software is limited solely to applications:
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18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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30 *
31 ******************************************************************************/
32 /*****************************************************************************/
33 /**
34 *
35 * @file usleep.c
36 *
37 * This function provides a microsecond delay using the Global Timer register in
38 * the ARM Cortex R5 MP core.
39 *
40 * <pre>
41 * MODIFICATION HISTORY:
42 *
43 * Ver   Who      Date     Changes
44 * ----- -------- -------- -----------------------------------------------
45 * 5.00  pkp      02/20/14 First release
46 * 5.04  pkp              02/19/16 usleep routine is modified to use TTC3 if present
47 *                                                 else it will use set of assembly instructions to
48 *                                                 provide the required delay
49 * 5.04  pkp              03/09/16 Assembly routine for usleep is modified to avoid
50 *                                                 disabling the interrupt
51 * 5.04  pkp              03/11/16 Compare the counter value to previously read value
52 *                                                 to detect the overflow for TTC3
53 * 6.0   asa      08/15/16 Updated the usleep signature. Fix for CR#956899.
54 * </pre>
55 *
56 ******************************************************************************/
57 /***************************** Include Files *********************************/
58
59 #include "sleep.h"
60 #include "xtime_l.h"
61 #include "xparameters.h"
62 #include "xil_types.h"
63 #include "xpseudo_asm.h"
64 #include "xreg_cortexr5.h"
65
66 /*****************************************************************************/
67 /**
68 *
69 * This API gives a delay in microseconds
70 *
71 * @param        useconds requested
72 *
73 * @return       0 always
74 *
75 * @note         The usleep API is implemented using TTC3 counter 0 timer if present
76 *                       When TTC3 is absent, usleep is implemented using assembly
77 *                       instructions which is tested with instruction and data caches
78 *                       enabled and it gives proper delay. It may give more delay than
79 *                       exepcted when caches are disabled. If interrupt comes when usleep
80 *                       using assembly instruction is being executed, the delay may be
81 *                       greater than what is expected since once the interrupt is served
82 *                       count resumes from where it was interrupted unlike the case of TTC3
83 *                       where counter keeps running while interrupt is being served.
84 *
85 ****************************************************************************/
86
87 int usleep(unsigned long useconds)
88 {
89
90 #ifdef SLEEP_TIMER_BASEADDR
91         u64 tEnd;
92         u64 tCur;
93         u32 TimeHighVal;
94         XTime TimeLowVal1;
95         XTime TimeLowVal2;
96
97         TimeHighVal = 0;
98
99         XTime_GetTime(&TimeLowVal1);
100         tEnd  = (u64)TimeLowVal1 + (((u64) useconds) * COUNTS_PER_USECOND);
101
102         do
103         {
104                 XTime_GetTime(&TimeLowVal2);
105             if (TimeLowVal2 < TimeLowVal1) {
106                                 TimeHighVal++;
107                 }
108                 TimeLowVal1 = TimeLowVal2;
109                 tCur = (((u64) TimeHighVal) << 32U) | (u64)TimeLowVal2;
110         } while (tCur < tEnd);
111
112         return 0;
113 #else
114         __asm__ __volatile__ (
115                         " push {r0,r1}          \n\t"
116                         " mov r0, %[usec]       \n\t"
117                         " 1: \n\t"
118                         " mov r1, %[iter]       \n\t"
119                         " 2:                            \n\t"
120                         " subs r1, r1, #0x1 \n\t"
121                         " bne   2b              \n\t"
122                         " subs r0,r0,#0x1       \n\t"
123                         "  bne 1b                       \n\t"
124                         " pop {r0,r1}           \n\t"
125                         :: [iter] "r" (ITERS_PER_USEC), [usec] "r" (useconds)
126         );
127 #endif
128 }