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31 ******************************************************************************/
32 /*****************************************************************************/
37 * <b>Software Initalization & Configuration</b>
41 * <b> Virtual Memory </b>
43 * This driver supports Virtual Memory. The RTOS is responsible for calculating
44 * the correct device base address in Virtual Memory space.
48 * This driver is not thread safe. Any needs for threads or thread mutual
49 * exclusion must be satisfied by the layer above this driver.
53 * Asserts are used within all Xilinx drivers to enforce constraints on argument
54 * values. Asserts can be turned off on a system-wide basis by defining at
55 * compile time, the NDEBUG identifier. By default, asserts are turned on and it
56 * is recommended that users leave asserts on during development.
58 * <b> Building the driver </b>
61 * MODIFICATION HISTORY:
63 * Ver Who Date Changes
64 * ----- ---- ---------- --------------------------------------------------
65 * 1.0 mmo 24-01-2017 EDID Parser capability
68 ******************************************************************************/
73 #include "xil_types.h"
75 #include "xil_exception.h"
76 #include "xvidc_edid_ext.h"
78 static XV_VidC_PicAspectRatio xv_vidc_getPicAspectRatio(u16 hres, u16 vres);
80 static XV_VidC_PicAspectRatio xv_vidc_getPicAspectRatio(u16 hres, u16 vres) {
81 XV_VidC_PicAspectRatio ar;
82 #define HAS_RATIO_OF(x, y) (hres == (vres*(x)/(y))&&!((vres*(x))%(y)))
83 if (HAS_RATIO_OF(16, 10)) {
88 if (HAS_RATIO_OF(4, 3)) {
93 if (HAS_RATIO_OF(5, 4)) {
98 if (HAS_RATIO_OF(16, 9)) {
111 void XV_VidC_EdidCtrlParamInit (XV_VidC_EdidCntrlParam *EdidCtrlParam) {
113 /* Verify arguments. */
114 Xil_AssertVoid(EdidCtrlParam != NULL);
116 (void)memset((void *)EdidCtrlParam, 0,
117 sizeof(XV_VidC_EdidCntrlParam));
119 EdidCtrlParam->IsHdmi = XVIDC_ISDVI;
120 EdidCtrlParam->IsYCbCr444Supp = XVIDC_NOT_SUPPORTED;
121 EdidCtrlParam->IsYCbCr420Supp = XVIDC_NOT_SUPPORTED;
122 EdidCtrlParam->IsYCbCr422Supp = XVIDC_NOT_SUPPORTED;
123 EdidCtrlParam->IsYCbCr444DeepColSupp = XVIDC_NOT_SUPPORTED;
124 EdidCtrlParam->Is30bppSupp = XVIDC_NOT_SUPPORTED;
125 EdidCtrlParam->Is36bppSupp = XVIDC_NOT_SUPPORTED;
126 EdidCtrlParam->Is48bppSupp = XVIDC_NOT_SUPPORTED;
127 EdidCtrlParam->IsYCbCr420dc30bppSupp = XVIDC_NOT_SUPPORTED;
128 EdidCtrlParam->IsYCbCr420dc36bppSupp = XVIDC_NOT_SUPPORTED;
129 EdidCtrlParam->IsYCbCr420dc48bppSupp = XVIDC_NOT_SUPPORTED;
130 EdidCtrlParam->IsSCDCReadRequestReady= XVIDC_NOT_SUPPORTED;
131 EdidCtrlParam->IsSCDCPresent = XVIDC_NOT_SUPPORTED;
132 EdidCtrlParam->MaxFrameRateSupp = 0;
133 EdidCtrlParam->MaxTmdsMhz = 0;
138 (const struct xvidc_edid_detailed_timing_descriptor * const dtb)
140 XV_VidC_TimingParam timing;
142 timing.hres = xvidc_edid_detailed_timing_horizontal_active(dtb);
143 timing.vres = xvidc_edid_detailed_timing_vertical_active(dtb);
144 timing.htotal = timing.hres +
145 xvidc_edid_detailed_timing_horizontal_blanking(dtb);
146 timing.vtotal = timing.vres +
147 xvidc_edid_detailed_timing_vertical_blanking(dtb);
148 timing.hfp = xvidc_edid_detailed_timing_horizontal_sync_offset(dtb);
149 timing.vfp = xvidc_edid_detailed_timing_vertical_sync_offset(dtb);
151 xvidc_edid_detailed_timing_horizontal_sync_pulse_width(dtb);
153 xvidc_edid_detailed_timing_vertical_sync_pulse_width(dtb);
154 timing.pixclk = xvidc_edid_detailed_timing_pixel_clock(dtb);
155 timing.vfreq = (timing.pixclk / (timing.vtotal * timing.htotal));
156 timing.vidfrmt = (XVidC_VideoFormat) dtb->interlaced;
157 timing.aspect_ratio =
158 xv_vidc_getPicAspectRatio (timing.hres, timing.vres);
159 timing.hsync_polarity = dtb->signal_pulse_polarity;
160 timing.vsync_polarity = dtb->signal_serration_polarity;
165 #if XVIDC_EDID_VERBOSITY > 1
166 XV_VidC_DoubleRep Double2Int (double in_val) {
167 XV_VidC_DoubleRep DR;
170 DR.Decimal = (in_val - DR.Integer) * 10000;