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   1 /******************************************************************************
   2 *
   3 * Copyright (C) 2014 Xilinx, Inc.  All rights reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a copy
   6 * of this software and associated documentation files (the "Software"), to deal
   7 * in the Software without restriction, including without limitation the rights
   8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   9 * copies of the Software, and to permit persons to whom the Software is
  10 * furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice shall be included in
  13 * all copies or substantial portions of the Software.
  14 *
  15 * Use of the Software is limited solely to applications:
  16 * (a) running on a Xilinx device, or
  17 * (b) that interact with a Xilinx device through a bus or interconnect.
  18 *
  19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22 * XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  23 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  24 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25 * SOFTWARE.
  26 *
  27 * Except as contained in this notice, the name of the Xilinx shall not be used
  28 * in advertising or otherwise to promote the sale, use or other dealings in
  29 * this Software without prior written authorization from Xilinx.
  30 *
  31 ******************************************************************************/
  32 /*****************************************************************************/
  33 /**
  34 *
  35 * @file xzdma.c
  36 * @addtogroup zdma_v1_5
  37 * @{
  38 *
  39 * This file contains the implementation of the interface functions for ZDMA
  40 * driver. Refer to the header file xzdma.h for more detailed information.
  41 *
  42 * <pre>
  43 * MODIFICATION HISTORY:
  44 *
  45 * Ver   Who     Date     Changes
  46 * ----- ------  -------- ------------------------------------------------------
  47 * 1.0   vns     2/27/15  First release
  48 *       vns    16/10/15  Corrected Destination descriptor addresss calculation
  49 *                        in XZDma_CreateBDList API
  50 * 1.1   vns    05/11/15  Modified XZDma_SetMode to return XST_FAILURE on
  51 *                        selecting DMA mode other than normal mode in
  52 *                        scatter gather mode data transfer and corrected
  53 *                        XZDma_SetChDataConfig API to set over fetch and
  54 *                        src issue parameters correctly.
  55 * 1.3   mus    08/14/17  Add CCI support for A53 in EL1 NS
  56 * </pre>
  57 *
  58 ******************************************************************************/
  59
  60 /***************************** Include Files *********************************/
  61
  62 #include "xzdma.h"
  63
  64 /************************** Function Prototypes ******************************/
  65
  66 static void StubCallBack(void *CallBackRef, u32 Mask);
  67 static void StubDoneCallBack(void *CallBackRef);
  68 static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data);
  69 static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
  70                                                                 u32 Num);
  71 static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
  72         XZDma_LiDscr *SrcDscrPtr,XZDma_LiDscr *DstDscrPtr, u8 IsLast);
  73 static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
  74                                                                 u32 CtrlValue);
  75 static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
  76         XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast);
  77 static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
  78                                         u32 CtrlValue, u64 NextDscrAddr);
  79 static void XZDma_Enable(XZDma *InstancePtr);
  80 static void XZDma_GetConfigurations(XZDma *InstancePtr);
  81
  82 /************************** Function Definitions *****************************/
  83
  84 /*****************************************************************************/
  85 /**
  86 *
  87 * This function initializes an ZDMA core. This function must be called
  88 * prior to using an ZDMA core. Initialization of an ZDMA includes setting
  89 * up the instance data and ensuring the hardware is in a quiescent state and
  90 * resets all the hardware configurations.
  91 *
  92 * @param        InstancePtr is a pointer to the XZDma instance.
  93 * @param        CfgPtr is a reference to a structure containing information
  94 *               about a specific XZDma instance.
  95 * @param        EffectiveAddr is the device base address in the virtual memory
  96 *               address space. The caller is responsible for keeping the
  97 *               address mapping from EffectiveAddr to the device physical
  98 *               base address unchanged once this function is invoked.
  99 *               Unexpected errors may occur if the address mapping changes
 100 *               after this function is called. If address translation is not
 101 *               used, pass in the physical address instead.
 102 *
 103 * @return
 104 *               - XST_SUCCESS if initialization was successful.
 105 *
 106 * @note         None.
 107 *
 108 ******************************************************************************/
 109 s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
 110                         u32 EffectiveAddr)
 111 {
 112
 113         /* Verify arguments. */
 114         Xil_AssertNonvoid(InstancePtr != NULL);
 115         Xil_AssertNonvoid(CfgPtr != NULL);
 116         Xil_AssertNonvoid(EffectiveAddr != ((u32)0x00));
 117
 118         InstancePtr->Config.BaseAddress = CfgPtr->BaseAddress;
 119         InstancePtr->Config.DeviceId = CfgPtr->DeviceId;
 120         InstancePtr->Config.DmaType = CfgPtr->DmaType;
 121         InstancePtr->Config.IsCacheCoherent = CfgPtr->IsCacheCoherent;
 122
 123         InstancePtr->Config.BaseAddress = EffectiveAddr;
 124
 125         InstancePtr->IsReady = (u32)(XIL_COMPONENT_IS_READY);
 126
 127         InstancePtr->IsSgDma = FALSE;
 128         InstancePtr->Mode = XZDMA_NORMAL_MODE;
 129         InstancePtr->IntrMask = 0x00U;
 130         InstancePtr->ChannelState = XZDMA_IDLE;
 131
 132         /*
 133          * Set all handlers to stub values, let user configure this
 134          * data later
 135          */
 136         InstancePtr->DoneHandler =
 137                                 (XZDma_DoneHandler)((void *)StubDoneCallBack);
 138         InstancePtr->ErrorHandler =
 139                                 (XZDma_ErrorHandler)((void *)StubCallBack);
 140
 141         XZDma_Reset(InstancePtr);
 142         XZDma_GetConfigurations(InstancePtr);
 143
 144         return (XST_SUCCESS);
 145
 146 }
 147
 148 /*****************************************************************************/
 149 /**
 150 *
 151 * This function sets the pointer type and mode in which ZDMA needs to transfer
 152 * the data.
 153 *
 154 * @param        InstancePtr is a pointer to the XZDma instance.
 155 * @param        IsSgDma is a variable which specifies whether transfer has to
 156 *               to be done in scatter gather mode or simple mode.
 157 *               - TRUE  - Scatter gather pointer type
 158 *               - FALSE - Simple pointer type
 159 * @param        Mode is the type of the mode in which data has to be initiated
 160 *               - XZDMA_NORMAL_MODE   - Normal data transfer from source to
 161 *                                       destination (Valid for both Scatter
 162 *                                       gather and simple types)
 163 *               - XZDMA_WRONLY_MODE  - Write only mode (Valid only for Simple)
 164 *               - XZDMA_RDONLY_MODE  - Read only mode (Valid only for Simple)
 165 *
 166 * @return
 167 *               - XST_SUCCESS - If mode has been set successfully.
 168 *               - XST_FAILURE - If mode has not been set.
 169 *
 170 * @note         Mode cannot be changed while ZDMA is not in IDLE state.
 171 *
 172 ******************************************************************************/
 173 s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode)
 174 {
 175         u32 Data;
 176         s32 Status;
 177
 178         /* Verify arguments. */
 179         Xil_AssertNonvoid(InstancePtr != NULL);
 180         Xil_AssertNonvoid((IsSgDma == TRUE) || (IsSgDma == FALSE));
 181         Xil_AssertNonvoid(Mode <= XZDMA_RDONLY_MODE);
 182
 183         if (InstancePtr->ChannelState != XZDMA_IDLE) {
 184                 Status = XST_FAILURE;
 185                 goto End;
 186         }
 187         else {
 188                 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 189                                                 XZDMA_CH_CTRL0_OFFSET);
 190                 /* Simple mode */
 191                 if (IsSgDma != TRUE) {
 192                         Data = (Data & (~XZDMA_CTRL0_POINT_TYPE_MASK));
 193                         if (Mode == XZDMA_NORMAL_MODE) {
 194                                 Data &= (~XZDMA_CTRL0_MODE_MASK);
 195                         }
 196                         else if (Mode == XZDMA_WRONLY_MODE) {
 197                                 Data |= XZDMA_CTRL0_WRONLY_MASK;
 198                         }
 199                         else {
 200                                 Data |= XZDMA_CTRL0_RDONLY_MASK;
 201                         }
 202                         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 203                                                 XZDMA_CH_CTRL0_OFFSET, Data);
 204                         InstancePtr->IsSgDma = FALSE;
 205                         InstancePtr->Mode = Mode;
 206                 }
 207
 208                 else {
 209                         if (Mode != XZDMA_NORMAL_MODE) {
 210                                 Status = XST_FAILURE;
 211                                 goto End;
 212                         }
 213                         else {
 214                                 Data |= (XZDMA_CTRL0_POINT_TYPE_MASK);
 215                                 Data &= ~(XZDMA_CTRL0_MODE_MASK);
 216                                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 217                                                 XZDMA_CH_CTRL0_OFFSET, Data);
 218
 219                                 InstancePtr->IsSgDma = TRUE;
 220                                 InstancePtr->Mode = Mode;
 221                         }
 222                 }
 223                 Status = XST_SUCCESS;
 224         }
 225
 226 End:
 227         return Status;
 228
 229 }
 230
 231 /*****************************************************************************/
 232 /**
 233 *
 234 * This function sets the descriptor type and descriptor pointer's start address
 235 * of both source and destination based on the memory allocated by user and also
 236 * calculates no of descriptors(BDs) can be created in the allocated memory.
 237 *
 238 * @param        InstancePtr is a pointer to the XZDma instance.
 239 * @param        TypeOfDscr is a variable which specifies descriptor type
 240 *               whether Linear or linked list type of descriptor.
 241 *               - XZDMA_LINEAR    - Linear type of descriptor.
 242 *               - XZDMA_LINKEDLIST- Linked list type of descriptor.
 243 * @param        Dscr_MemPtr is a pointer to the allocated memory for creating
 244 *               descriptors. It Should be aligned to 64 bytes.
 245 *
 246 * @param        NoOfBytes specifies the number of bytes allocated for
 247 *               descriptors
 248 *
 249 * @return       The Count of the descriptors can be created.
 250 *
 251 * @note         User should allocate the memory for descriptors which should
 252 *               be capable of how many transfers he wish to do in one start.
 253 *               For Linear mode each descriptor needs 128 bit memory so for
 254 *               one data transfer it requires 2*128 = 256 bits i.e. 32 bytes
 255 *               Similarly for Linked list mode for each descriptor it needs
 256 *               256 bit, so for one data transfer it require 2*256 = 512 bits
 257 *               i.e. 64 bytes.
 258 *
 259 ******************************************************************************/
 260 u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
 261                                         UINTPTR Dscr_MemPtr, u32 NoOfBytes)
 262 {
 263         u32 Size;
 264
 265         /* Verify arguments. */
 266         Xil_AssertNonvoid(InstancePtr != NULL);
 267         Xil_AssertNonvoid((TypeOfDscr == XZDMA_LINEAR) ||
 268                                         (TypeOfDscr == XZDMA_LINKEDLIST));
 269         Xil_AssertNonvoid(Dscr_MemPtr != 0x00);
 270         Xil_AssertNonvoid(NoOfBytes != 0x00U);
 271
 272         InstancePtr->Descriptor.DscrType = TypeOfDscr;
 273
 274         if (TypeOfDscr == XZDMA_LINEAR) {
 275                 Size = sizeof(XZDma_LiDscr);
 276         }
 277         else {
 278                 Size = sizeof(XZDma_LlDscr);
 279         }
 280         InstancePtr->Descriptor.DscrCount =
 281                                                 (NoOfBytes >> 1) / Size;
 282         InstancePtr->Descriptor.SrcDscrPtr = (void *)Dscr_MemPtr;
 283         InstancePtr->Descriptor.DstDscrPtr =
 284                         (void *)(Dscr_MemPtr + (Size * InstancePtr->Descriptor.DscrCount));
 285
 286         if (!InstancePtr->Config.IsCacheCoherent)
 287         Xil_DCacheInvalidateRange((INTPTR)Dscr_MemPtr, NoOfBytes);
 288
 289         return (InstancePtr->Descriptor.DscrCount);
 290 }
 291
 292 /*****************************************************************************/
 293 /**
 294 *
 295 * This function sets the data attributes and control configurations of a
 296 * ZDMA core based on the inputs provided.
 297 *
 298 * @param        InstancePtr is a pointer to the XZDma instance.
 299 * @param        Configure is a pointer to the XZDma_ChDataConfig structure
 300 *               which has all the configuration fields.
 301 *               The fields of the structure are:
 302 *               - OverFetch - Allows over fetch or not
 303 *                       - 0 - Not allowed to over-fetch on SRC
 304 *                       - 1 - Allowed to over-fetch on SRC
 305 *               - SrcIssue  - Outstanding transaction on SRC
 306 *                       - Range is 1 to 32
 307 *               - SrcBurstType - Burst Type for SRC AXI transaction
 308 *                       - XZDMA_FIXED_BURST - Fixed burst
 309 *                       - XZDMA_INCR_BURST  - Incremental burst
 310 *               - SrcBurstLen - AXI Length for Data Read.
 311 *                       - Range of values is (1,2,4,8,16).
 312 *               - DstBurstType - Burst Type for SRC AXI transaction
 313 *                       - XZDMA_FIXED_BURST - Fixed burst
 314 *                       - XZDMA_INCR_BURST - Incremental burst
 315 *               - DstBurstLen     - AXI Length for Data write.
 316 *                       - Range of values is (1,2,4,8,16).
 317 *               - SrcCache - AXI cache bits for Data read
 318 *               - SrcQos - Configurable QoS bits for AXI Data read
 319 *               - DstCache - AXI cache bits for Data write
 320 *               - DstQos - configurable QoS bits for AXI Data write
 321 *
 322 * @return
 323 *               - XST_FAILURE  If ZDMA Core is not in Idle state and
 324 *               - XST_SUCCESS If Configurations are made successfully
 325 *
 326 * @note
 327 *               - These configurations will last till we modify or Reset
 328 *                 by XZDma_Reset(XZDma *InstancePtr).
 329 *               - Configurations should be modified only when ZDMA channel
 330 *                 is IDLE this can be confirmed by using
 331 *                 XZDma_ChannelState(XZDma *InstancePtr) API.
 332 *
 333 ******************************************************************************/
 334 s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
 335 {
 336         u32 Data;
 337         s32 Status;
 338
 339         /* Verify arguments */
 340         Xil_AssertNonvoid(InstancePtr != NULL);
 341         Xil_AssertNonvoid(Configure != NULL);
 342
 343         if (InstancePtr->ChannelState != XZDMA_IDLE) {
 344                 Status = XST_FAILURE;
 345         }
 346         else {
 347                 InstancePtr->DataConfig.DstBurstType = Configure->DstBurstType;
 348                 InstancePtr->DataConfig.DstBurstLen = Configure->DstBurstLen;
 349                 InstancePtr->DataConfig.SrcBurstType = Configure->SrcBurstType;
 350                 InstancePtr->DataConfig.SrcBurstLen = Configure->SrcBurstLen;
 351                 InstancePtr->DataConfig.OverFetch = Configure->OverFetch;
 352                 InstancePtr->DataConfig.SrcIssue = Configure->SrcIssue;
 353                 InstancePtr->DataConfig.SrcCache = Configure->SrcCache;
 354                 InstancePtr->DataConfig.SrcQos = Configure->SrcQos;
 355                 InstancePtr->DataConfig.DstCache = Configure->DstCache;
 356                 InstancePtr->DataConfig.DstQos = Configure->DstQos;
 357
 358                 /* Setting over fetch */
 359                 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 360                                 XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_OVR_FETCH_MASK);
 361
 362                 Data |= (((u32)(Configure->OverFetch) <<
 363                                 XZDMA_CTRL0_OVR_FETCH_SHIFT) &
 364                                         XZDMA_CTRL0_OVR_FETCH_MASK);
 365
 366                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 367                                         XZDMA_CH_CTRL0_OFFSET, Data);
 368
 369                 /* Setting source issue */
 370                 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 371                                                 XZDMA_CH_CTRL1_OFFSET) & (~XZDMA_CTRL1_SRC_ISSUE_MASK);
 372                 Data |= (u32)(Configure->SrcIssue & XZDMA_CTRL1_SRC_ISSUE_MASK);
 373
 374                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 375                                                 XZDMA_CH_CTRL1_OFFSET, Data);
 376
 377                 /* Setting Burst length and burst type */
 378                 Data = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 379                                                 XZDMA_CH_DATA_ATTR_OFFSET);
 380                 Data = (Data & (~(XZDMA_DATA_ATTR_ARBURST_MASK |
 381                                  XZDMA_DATA_ATTR_ARLEN_MASK |
 382                                  XZDMA_DATA_ATTR_AWBURST_MASK |
 383                                  XZDMA_DATA_ATTR_AWLEN_MASK |
 384                                  XZDMA_DATA_ATTR_ARCACHE_MASK |
 385                                  XZDMA_DATA_ATTR_AWCACHE_MASK |
 386                                  XZDMA_DATA_ATTR_AWQOS_MASK |
 387                                  XZDMA_DATA_ATTR_ARQOS_MASK)));
 388
 389                 Data |= ((((u32)(Configure->SrcBurstType) <<
 390                                 XZDMA_DATA_ATTR_ARBURST_SHIFT) &
 391                                 XZDMA_DATA_ATTR_ARBURST_MASK) |
 392                                 (((u32)(Configure->SrcCache) <<
 393                                 XZDMA_DATA_ATTR_ARCACHE_SHIFT) &
 394                                 XZDMA_DATA_ATTR_ARCACHE_MASK) |
 395                                 (((u32)(Configure->SrcQos) <<
 396                                 XZDMA_DATA_ATTR_ARQOS_SHIFT) &
 397                                 XZDMA_DATA_ATTR_ARQOS_MASK) |
 398                         (((u32)(Configure->SrcBurstLen) <<
 399                                 XZDMA_DATA_ATTR_ARLEN_SHIFT) &
 400                                 XZDMA_DATA_ATTR_ARLEN_MASK) |
 401                         (((u32)(Configure->DstBurstType) <<
 402                                 XZDMA_DATA_ATTR_AWBURST_SHIFT) &
 403                                 XZDMA_DATA_ATTR_AWBURST_MASK) |
 404                         (((u32)(Configure->DstCache) <<
 405                                 XZDMA_DATA_ATTR_AWCACHE_SHIFT) &
 406                                 XZDMA_DATA_ATTR_AWCACHE_MASK) |
 407                         (((u32)(Configure->DstQos) <<
 408                                 XZDMA_DATA_ATTR_AWQOS_SHIFT) &
 409                                 XZDMA_DATA_ATTR_AWQOS_MASK) |
 410                         (((u32)(Configure->DstBurstLen)) &
 411                                 XZDMA_DATA_ATTR_AWLEN_MASK));
 412
 413                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 414                                         XZDMA_CH_DATA_ATTR_OFFSET, Data);
 415                 Status = XST_SUCCESS;
 416         }
 417
 418         return Status;
 419
 420 }
 421
 422 /*****************************************************************************/
 423 /**
 424 *
 425 * This function gets the data attributes and control configurations of a
 426 * ZDMA core.
 427 *
 428 * @param        InstancePtr is a pointer to the XZDma instance.
 429 * @param        Configure is a pointer to the XZDma_ChDataConfig structure
 430 *               which has all the configuration fields.
 431 *               The fields of the structure are:
 432 *               - OverFetch - Allows over fetch or not
 433 *                       - 0 - Not allowed to over-fetch on SRC
 434 *                       - 1 - Allowed to over-fetch on SRC
 435 *               - SrcIssue  - Outstanding transaction on SRC
 436 *                       - Range is 1 to 32
 437 *               - SrcBurstType - Burst Type for SRC AXI transaction
 438 *                       - XZDMA_FIXED_BURST - Fixed burst
 439 *                       - XZDMA_INCR_BURST  - Incremental burst
 440 *               - SrcBurstLen - AXI Length for Data Read.
 441 *                       - Can be max of 16 to be compatible with AXI3
 442 *               - DstBurstType - Burst Type for SRC AXI transaction
 443 *                       - XZDMA_FIXED_BURST - Fixed burst
 444 *                       - XZDMA_INCR_BURST - Incremental burst
 445 *               - DstBurstLen     - AXI Length for Data write.
 446 *                       - Can be max of 16 to be compatible with AXI3
 447 *               - SrcCache - AXI cache bits for Data read
 448 *               - SrcQos - Configurable QoS bits for AXI Data read
 449 *               - DstCache - AXI cache bits for Data write
 450 *               - DstQos - Configurable QoS bits for AXI Data write
 451 *
 452 * @return       None
 453 *
 454 * @note         None.
 455 *
 456 ******************************************************************************/
 457 void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure)
 458 {
 459
 460         /* Verify arguments */
 461         Xil_AssertVoid(InstancePtr != NULL);
 462         Xil_AssertVoid(Configure != NULL);
 463
 464         Configure->SrcBurstType = InstancePtr->DataConfig.SrcBurstType;
 465         Configure->SrcCache = InstancePtr->DataConfig.SrcCache;
 466         Configure->SrcQos = InstancePtr->DataConfig.SrcQos;
 467         Configure->SrcBurstLen = InstancePtr->DataConfig.SrcBurstLen;
 468
 469         Configure->DstBurstType = InstancePtr->DataConfig.DstBurstType;
 470         Configure->DstCache = InstancePtr->DataConfig.DstCache;
 471         Configure->DstQos = InstancePtr->DataConfig.DstQos;
 472         Configure->DstBurstLen = InstancePtr->DataConfig.DstBurstLen;
 473
 474         Configure->OverFetch = InstancePtr->DataConfig.OverFetch;
 475         Configure->SrcIssue = InstancePtr->DataConfig.SrcIssue;
 476
 477 }
 478
 479 /*****************************************************************************/
 480 /**
 481 *
 482 * This function sets the descriptor attributes based on the inputs provided
 483 * in the structure.
 484 *
 485 * @param        InstancePtr is a pointer to the XZDma instance.
 486 * @param        Configure is a pointer to the XZDma_ChDscrConfig structure
 487 *               which has all the configuration fields.
 488 *               The fields of the structure are:
 489 *               - AxCoherent - AXI transactions generated for the descriptor.
 490 *                       - 0 - Non coherent
 491 *                       - 1 - Coherent
 492 *               - AXCache    - AXI cache bit used for DSCR fetch
 493 *                               (both on SRC and DST Side)
 494 *               - AXQos      - QoS bit used for DSCR fetch
 495 *                               (both on SRC and DST Side)
 496 *
 497 * @return
 498 *               - XST_FAILURE  If ZDMA core is not in Idle state and
 499 *               - XST_SUCCESS If Configurations are made successfully
 500 *
 501 * @note         None.
 502 *
 503 ******************************************************************************/
 504 s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
 505 {
 506         u32 Data;
 507         s32 Status;
 508
 509         /* Verify arguments */
 510         Xil_AssertNonvoid(InstancePtr != NULL);
 511         Xil_AssertNonvoid(Configure != NULL);
 512
 513         if (InstancePtr->ChannelState != XZDMA_IDLE) {
 514                 Status = XST_FAILURE;
 515         }
 516
 517         else {
 518                 InstancePtr->DscrConfig.AXCache = Configure->AXCache;
 519                 InstancePtr->DscrConfig.AXQos = Configure->AXQos;
 520                 InstancePtr->DscrConfig.AxCoherent = Configure->AxCoherent;
 521
 522                 Data = ((((u32)(Configure->AxCoherent) <<
 523                                 XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT) &
 524                                 XZDMA_DSCR_ATTR_AXCOHRNT_MASK) |
 525                         (((u32)(Configure->AXCache) <<
 526                                 XZDMA_DSCR_ATTR_AXCACHE_SHIFT) &
 527                                 XZDMA_DSCR_ATTR_AXCACHE_MASK) |
 528                         (((u32)Configure->AXQos) &
 529                                 XZDMA_DSCR_ATTR_AXQOS_MASK));
 530
 531                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 532                                 XZDMA_CH_DSCR_ATTR_OFFSET, Data);
 533
 534                 Status = XST_SUCCESS;
 535         }
 536
 537         return Status;
 538 }
 539
 540 /*****************************************************************************/
 541 /**
 542 *
 543 * This function gets the descriptor attributes of the channel.
 544 *
 545 * @param        InstancePtr is a pointer to the XZDma instance.
 546 * @param        Configure is a pointer to the XZDma_ChDscrConfig structure
 547 *               which has all the configuration fields.
 548 *               The fields of the structure are:
 549 *               - AxCoherent - AXI transactions generated for the descriptor.
 550 *                       - 0 - Non coherent
 551 *                       - 1 - Coherent
 552 *               - AXCache    - AXI cache bit used for DSCR fetch
 553 *                               (both on SRC and DST Side)
 554 *               - AXQos      - QoS bit used for DSCR fetch
 555 *                               (both on SRC and DST Side)
 556 *
 557 * @return       None.
 558 *
 559 * @note         None.
 560 *
 561 ******************************************************************************/
 562 void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure)
 563 {
 564
 565         /* Verify arguments */
 566         Xil_AssertVoid(InstancePtr != NULL);
 567         Xil_AssertVoid(Configure != NULL);
 568
 569         Configure->AXCache = InstancePtr->DscrConfig.AXCache;
 570         Configure->AXQos = InstancePtr->DscrConfig.AXQos;
 571         Configure->AxCoherent = InstancePtr->DscrConfig.AxCoherent;
 572
 573 }
 574
 575 /*****************************************************************************/
 576 /**
 577 *
 578 * This function preloads the buffers which will be used in write only mode.
 579 * In write only mode the data in the provided buffer will be written in
 580 * destination address for specified size.
 581 *
 582 * @param        InstancePtr is a pointer to the XZDma instance.
 583 * @param        Buffer is a pointer to an array of 64/128 bit data.
 584 *               i.e. pointer to 32 bit array of size 2/4
 585 *                - Array of Size 2 for ADMA
 586 *                - Array of Size 4 for GDMA
 587 *
 588 * @return       None.
 589 *
 590 * @note         Valid only in simple mode.
 591 *               Prior to call this function ZDMA instance should be set in
 592 *               Write only mode by using
 593 *               XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma,
 594 *                                                       XZDma_Mode Mode)
 595 *               To initiate data transfer after this API need to call
 596 *               XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
 597 *               In which only destination fields has to be filled.
 598 *
 599 ******************************************************************************/
 600 void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer)
 601 {
 602         u32 *LocBuf = Buffer;
 603
 604         /* Verify arguments */
 605         Xil_AssertVoid(InstancePtr != NULL);
 606         Xil_AssertVoid(Buffer != NULL);
 607
 608         if (InstancePtr->Config.DmaType == (u8)0) {
 609                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 610                                 XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
 611                 LocBuf++;
 612                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 613                                 XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
 614                 LocBuf++;
 615                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 616                                 XZDMA_CH_WR_ONLY_WORD2_OFFSET, *LocBuf);
 617                 LocBuf++;
 618                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 619                                 XZDMA_CH_WR_ONLY_WORD3_OFFSET, *LocBuf);
 620         }
 621
 622         else {
 623                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 624                                 XZDMA_CH_WR_ONLY_WORD0_OFFSET, *LocBuf);
 625                 LocBuf++;
 626                 XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 627                                 XZDMA_CH_WR_ONLY_WORD1_OFFSET, *LocBuf);
 628         }
 629
 630 }
 631
 632 /*****************************************************************************/
 633 /**
 634 *
 635 * This function resume the paused state of ZDMA core and starts the transfer
 636 * from where it has paused.
 637 *
 638 * @param        InstancePtr is a pointer to the XZDma instance.
 639 *
 640 * @return       None.
 641 *
 642 * @note         Valid only for scatter gather mode.
 643 *
 644 ******************************************************************************/
 645 void XZDma_Resume(XZDma *InstancePtr)
 646 {
 647         u32 Value;
 648
 649         /* Verify arguments */
 650         Xil_AssertVoid(InstancePtr != NULL);
 651         Xil_AssertVoid(InstancePtr->IsSgDma == TRUE);
 652         Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_PAUSE);
 653
 654         Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 655                 XZDMA_CH_CTRL0_OFFSET) & (~XZDMA_CTRL0_CONT_ADDR_MASK);
 656         Value |= XZDMA_CTRL0_CONT_MASK;
 657         InstancePtr->ChannelState = XZDMA_BUSY;
 658         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 659                                 XZDMA_CH_CTRL0_OFFSET, Value);
 660 }
 661
 662 /*****************************************************************************/
 663 /**
 664 *
 665 * This function resets the ZDMA core.
 666 *
 667 * @param        InstancePtr is a pointer to the XZDma instance.
 668 *
 669 * @return       None.
 670 *
 671 * @note         This function resets all the configurations made previously.
 672 *               Disables all the interrupts and clears interrupt status.
 673 *
 674 *****************************************************************************/
 675 void XZDma_Reset(XZDma *InstancePtr)
 676 {
 677
 678         /* Verify arguments */
 679         Xil_AssertVoid(InstancePtr != NULL);
 680         Xil_AssertVoid(InstancePtr->ChannelState == XZDMA_IDLE);
 681
 682         /* Disable's the channel */
 683         XZDma_DisableCh(InstancePtr);
 684
 685         /* Disables all interrupts */
 686         XZDma_DisableIntr(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
 687         XZDma_IntrClear(InstancePtr, XZDMA_IXR_ALL_INTR_MASK);
 688         InstancePtr->IntrMask = 0x00U;
 689
 690         /* All configurations are being reset */
 691         XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL0_OFFSET,
 692                                         XZDMA_CTRL0_RESET_VALUE);
 693         XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_CTRL1_OFFSET,
 694                                         XZDMA_CTRL1_RESET_VALUE);
 695         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 696                 XZDMA_CH_DATA_ATTR_OFFSET, XZDMA_DATA_ATTR_RESET_VALUE);
 697         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 698                 XZDMA_CH_DSCR_ATTR_OFFSET, XZDMA_DSCR_ATTR_RESET_VALUE);
 699
 700         /* Clears total byte */
 701         XZDma_TotalByteClear(InstancePtr);
 702
 703         /* Clears interrupt count of both source and destination channels */
 704         (void)XZDma_GetSrcIntrCnt(InstancePtr);
 705         (void)XZDma_GetDstIntrCnt(InstancePtr);
 706
 707         if (InstancePtr->Config.IsCacheCoherent) {
 708                 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 709                                 XZDMA_CH_DSCR_ATTR_OFFSET,
 710                                 InstancePtr->Config.IsCacheCoherent << XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT);
 711                 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 712                                 XZDMA_CH_SRC_DSCR_WORD3_OFFSET,
 713                                 InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
 714                 XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 715                                 XZDMA_CH_DST_DSCR_WORD3_OFFSET,
 716                                 InstancePtr->Config.IsCacheCoherent & XZDMA_WORD3_COHRNT_MASK);
 717         }
 718         InstancePtr->ChannelState = XZDMA_IDLE;
 719
 720 }
 721
 722 /*****************************************************************************/
 723 /**
 724 *
 725 * This function returns the state of ZDMA core.
 726 *
 727 * @param        InstancePtr is a pointer to the XZDma instance.
 728 *
 729 * @return       This function returns state of ZDMA core
 730 *               - XZDMA_IDLE - If ZDMA core is in idle state.
 731 *               - XZDMA_PAUSE - If ZDMA is in paused state.
 732 *               - XZDMA_BUSY - If ZDMA is in busy state.
 733 * @note         None.
 734 *               C-style signature:
 735 *               XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
 736 *
 737 ******************************************************************************/
 738 XZDmaState XZDma_ChannelState(XZDma *InstancePtr)
 739 {
 740         XZDmaState Status;
 741         u32 Value;
 742
 743         /* Verify arguments */
 744         Xil_AssertNonvoid(InstancePtr != NULL);
 745
 746         Value = XZDma_ReadReg(InstancePtr->Config.BaseAddress,
 747                         (XZDMA_CH_STS_OFFSET)) & (XZDMA_STS_ALL_MASK);
 748
 749         if ((Value == XZDMA_STS_DONE_MASK) ||
 750                         (Value == XZDMA_STS_DONE_ERR_MASK)) {
 751                 Status = XZDMA_IDLE;
 752         }
 753         else if (Value == XZDMA_STS_PAUSE_MASK) {
 754                 Status = XZDMA_PAUSE;
 755         }
 756         else {
 757                 Status = XZDMA_BUSY;
 758         }
 759
 760         return Status;
 761
 762 }
 763
 764 /*****************************************************************************/
 765 /**
 766 *
 767 * This function sets all the required fields for initiating data transfer. Data
 768 * transfer elements needs to be passed through structure pointer.
 769 * Data transfer can be done in any of the three modes (simple, Linear or Linked
 770 * List) based on the selected mode but before calling this API make sure that
 771 * ZDMA is in Idle state.
 772 *
 773 * @param        InstancePtr is a pointer to the XZDma instance.
 774 * @param        Data is a pointer of array to the XZDma_Transfer structure which
 775 *               has all the configuration fields for initiating data transfer.
 776 *               The fields of the structure are:
 777 *               - SrcAddr      - Source address
 778 *               - DstAddr     - Destination address
 779 *               - Size      - size of the data to be transferred in bytes
 780 *               - SrcCoherent  - AXI transactions generated to process the
 781 *                               descriptor payload for source channel
 782 *                       - 0 - Non coherent
 783 *                       - 1 - Coherent
 784 *               - DstCoherent - AXI transactions generated to process the
 785 *                               descriptor payload for destination channel
 786 *                       - 0 - Non coherent
 787 *                       - 1 - Coherent
 788 *               - Pause         -  Valid only for scatter gather mode.
 789 *                               Will pause after completion of this descriptor.
 790 * @param        Num specifies number of array elements of Data pointer.
 791 *               - For simple mode Num should be equal to 1
 792 *               - For Scatter gather mode (either linear or linked list) Num
 793 *                 can be any choice. (But based on which memory should be
 794 *                 allocated by Application) It should be less than the return
 795 *                 value of XZDma_CreateBDList.
 796 *
 797 * @return
 798 *               - XST_SUCCESS - if ZDMA initiated the transfer.
 799 *               - XST_FAILURE - if ZDMA has not initiated data transfer.
 800 *
 801 * @note         After Pause to resume the transfer need to use the following
 802 *               API
 803 *               - XZDma_Resume
 804 *               User should provide allocated memory and descriptor type in
 805 *               scatter gather mode through the following API before calling
 806 *               the start API.
 807 *               - XZDma_SetDescriptorType(XZDma *InstancePtr,
 808 *                       XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr,
 809 *                                                       u32 NoOfBytes)
 810 *
 811 ******************************************************************************/
 812 s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
 813 {
 814         s32 Status;
 815
 816         /* Verify arguments */
 817         Xil_AssertNonvoid(InstancePtr != NULL);
 818         Xil_AssertNonvoid(Data != NULL);
 819         Xil_AssertNonvoid(Num != 0x00U);
 820
 821         if ((InstancePtr->ChannelState == XZDMA_BUSY) &&
 822                         (Num >= InstancePtr->Descriptor.DscrCount)) {
 823                 Status = XST_FAILURE;
 824         }
 825         else {
 826                 if (InstancePtr->IsSgDma != TRUE) {
 827                         XZDma_SimpleMode(InstancePtr, Data);
 828                         Status = XST_SUCCESS;
 829                 }
 830                 else {
 831
 832                         XZDma_ScatterGather(InstancePtr, Data, Num);
 833                         Status = XST_SUCCESS;
 834                 }
 835
 836                 XZDma_Enable(InstancePtr);
 837         }
 838
 839         return Status;
 840 }
 841
 842 /*****************************************************************************/
 843 /**
 844 *
 845 * This static function sets all the required fields for initiating data
 846 * transfer in simple mode.
 847 *
 848 * @param        InstancePtr is a pointer to the XZDma instance.
 849 * @param        Data is a pointer of array to the XZDma_Transfer structure
 850 *               which has all the configuration fields for initiating data
 851 *               transfer.
 852 *
 853 * @return       None.
 854 *
 855 * @note         None.
 856 *
 857 ******************************************************************************/
 858 static void XZDma_SimpleMode(XZDma *InstancePtr, XZDma_Transfer *Data)
 859 {
 860
 861         u32 Value;
 862
 863         /* Verify arguments */
 864         Xil_AssertVoid(InstancePtr != NULL);
 865         Xil_AssertVoid(Data != NULL);
 866
 867         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 868                 XZDMA_CH_SRC_DSCR_WORD0_OFFSET,
 869                         (Data->SrcAddr & XZDMA_WORD0_LSB_MASK));
 870         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 871                 XZDMA_CH_SRC_DSCR_WORD1_OFFSET,
 872                 (((u64)Data->SrcAddr >> XZDMA_WORD1_MSB_SHIFT) &
 873                 XZDMA_WORD1_MSB_MASK));
 874
 875         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 876                 XZDMA_CH_DST_DSCR_WORD0_OFFSET,
 877                 (Data->DstAddr & XZDMA_WORD0_LSB_MASK));
 878         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 879                 XZDMA_CH_DST_DSCR_WORD1_OFFSET,
 880                 (((u64)Data->DstAddr >> XZDMA_WORD1_MSB_SHIFT) &
 881                 XZDMA_WORD1_MSB_MASK));
 882
 883         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 884                 XZDMA_CH_SRC_DSCR_WORD2_OFFSET,
 885                 (Data->Size & XZDMA_WORD2_SIZE_MASK));
 886         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 887                 XZDMA_CH_DST_DSCR_WORD2_OFFSET,
 888                 (Data->Size & XZDMA_WORD2_SIZE_MASK));
 889
 890         Value = (u32)(Data->SrcCoherent & XZDMA_WORD3_COHRNT_MASK);
 891         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 892                 XZDMA_CH_SRC_DSCR_WORD3_OFFSET, Value);
 893
 894         Value = (u32)(Data->DstCoherent & XZDMA_WORD3_COHRNT_MASK);
 895         XZDma_WriteReg((InstancePtr->Config.BaseAddress),
 896                         XZDMA_CH_DST_DSCR_WORD3_OFFSET, Value);
 897
 898 }
 899
 900 /*****************************************************************************/
 901 /**
 902 *
 903 * This static function sets all the required fields for initiating data
 904 * transfer in scatter gather mode.
 905 *
 906 * @param        InstancePtr is a pointer to the XZDma instance.
 907 * @param        Data is a pointer of array to the XZDma_Transfer structure
 908 *               which has all the configuration fields for initiating data
 909 *               transfer.
 910 * @param        Num specifies number of array elements of Data pointer.
 911 *
 912 * @return       None.
 913 *
 914 * @note         None.
 915 *
 916 ******************************************************************************/
 917 static void XZDma_ScatterGather(XZDma *InstancePtr, XZDma_Transfer *Data,
 918                                                                 u32 Num)
 919 {
 920         u32 Count = 0x00U;
 921         u8 Last;
 922         XZDma_Transfer *LocalData = Data;
 923         XZDma_LiDscr *LiSrcDscr =
 924                 (XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
 925         XZDma_LiDscr *LiDstDscr =
 926                 (XZDma_LiDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
 927         XZDma_LlDscr *LlSrcDscr =
 928                 (XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.SrcDscrPtr);
 929         XZDma_LlDscr *LlDstDscr =
 930                 (XZDma_LlDscr *)(void *)(InstancePtr->Descriptor.DstDscrPtr);
 931
 932         /* Verify arguments */
 933         Xil_AssertVoid(InstancePtr != NULL);
 934         Xil_AssertVoid(Data != NULL);
 935         Xil_AssertVoid(Num != 0x00U);
 936
 937         if (InstancePtr->Descriptor.DscrType == XZDMA_LINEAR) {
 938                 Last = FALSE;
 939                 do {
 940                         if (Count == (Num- 1)) {
 941                                 Last = TRUE;
 942                         }
 943                         XZDma_LinearMode(InstancePtr, LocalData, LiSrcDscr,
 944                                                         LiDstDscr, Last);
 945                         Count++;
 946                         LiSrcDscr++;
 947                         LiDstDscr++;
 948                         LocalData++;
 949                 } while(Count < Num);
 950         }
 951         else {
 952                 Last = FALSE;
 953                 do {
 954                         if (Count == (Num - 1)) {
 955                                 Last = TRUE;
 956                         }
 957                         XZDma_LinkedListMode(InstancePtr, LocalData, LlSrcDscr,
 958                                                         LlDstDscr, Last);
 959                         Count++;
 960                         LlDstDscr++;
 961                         LlSrcDscr++;
 962                         LocalData++;
 963                 } while(Count < Num);
 964         }
 965
 966         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 967                 XZDMA_CH_SRC_START_LSB_OFFSET,
 968                 ((UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) &
 969                                         XZDMA_WORD0_LSB_MASK));
 970         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 971                 XZDMA_CH_SRC_START_MSB_OFFSET,
 972                 (((u64)(UINTPTR)(InstancePtr->Descriptor.SrcDscrPtr) >>
 973                         XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
 974         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 975                 XZDMA_CH_DST_START_LSB_OFFSET,
 976                 ((UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) &
 977                                         XZDMA_WORD0_LSB_MASK));
 978         XZDma_WriteReg(InstancePtr->Config.BaseAddress,
 979                 XZDMA_CH_DST_START_MSB_OFFSET,
 980                 (((u64)(UINTPTR)(InstancePtr->Descriptor.DstDscrPtr) >>
 981                         XZDMA_WORD1_MSB_SHIFT) & XZDMA_WORD1_MSB_MASK));
 982 }
 983
 984 /*****************************************************************************/
 985 /**
 986 *
 987 * This static function sets all the required fields for initiating data
 988 * transfer in Linear descriptor type.
 989 *
 990 * @param        InstancePtr is a pointer to the XZDma instance.
 991 * @param        Data is a pointer of array to the XZDma_Transfer structure which
 992 *               has all the configuration fields for initiating data transfer.
 993 * @param        SrcDscrPtr is descriptor pointer of source in which Data fields
 994 *               has to be filled.
 995 * @param        DstDscrPtr is descriptor pointer of destination in which Data
 996 *               fields has to be filled.
 997 * @param        IsLast specifies whether provided descriptor pointer is last
 998 *               one or not.
 999 *               - XZDMA_TRUE - If descriptor is last
1000 *               - XZDMA_FALSE - If descriptor is not last
1001 *
1002 * @return       None.
1003 *
1004 * @note         None.
1005 *
1006 ******************************************************************************/
1007 static void XZDma_LinearMode(XZDma *InstancePtr, XZDma_Transfer *Data,
1008         XZDma_LiDscr *SrcDscrPtr, XZDma_LiDscr *DstDscrPtr, u8 IsLast)
1009 {
1010         u32 Value;
1011
1012         /* Verify arguments */
1013         Xil_AssertVoid(InstancePtr != NULL);
1014         Xil_AssertVoid(Data != NULL);
1015         Xil_AssertVoid(SrcDscrPtr != NULL);
1016         Xil_AssertVoid(DstDscrPtr != NULL);
1017         Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
1018
1019         if (Data->Pause == TRUE) {
1020                 Value = XZDMA_WORD3_CMD_PAUSE_MASK;
1021         }
1022         else if (IsLast == TRUE) {
1023                 Value = XZDMA_WORD3_CMD_STOP_MASK;
1024         }
1025         else {
1026                 Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
1027         }
1028         if (Data->SrcCoherent == TRUE) {
1029                 Value |= XZDMA_WORD3_COHRNT_MASK;
1030         }
1031
1032         XZDma_ConfigLinear(SrcDscrPtr, (u64)Data->SrcAddr, Data->Size, Value);
1033
1034         Value = 0U;
1035
1036         if (Data->DstCoherent == TRUE) {
1037                 Value |= XZDMA_WORD3_COHRNT_MASK;
1038         }
1039
1040         XZDma_ConfigLinear(DstDscrPtr, (u64)Data->DstAddr, Data->Size, Value);
1041
1042 }
1043
1044 /*****************************************************************************/
1045 /**
1046 *
1047 * This static function sets all the required fields for initiating data
1048 * transfer in Linear descriptor type.
1049 *
1050 * @param        DscrPtr is a pointer to source/destination descriptor.
1051 * @param        Addr is a 64 bit variable which denotes the address of data.
1052 * @param        Size specifies the amount of the data to be transferred.
1053 * @param        CtrlValue contains all the control fields of descriptor.
1054 *
1055 * @return       None.
1056 *
1057 * @note         None.
1058 *
1059 ******************************************************************************/
1060 static void XZDma_ConfigLinear(XZDma_LiDscr *DscrPtr, u64 Addr, u32 Size,
1061                                                                 u32 CtrlValue)
1062 {
1063         /* Verify arguments */
1064         Xil_AssertVoid(DscrPtr != NULL);
1065         Xil_AssertVoid(Addr != 0x00U);
1066
1067         DscrPtr->Address = Addr;
1068         DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
1069         DscrPtr->Cntl = CtrlValue;
1070
1071         Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
1072
1073 }
1074
1075 /*****************************************************************************/
1076 /**
1077 *
1078 * This static function sets all the required fields for initiating data
1079 * transfer in Linked list descriptor type.
1080 *
1081 * @param        InstancePtr is a pointer to the XZDma instance.
1082 * @param        Data is a pointer of array to the XZDma_Transfer structure which
1083 *               has all the configuration fields for initiating data transfer.
1084 * @param        SrcDscrPtr is descriptor pointer of source in which Data fields
1085 *               has to be filled.
1086 * @param        DstDscrPtr is descriptor pointer of destination in which Data
1087 *               fields has to be filled.
1088 * @param        IsLast specifies whether provided descriptor pointer is last
1089 *               one or not.
1090 *               - TRUE - If descriptor is last
1091 *               - FALSE - If descriptor is not last
1092 *
1093 * @return       None.
1094 *
1095 * @note         None.
1096 *
1097 ******************************************************************************/
1098 static void XZDma_LinkedListMode(XZDma *InstancePtr, XZDma_Transfer *Data,
1099         XZDma_LlDscr *SrcDscrPtr,XZDma_LlDscr *DstDscrPtr, u8 IsLast)
1100 {
1101         u32 Value;
1102         XZDma_LlDscr *NextSrc = SrcDscrPtr;
1103         XZDma_LlDscr *NextDst = DstDscrPtr;
1104         u64 NextSrcAdrs = 0x00U;
1105         u64 NextDstAdrs = 0x00U;
1106
1107         /* Verify arguments */
1108         Xil_AssertVoid(InstancePtr != NULL);
1109         Xil_AssertVoid(Data != NULL);
1110         Xil_AssertVoid(SrcDscrPtr != NULL);
1111         Xil_AssertVoid(DstDscrPtr != NULL);
1112         Xil_AssertVoid((IsLast == TRUE) || (IsLast == FALSE));
1113
1114         NextDst++;
1115         NextSrc++;
1116
1117         if (Data->Pause == TRUE) {
1118                 Value = XZDMA_WORD3_CMD_PAUSE_MASK;
1119                 if (IsLast != TRUE) {
1120                         NextSrcAdrs = (u64)(UINTPTR)NextSrc;
1121                         NextDstAdrs = (u64)(UINTPTR)NextDst;
1122                 }
1123         }
1124         else if (IsLast == TRUE) {
1125                 Value = XZDMA_WORD3_CMD_STOP_MASK;
1126         }
1127         else {
1128                 Value = XZDMA_WORD3_CMD_NXTVALID_MASK;
1129                 NextSrcAdrs = (u64)(UINTPTR)NextSrc;
1130                 NextDstAdrs = (u64)(UINTPTR)NextDst;
1131         }
1132         if (Data->SrcCoherent == TRUE) {
1133                 Value |= XZDMA_WORD3_COHRNT_MASK;
1134         }
1135
1136         XZDma_ConfigLinkedList(SrcDscrPtr, (u64)Data->SrcAddr,
1137                                         Data->Size, Value, NextSrcAdrs);
1138
1139         Value = 0U;
1140
1141         if (Data->DstCoherent == TRUE) {
1142                 Value |= XZDMA_WORD3_COHRNT_MASK;
1143         }
1144
1145         XZDma_ConfigLinkedList(DstDscrPtr, (u64)Data->DstAddr,
1146                                         Data->Size, Value, NextDstAdrs);
1147
1148 }
1149
1150 /*****************************************************************************/
1151 /**
1152 *
1153 * This static function sets all the required fields for initiating data
1154 * transfer in Linked list descriptor type.
1155 *
1156 * @param        DscrPtr is a pointer to source/destination descriptor.
1157 * @param        Addr is a 64 bit variable which denotes the address of data.
1158 * @param        Size specifies the amount of the data to be transferred.
1159 * @param        CtrlValue contains all the control fields of descriptor.
1160 * @param        NextDscrAddr is the address of next descriptor.
1161 *
1162 * @return       None.
1163 *
1164 * @note         None.
1165 *
1166 ******************************************************************************/
1167 static void XZDma_ConfigLinkedList(XZDma_LlDscr *DscrPtr, u64 Addr, u32 Size,
1168                         u32 CtrlValue, u64 NextDscrAddr)
1169 {
1170         /* Verify arguments */
1171         Xil_AssertVoid(DscrPtr != NULL);
1172         Xil_AssertVoid(Addr != 0x00U);
1173
1174         DscrPtr->Address = Addr;
1175         DscrPtr->Size = Size & XZDMA_WORD2_SIZE_MASK;
1176         DscrPtr->Cntl = CtrlValue;
1177         DscrPtr->NextDscr = NextDscrAddr;
1178         DscrPtr->Reserved = 0U;
1179
1180         Xil_DCacheFlushRange((UINTPTR)DscrPtr, sizeof(XZDma_LlDscr));
1181 }
1182
1183 /*****************************************************************************/
1184 /**
1185 * This static function enable's all the interrupts which user intended to
1186 * enable and enables the ZDMA channel for initiating data transfer.
1187 *
1188 * @param        InstancePtr is a pointer to the XZDma instance.
1189 * @return       None.
1190 *
1191 * @note         None.
1192 *
1193 ******************************************************************************/
1194
1195 static void XZDma_Enable(XZDma *InstancePtr)
1196 {
1197         /* Verify arguments */
1198         Xil_AssertVoid(InstancePtr != NULL);
1199
1200         XZDma_WriteReg(InstancePtr->Config.BaseAddress, XZDMA_CH_IEN_OFFSET,
1201                         (InstancePtr->IntrMask & XZDMA_IXR_ALL_INTR_MASK));
1202         InstancePtr->ChannelState = XZDMA_BUSY;
1203         XZDma_EnableCh(InstancePtr);
1204
1205 }
1206
1207 /*****************************************************************************/
1208 /**
1209 * This static function gets all the reset configurations of ZDMA.
1210 *
1211 * @param        InstancePtr is a pointer to the XZDma instance.
1212 *
1213 * @return       None.
1214 *
1215 * @note         None.
1216 *
1217 ******************************************************************************/
1218 static void XZDma_GetConfigurations(XZDma *InstancePtr)
1219 {
1220         /* Verify arguments */
1221         Xil_AssertVoid(InstancePtr != NULL);
1222
1223         InstancePtr->DataConfig.SrcIssue = (u8)XZDMA_CTRL1_SRC_ISSUE_MASK;
1224         InstancePtr->DataConfig.SrcBurstType = XZDMA_INCR_BURST;
1225         InstancePtr->DataConfig.SrcBurstLen = 0xFU;
1226         InstancePtr->DataConfig.OverFetch = 1U;
1227         InstancePtr->DataConfig.DstBurstType = XZDMA_INCR_BURST;
1228         InstancePtr->DataConfig.DstBurstLen = 0xFU;
1229         InstancePtr->DataConfig.SrcCache = 0x2U;
1230         InstancePtr->DataConfig.DstCache = 0x2U;
1231         InstancePtr->DataConfig.SrcQos = 0x0U;
1232         InstancePtr->DataConfig.DstQos = 0x0U;
1233
1234         InstancePtr->DscrConfig.AXCache = 0U;
1235         InstancePtr->DscrConfig.AXQos = 0U;
1236         InstancePtr->DscrConfig.AxCoherent = 0U;
1237 }
1238
1239 /*****************************************************************************/
1240 /**
1241 *
1242 * This routine is a stub for the asynchronous callbacks. The stub is here in
1243 * case the upper layer forgot to set the handlers. On initialization, All
1244 * handlers are set to this callback. It is considered an error for this
1245 * handler to be invoked.
1246 *
1247 * @param        CallBackRef is a callback reference passed in by the upper
1248 *               layer when setting the callback functions, and passed back to
1249 *               the upper layer when the callback is invoked.
1250 * @param        Mask is the type of the interrupts to enable. Use OR'ing of
1251 *               XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
1252 *               this parameter value.
1253 *
1254 * @return       None.
1255 *
1256 * @note         None.
1257 *
1258 ******************************************************************************/
1259 static void StubCallBack(void *CallBackRef, u32 Mask)
1260 {
1261         /* Verify arguments. */
1262         Xil_AssertVoid(CallBackRef != NULL);
1263         Xil_AssertVoid(Mask != (u32)0x00);
1264         Xil_AssertVoidAlways();
1265 }
1266
1267 /*****************************************************************************/
1268 /**
1269 *
1270 * This routine is a stub for the DMA done callback. The stub is here in
1271 * case the upper layer forgot to set the handlers. On initialization, Done
1272 * handler are set to this callback.
1273 *
1274 * @param        CallBackRef is a callback reference passed in by the upper
1275 *               layer when setting the callback functions, and passed back to
1276 *               the upper layer when the callback is invoked.
1277 *
1278 * @return       None.
1279 *
1280 * @note         None.
1281 *
1282 ******************************************************************************/
1283 static void StubDoneCallBack(void *CallBackRef)
1284 {
1285         /* Verify arguments. */
1286         Xil_AssertVoid(CallBackRef != NULL);
1287         Xil_AssertVoidAlways();
1288 }
1289 /** @} */