2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
\r
4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
\r
5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS tutorial books are available in pdf and paperback. *
\r
10 * Complete, revised, and edited pdf reference manuals are also *
\r
13 * Purchasing FreeRTOS documentation will not only help you, by *
\r
14 * ensuring you get running as quickly as possible and with an *
\r
15 * in-depth knowledge of how to use FreeRTOS, it will also help *
\r
16 * the FreeRTOS project to continue with its mission of providing *
\r
17 * professional grade, cross platform, de facto standard solutions *
\r
18 * for microcontrollers - completely free of charge! *
\r
20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
\r
22 * Thank you for using FreeRTOS, and thank you for your support! *
\r
24 ***************************************************************************
\r
27 This file is part of the FreeRTOS distribution.
\r
29 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
30 the terms of the GNU General Public License (version 2) as published by the
\r
31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
\r
32 >>>NOTE<<< The modification to the GPL is included to allow you to
\r
33 distribute a combined work that includes FreeRTOS without being obliged to
\r
34 provide the source code for proprietary components outside of the FreeRTOS
\r
35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
\r
36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
\r
37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
38 more details. You should have received a copy of the GNU General Public
\r
39 License and the FreeRTOS license exception along with FreeRTOS; if not it
\r
40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
\r
41 by writing to Richard Barry, contact details for whom are available on the
\r
46 ***************************************************************************
\r
48 * Having a problem? Start by reading the FAQ "My application does *
\r
49 * not run, what could be wrong?" *
\r
51 * http://www.FreeRTOS.org/FAQHelp.html *
\r
53 ***************************************************************************
\r
56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
\r
57 and contact details.
\r
59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
60 including FreeRTOS+Trace - an indispensable productivity tool.
\r
62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
\r
63 the code with commercial support, indemnification, and middleware, under
\r
64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
\r
65 provide a safety engineered and independently SIL3 certified version under
\r
66 the SafeRTOS brand: http://www.SafeRTOS.com.
\r
69 /* High speed timer test as described in main.c. */
\r
71 /* Scheduler includes. */
\r
72 #include "FreeRTOS.h"
\r
74 /* Library includes. */
\r
75 #include "stm32f10x_lib.h"
\r
76 #include "stm32f10x_tim.h"
\r
77 #include "stm32f10x_map.h"
\r
79 /* The set frequency of the interrupt. Deviations from this are measured as
\r
81 #define timerINTERRUPT_FREQUENCY ( ( unsigned portSHORT ) 20000 )
\r
83 /* The expected time between each of the timer interrupts - if the jitter was
\r
85 #define timerEXPECTED_DIFFERENCE_VALUE ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )
\r
87 /* The highest available interrupt priority. */
\r
88 #define timerHIGHEST_PRIORITY ( 0 )
\r
91 #define timerMAX_32BIT_VALUE ( 0xffffffffUL )
\r
92 #define timerTIMER_1_COUNT_VALUE ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )
\r
94 /* The number of interrupts to pass before we start looking at the jitter. */
\r
95 #define timerSETTLE_TIME 5
\r
97 /*-----------------------------------------------------------*/
\r
100 * Configures the two timers used to perform the test.
\r
102 void vSetupTimerTest( void );
\r
104 /* Interrupt handler in which the jitter is measured. */
\r
105 void vTimer2IntHandler( void );
\r
107 /* Stores the value of the maximum recorded jitter between interrupts. */
\r
108 volatile unsigned portSHORT usMaxJitter = 0;
\r
110 /*-----------------------------------------------------------*/
\r
112 void vSetupTimerTest( void )
\r
114 unsigned long ulFrequency;
\r
115 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
\r
116 NVIC_InitTypeDef NVIC_InitStructure;
\r
119 /* Enable timer clocks */
\r
120 RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );
\r
121 RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM3, ENABLE );
\r
123 /* Initialise data. */
\r
124 TIM_DeInit( TIM2 );
\r
125 TIM_DeInit( TIM3 );
\r
126 TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );
\r
128 /* Time base configuration for timer 2 - which generates the interrupts. */
\r
129 ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;
\r
130 TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) ( ulFrequency & 0xffffUL );
\r
131 TIM_TimeBaseStructure.TIM_Prescaler = 0x0;
\r
132 TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
\r
133 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
\r
134 TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
\r
135 TIM_ARRPreloadConfig( TIM2, ENABLE );
\r
138 /* Configuration for timer 3 which is used as a high resolution time
\r
140 TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) 0xffff;
\r
141 TIM_TimeBaseInit( TIM3, &TIM_TimeBaseStructure );
\r
142 TIM_ARRPreloadConfig( TIM3, ENABLE );
\r
144 /* Enable TIM2 IT. TIM3 does not generate an interrupt. */
\r
145 NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQChannel;
\r
146 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
\r
147 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = timerHIGHEST_PRIORITY;
\r
148 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
\r
149 NVIC_Init( &NVIC_InitStructure );
\r
150 TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
\r
152 /* Finally, enable both timers. */
\r
153 TIM_Cmd( TIM2, ENABLE );
\r
154 TIM_Cmd( TIM3, ENABLE );
\r
156 /*-----------------------------------------------------------*/
\r
158 void vTimer2IntHandler( void )
\r
160 static unsigned portSHORT usLastCount = 0, usSettleCount = 0, usMaxDifference = 0;
\r
161 unsigned portSHORT usThisCount, usDifference;
\r
163 /* Capture the free running timer 3 value as we enter the interrupt. */
\r
164 usThisCount = TIM3->CNT;
\r
166 if( usSettleCount >= timerSETTLE_TIME )
\r
168 /* What is the difference between the timer value in this interrupt
\r
169 and the value from the last interrupt. */
\r
170 usDifference = usThisCount - usLastCount;
\r
172 /* Store the difference in the timer values if it is larger than the
\r
173 currently stored largest value. The difference over and above the
\r
174 expected difference will give the 'jitter' in the processing of these
\r
176 if( usDifference > usMaxDifference )
\r
178 usMaxDifference = usDifference;
\r
179 usMaxJitter = usMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;
\r
184 /* Don't bother storing any values for the first couple of
\r
189 /* Remember what the timer value was this time through, so we can calculate
\r
190 the difference the next time through. */
\r
191 usLastCount = usThisCount;
\r
193 TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
\r