2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /* Standard includes. */
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32 /* FreeRTOS includes. */
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33 #include "FreeRTOS.h"
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36 /* ST library functions. */
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37 #include "stm32l1xx.h"
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40 * When configCREATE_LOW_POWER_DEMO is set to 1 then the tick interrupt
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41 * is generated by the TIM2 peripheral. The TIM2 configuration and handling
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42 * functions are defined in this file. Note the RTC is not used as there does
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43 * not appear to be a way to read back the RTC count value, and therefore the
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44 * only way of knowing exactly how long a sleep lasted is to use the very low
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45 * resolution calendar time.
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47 * When configCREATE_LOW_POWER_DEMO is set to 0 the tick interrupt is
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48 * generated by the standard FreeRTOS Cortex-M port layer, which uses the
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51 #if configCREATE_LOW_POWER_DEMO == 1
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53 /* The frequency at which TIM2 will run. */
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54 #define lpCLOCK_INPUT_FREQUENCY ( 1000UL )
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56 /* STM32 register used to ensure the TIM2 clock stops when the MCU is in debug
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58 #define DBGMCU_APB1_FZ ( * ( ( volatile unsigned long * ) 0xE0042008 ) )
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60 /*-----------------------------------------------------------*/
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63 * The tick interrupt is generated by the TIM2 timer.
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65 void TIM2_IRQHandler( void );
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67 /*-----------------------------------------------------------*/
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69 /* Calculate how many clock increments make up a single tick period. */
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70 static const uint32_t ulReloadValueForOneTick = ( ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ ) - 1 );
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72 /* Holds the maximum number of ticks that can be suppressed - which is
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73 basically how far into the future an interrupt can be generated. Set during
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75 static TickType_t xMaximumPossibleSuppressedTicks = 0;
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77 /* Flag set from the tick interrupt to allow the sleep processing to know if
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78 sleep mode was exited because of an tick interrupt or a different interrupt. */
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79 static volatile uint32_t ulTickFlag = pdFALSE;
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81 /*-----------------------------------------------------------*/
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83 /* The tick interrupt handler. This is always the same other than the part that
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84 clears the interrupt, which is specific to the clock being used to generate the
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86 void TIM2_IRQHandler( void )
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88 /* Clear the interrupt. */
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89 TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
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91 /* The next block of code is from the standard FreeRTOS tick interrupt
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92 handler. The standard handler is not called directly in case future
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93 versions contain changes that make it no longer suitable for calling
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95 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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97 if( xTaskIncrementTick() != pdFALSE )
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99 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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102 /* Just completely clear the interrupt mask on exit by passing 0 because
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103 it is known that this interrupt will only ever execute with the lowest
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104 possible interrupt priority. */
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106 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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108 /* In case this is the first tick since the MCU left a low power mode the
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109 reload value is reset to its default. */
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110 TIM2->ARR = ( uint16_t ) ulReloadValueForOneTick;
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112 /* The CPU woke because of a tick. */
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113 ulTickFlag = pdTRUE;
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115 /*-----------------------------------------------------------*/
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117 /* Override the default definition of vPortSetupTimerInterrupt() that is weakly
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118 defined in the FreeRTOS Cortex-M3 port layer with a version that configures TIM2
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119 to generate the tick interrupt. */
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120 void vPortSetupTimerInterrupt( void )
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122 NVIC_InitTypeDef NVIC_InitStructure;
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123 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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125 /* Enable the TIM2 clock. */
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126 RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );
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128 /* Ensure clock stops in debug mode. */
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129 DBGMCU_APB1_FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP;
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131 /* Scale the clock so longer tickless periods can be achieved. The SysTick
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132 is not used as even when its frequency is divided by 8 the maximum tickless
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133 period with a system clock of 16MHz is only 8.3 seconds. Using a prescaled
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134 clock on the 16-bit TIM2 allows a tickless period of nearly 66 seconds,
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135 albeit at low resolution. */
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136 TIM_TimeBaseStructure.TIM_Prescaler = ( uint16_t ) ( SystemCoreClock / lpCLOCK_INPUT_FREQUENCY );
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137 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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138 TIM_TimeBaseStructure.TIM_Period = ( uint16_t ) ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ );
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139 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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140 TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
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142 /* Enable the TIM2 interrupt. This must execute at the lowest interrupt
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144 NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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145 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_LOWEST_INTERRUPT_PRIORITY; /* Must be set to lowest priority. */
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146 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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147 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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148 NVIC_Init(&NVIC_InitStructure);
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149 TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
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150 TIM_SetCounter( TIM2, 0 );
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151 TIM_Cmd( TIM2, ENABLE );
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153 /* See the comments where xMaximumPossibleSuppressedTicks is declared. */
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154 xMaximumPossibleSuppressedTicks = ( ( unsigned long ) USHRT_MAX ) / ulReloadValueForOneTick;
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156 /*-----------------------------------------------------------*/
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158 /* Override the default definition of vPortSuppressTicksAndSleep() that is
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159 weakly defined in the FreeRTOS Cortex-M3 port layer with a version that manages
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160 the TIM2 interrupt, as the tick is generated from TIM2 compare matches events. */
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161 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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163 uint32_t ulCounterValue, ulCompleteTickPeriods;
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164 eSleepModeStatus eSleepAction;
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165 TickType_t xModifiableIdleTime;
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166 const TickType_t xRegulatorOffIdleTime = 30;
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168 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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170 /* Make sure the TIM2 reload value does not overflow the counter. */
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171 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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173 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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176 /* Calculate the reload value required to wait xExpectedIdleTime tick
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178 ulCounterValue = ulReloadValueForOneTick * xExpectedIdleTime;
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180 /* Stop TIM2 momentarily. The time TIM2 is stopped for is not accounted for
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181 in this implementation (as it is in the generic implementation) because the
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182 clock is so slow it is unlikely to be stopped for a complete count period
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184 TIM_Cmd( TIM2, DISABLE );
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186 /* Enter a critical section but don't use the taskENTER_CRITICAL() method as
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187 that will mask interrupts that should exit sleep mode. */
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188 __asm volatile ( "cpsid i" );
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189 __asm volatile ( "dsb" );
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190 __asm volatile ( "isb" );
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192 /* The tick flag is set to false before sleeping. If it is true when sleep
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193 mode is exited then sleep mode was probably exited because the tick was
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194 suppressed for the entire xExpectedIdleTime period. */
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195 ulTickFlag = pdFALSE;
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197 /* If a context switch is pending then abandon the low power entry as
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198 the context switch might have been pended by an external interrupt that
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199 requires processing. */
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200 eSleepAction = eTaskConfirmSleepModeStatus();
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201 if( eSleepAction == eAbortSleep )
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203 /* Restart tick. */
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204 TIM_Cmd( TIM2, ENABLE );
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206 /* Re-enable interrupts - see comments above the cpsid instruction()
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208 __asm volatile ( "cpsie i" );
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210 else if( eSleepAction == eNoTasksWaitingTimeout )
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212 /* A user definable macro that allows application code to be inserted
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213 here. Such application code can be used to minimise power consumption
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214 further by turning off IO, peripheral clocks, the Flash, etc. */
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215 configPRE_STOP_PROCESSING();
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217 /* There are no running state tasks and no tasks that are blocked with a
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218 time out. Assuming the application does not care if the tick time slips
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219 with respect to calendar time then enter a deep sleep that can only be
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220 woken by (in this demo case) the user button being pushed on the
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221 STM32L discovery board. If the application does require the tick time
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222 to keep better track of the calender time then the RTC peripheral can be
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223 used to make rough adjustments. */
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224 PWR_EnterSTOPMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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226 /* A user definable macro that allows application code to be inserted
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227 here. Such application code can be used to reverse any actions taken
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228 by the configPRE_STOP_PROCESSING(). In this demo
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229 configPOST_STOP_PROCESSING() is used to re-initialise the clocks that
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230 were turned off when STOP mode was entered. */
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231 configPOST_STOP_PROCESSING();
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233 /* Restart tick. */
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234 TIM_SetCounter( TIM2, 0 );
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235 TIM_Cmd( TIM2, ENABLE );
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237 /* Re-enable interrupts - see comments above the cpsid instruction()
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239 __asm volatile ( "cpsie i" );
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240 __asm volatile ( "dsb" );
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241 __asm volatile ( "isb" );
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245 /* Trap underflow before the next calculation. */
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246 configASSERT( ulCounterValue >= TIM_GetCounter( TIM2 ) );
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248 /* Adjust the TIM2 value to take into account that the current time
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249 slice is already partially complete. */
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250 ulCounterValue -= ( uint32_t ) TIM_GetCounter( TIM2 );
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252 /* Trap overflow/underflow before the calculated value is written to
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254 configASSERT( ulCounterValue < ( uint32_t ) USHRT_MAX );
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255 configASSERT( ulCounterValue != 0 );
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257 /* Update to use the calculated overflow value. */
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258 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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259 TIM_SetCounter( TIM2, 0 );
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261 /* Restart the TIM2. */
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262 TIM_Cmd( TIM2, ENABLE );
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264 /* Allow the application to define some pre-sleep processing. This is
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265 the standard configPRE_SLEEP_PROCESSING() macro as described on the
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266 FreeRTOS.org website. */
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267 xModifiableIdleTime = xExpectedIdleTime;
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268 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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270 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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271 means the application defined code has already executed the wait/sleep
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273 if( xModifiableIdleTime > 0 )
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275 /* The sleep mode used is dependent on the expected idle time
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276 as the deeper the sleep the longer the wake up time. See the
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277 comments at the top of main_low_power.c. Note xRegulatorOffIdleTime
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278 is set purely for convenience of demonstration and is not intended
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279 to be an optimised value. */
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280 if( xModifiableIdleTime > xRegulatorOffIdleTime )
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282 /* A slightly lower power sleep mode with a longer wake up
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284 PWR_EnterSleepMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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288 /* A slightly higher power sleep mode with a faster wake up
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290 PWR_EnterSleepMode( PWR_Regulator_ON, PWR_SLEEPEntry_WFI );
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294 /* Allow the application to define some post sleep processing. This is
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295 the standard configPOST_SLEEP_PROCESSING() macro, as described on the
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296 FreeRTOS.org website. */
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297 configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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299 /* Stop TIM2. Again, the time the clock is stopped for in not accounted
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300 for here (as it would normally be) because the clock is so slow it is
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301 unlikely it will be stopped for a complete count period anyway. */
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302 TIM_Cmd( TIM2, DISABLE );
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304 /* Re-enable interrupts - see comments above the cpsid instruction()
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306 __asm volatile ( "cpsie i" );
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307 __asm volatile ( "dsb" );
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308 __asm volatile ( "isb" );
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310 if( ulTickFlag != pdFALSE )
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312 /* Trap overflows before the next calculation. */
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313 configASSERT( ulReloadValueForOneTick >= ( uint32_t ) TIM_GetCounter( TIM2 ) );
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315 /* The tick interrupt has already executed, although because this
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316 function is called with the scheduler suspended the actual tick
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317 processing will not occur until after this function has exited.
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318 Reset the reload value with whatever remains of this tick period. */
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319 ulCounterValue = ulReloadValueForOneTick - ( uint32_t ) TIM_GetCounter( TIM2 );
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321 /* Trap under/overflows before the calculated value is used. */
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322 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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323 configASSERT( ulCounterValue != 0 );
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325 /* Use the calculated reload value. */
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326 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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327 TIM_SetCounter( TIM2, 0 );
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329 /* The tick interrupt handler will already have pended the tick
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330 processing in the kernel. As the pending tick will be processed as
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331 soon as this function exits, the tick value maintained by the tick
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332 is stepped forward by one less than the time spent sleeping. The
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333 actual stepping of the tick appears later in this function. */
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334 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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338 /* Something other than the tick interrupt ended the sleep. How
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339 many complete tick periods passed while the processor was
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341 ulCompleteTickPeriods = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) / ulReloadValueForOneTick;
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343 /* Check for over/under flows before the following calculation. */
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344 configASSERT( ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) >= ( ulCompleteTickPeriods * ulReloadValueForOneTick ) );
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346 /* The reload value is set to whatever fraction of a single tick
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348 ulCounterValue = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) - ( ulCompleteTickPeriods * ulReloadValueForOneTick );
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349 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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350 if( ulCounterValue == 0 )
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352 /* There is no fraction remaining. */
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353 ulCounterValue = ulReloadValueForOneTick;
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354 ulCompleteTickPeriods++;
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356 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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357 TIM_SetCounter( TIM2, 0 );
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360 /* Restart TIM2 so it runs up to the reload value. The reload value
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361 will get set to the value required to generate exactly one tick period
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362 the next time the TIM2 interrupt executes. */
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363 TIM_Cmd( TIM2, ENABLE );
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365 /* Wind the tick forward by the number of tick periods that the CPU
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366 remained in a low power state. */
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367 vTaskStepTick( ulCompleteTickPeriods );
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371 #endif /* configCREATE_LOW_POWER_DEMO == 1 */
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