2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /* Standard includes. */
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69 /* FreeRTOS includes. */
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70 #include "FreeRTOS.h"
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73 /* ST library functions. */
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74 #include "stm32l1xx.h"
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77 * When configCREATE_LOW_POWER_DEMO is set to 1 then the tick interrupt
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78 * is generated by the wakeup interrupt of the real time clock (RTC). The RTC
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79 * configuration and handling functions are defined in this file.
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81 * When configCREATE_LOW_POWER_DEMO is set to 0 the tick interrupt is
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82 * generated by the standard FreeRTOS Cortex-M port layer, which uses the
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85 #if configCREATE_LOW_POWER_DEMO == 1
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87 /* The frequency at which TIM2 should run. */
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88 #define lpCLOCK_INPUT_FREQUENCY ( 1000UL )
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90 /* Constants required to pend a PendSV interrupt from the tick ISR if the
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91 preemptive scheduler is being used. These are just standard bits and registers
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92 within the Cortex-M core itself. */
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93 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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95 #define DBGMCU_APB1_FZ ( * ( ( volatile unsigned long * ) 0xE0042008 ) )
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96 /*-----------------------------------------------------------*/
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99 * The tick interrupt is generated by the TIM2 timer. The default interrupt
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100 * handler cannot be used (even with the TIM2 being handled from the tick hook
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101 * function) because the default tick interrupt accesses the SysTick registers
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102 * when configUSE_TICKLESS_IDLE set to 1. TIM2_IRQHandler() is the default name
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103 * for the TIM2 interrupt handler.
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105 void TIM2_IRQHandler( void );
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107 /*-----------------------------------------------------------*/
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109 /* Calculate how many clock increments make up a single tick period. */
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110 static const uint32_t ulReloadValueForOneTick = ( ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ ) - 1 );
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112 /* Holds the maximum number of ticks that can be suppressed - which is
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113 basically how far into the future an interrupt can be generated. Set during
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115 static portTickType xMaximumPossibleSuppressedTicks = 0;
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117 /* Flag set from the tick interrupt to allow the sleep processing to know if
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118 sleep mode was exited because of an RTC interrupt or a different interrupt. */
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119 static volatile uint32_t ulTickFlag = pdFALSE;
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121 /* The RTC counter is stopped temporarily each time it is re-programmed. The
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122 following variable offsets the RTC counter alarm value by the number of RTC
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123 counts that would typically be missed while the counter was stopped to
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124 compensate for the lost time. _RB_ Value needs calculating correctly. */
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125 static uint32_t ulStoppedTimerCompensation = 1;//_RB_ / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
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127 /*-----------------------------------------------------------*/
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129 /* The tick interrupt handler. This is always the same other than the part that
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130 clears the interrupt, which is specific to the clock being used to generate the
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132 void TIM2_IRQHandler( void )
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134 TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
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135 TIM_SetAutoreload( TIM2, ( uint16_t ) ulReloadValueForOneTick );
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137 /* Protect incrementing the tick with an interrupt safe critical section. */
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138 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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140 if( xTaskIncrementTick() != pdFALSE )
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142 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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145 /* Just completely clear the interrupt mask on exit by passing 0 because
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146 it is known that this interrupt will only ever execute with the lowest
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147 possible interrupt priority. */
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149 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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151 /* The CPU woke because of a tick. */
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152 ulTickFlag = pdTRUE;
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154 /*-----------------------------------------------------------*/
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156 /* Override the default definition of vPortSetupTimerInterrupt() that is weakly
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157 defined in the FreeRTOS Cortex-M3 port layer with a version that configures the
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158 wakeup timer of the RTC to generate the tick interrupt. */
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159 void vPortSetupTimerInterrupt( void )
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161 NVIC_InitTypeDef NVIC_InitStructure;
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162 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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164 /* Enable the TIM2 clock, which is used to generate long tickless periods
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165 when the tickless period is finite. */
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166 RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );
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168 /* Ensure clock stops in debug mode. */
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169 DBGMCU_APB1_FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP;
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171 /* Scale the clock so very long tickless periods can be acheived. The
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172 SysTick is not used as even when its frequency is divided by 8 the maximum
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173 tickless period with a system clock of 16MHz is only 8.3 seconds. Using
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174 a prescaled clock on the 16-bit TIM2 allows a tickless period of nearly
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175 66 seconds, albeit at low resolution. */
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176 TIM_TimeBaseStructure.TIM_Prescaler = ( uint16_t ) ( SystemCoreClock / lpCLOCK_INPUT_FREQUENCY );
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177 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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178 TIM_TimeBaseStructure.TIM_Period = ( uint16_t ) ( lpCLOCK_INPUT_FREQUENCY / configTICK_RATE_HZ );
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179 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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180 TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
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182 /* Enable the TIM2 interrupt - used for the tick interrupt when the tickless
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183 period is finite. */
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184 NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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185 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = configLIBRARY_LOWEST_INTERRUPT_PRIORITY; /* Must be set to lowest priority. */
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186 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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187 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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188 NVIC_Init(&NVIC_InitStructure);
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189 TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
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190 TIM_SetCounter( TIM2, 0 );
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191 TIM_Cmd( TIM2, ENABLE );
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193 /* See the comments where xMaximumPossibleSuppressedTicks is declared. */
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194 xMaximumPossibleSuppressedTicks = ( ( unsigned long ) USHRT_MAX ) / ulReloadValueForOneTick;
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196 /*-----------------------------------------------------------*/
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198 /* Override the default definition of vPortSuppressTicksAndSleep() that is
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199 weakly defined in the FreeRTOS Cortex-M3 port layer with a version that manages
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200 the TIM2 interrupt, as the tick is generated from TIM2 compare matches events. */
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201 void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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203 uint32_t ulCounterValue, ulCompleteTickPeriods;
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204 eSleepModeStatus eSleepAction;
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205 portTickType xModifiableIdleTime;
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206 const portTickType xRegulatorOffIdleTime = 30;
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208 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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210 /* Make sure the TIM2 reload value does not overflow the counter. */
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211 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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213 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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216 /* Calculate the reload value required to wait xExpectedIdleTime tick
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218 ulCounterValue = ulReloadValueForOneTick * xExpectedIdleTime;
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219 if( ulCounterValue > ulStoppedTimerCompensation )
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221 /* Compensate for the fact that TIM2 is going to be stopped
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223 ulCounterValue -= ulStoppedTimerCompensation;
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226 /* Stop TIM2 momentarily. The time TIM2 is stopped for is accounted for as
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227 best it can be, but using the tickless mode will inevitably result in some
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228 tiny drift of the time maintained by the kernel with respect to calendar
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230 TIM_Cmd( TIM2, DISABLE );
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232 /* Enter a critical section but don't use the taskENTER_CRITICAL() method as
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233 that will mask interrupts that should exit sleep mode. */
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234 __asm volatile ( "cpsid i" );
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235 __asm volatile ( "dsb" );
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236 __asm volatile ( "isb" );
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238 /* The tick flag is set to false before sleeping. If it is true when sleep
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239 mode is exited then sleep mode was probably exited because the tick was
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240 suppressed for the entire xExpectedIdleTime period. */
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241 ulTickFlag = pdFALSE;
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243 /* If a context switch is pending then abandon the low power entry as
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244 the context switch might have been pended by an external interrupt that
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245 requires processing. */
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246 eSleepAction = eTaskConfirmSleepModeStatus();
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247 if( eSleepAction == eAbortSleep )
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249 /* Restart tick. */
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250 TIM_Cmd( TIM2, ENABLE );
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252 /* Re-enable interrupts - see comments above the cpsid instruction()
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254 __asm volatile ( "cpsie i" );
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256 else if( eSleepAction == eNoTasksWaitingTimeout )
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258 /* There are no running state tasks and no tasks that are blocked with a
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259 time out. Assuming the application does not care if the tick time slips
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260 with respect to calendar time then enter a deep sleep that can only be
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261 woken by (in this demo case) the user button being pushed on the
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262 STM32L discovery board. */
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263 configPRE_STOP_PROCESSING();
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264 PWR_EnterSTOPMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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265 configPOST_STOP_PROCESSING();
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267 /* Restart tick. */
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268 TIM_SetCounter( TIM2, 0 );
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269 TIM_Cmd( TIM2, ENABLE );
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271 /* Re-enable interrupts - see comments above the cpsid instruction()
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273 __asm volatile ( "cpsie i" );
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277 /* Adjust the TIM2 value to take into account that the current time
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278 slice is already partially complete. */
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279 configASSERT( ulCounterValue >= TIM_GetCounter( TIM2 ) );
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280 ulCounterValue -= ( uint32_t ) TIM_GetCounter( TIM2 );
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281 configASSERT( ulCounterValue < ( uint32_t ) USHRT_MAX );
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282 configASSERT( ulCounterValue != 0 );
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283 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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284 TIM_SetCounter( TIM2, 0 );
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286 /* Restart the TIM2. */
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287 TIM_Cmd( TIM2, ENABLE );
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289 /* Allow the application to define some pre-sleep processing. */
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290 xModifiableIdleTime = xExpectedIdleTime;
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291 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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293 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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294 means the application defined code has already executed the WAIT
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296 if( xModifiableIdleTime > 0 )
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298 /* The sleep mode used is dependent on the expected idle time
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299 as the deeper the sleep the longer the wake up time. */
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300 if( xModifiableIdleTime > xRegulatorOffIdleTime )
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302 /* A slightly lower power sleep mode with a longer wake up
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304 PWR_EnterSleepMode( PWR_Regulator_LowPower, PWR_SLEEPEntry_WFI );
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308 /* A slightly higher power sleep mode with a faster wake up
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310 PWR_EnterSleepMode( PWR_Regulator_ON, PWR_SLEEPEntry_WFI );
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314 /* Allow the application to define some post sleep processing. */
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315 configPOST_SLEEP_PROCESSING( xModifiableIdleTime );
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317 /* Stop TIM2. Again, the time the SysTick is stopped for is accounted
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318 for as best it can be, but using the tickless mode will inevitably
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319 result in some tiny drift of the time maintained by the kernel with
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320 respect to calendar time. */
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321 TIM_Cmd( TIM2, DISABLE );
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323 /* Re-enable interrupts - see comments above the cpsid instruction()
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325 __asm volatile ( "cpsie i" );
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326 __asm volatile ( "dsb" );
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327 __asm volatile ( "isb" );
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329 if( ulTickFlag != pdFALSE )
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331 /* The tick interrupt has already executed, although because this
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332 function is called with the scheduler suspended the actual tick
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333 processing will not occur until after this function has exited.
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334 Reset the reload value with whatever remains of this tick period. */
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335 configASSERT( ulReloadValueForOneTick >= ( uint32_t ) TIM_GetCounter( TIM2 ) );
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336 ulCounterValue = ulReloadValueForOneTick - ( uint32_t ) TIM_GetCounter( TIM2 );
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337 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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338 configASSERT( ulCounterValue != 0 );
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339 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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340 TIM_SetCounter( TIM2, 0 );
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342 /* The tick interrupt handler will already have pended the tick
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343 processing in the kernel. As the pending tick will be processed as
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344 soon as this function exits, the tick value maintained by the tick
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345 is stepped forward by one less than the time spent sleeping. The
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346 actual stepping of the tick appears later in this function. */
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347 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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351 /* Something other than the tick interrupt ended the sleep. How
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352 many complete tick periods passed while the processor was
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354 ulCompleteTickPeriods = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) / ulReloadValueForOneTick;
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356 /* The reload value is set to whatever fraction of a single tick
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358 configASSERT( ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) >= ( ulCompleteTickPeriods * ulReloadValueForOneTick ) );
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359 ulCounterValue = ( ( uint32_t ) TIM_GetCounter( TIM2 ) ) - ( ulCompleteTickPeriods * ulReloadValueForOneTick );
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360 configASSERT( ulCounterValue <= ( uint32_t ) USHRT_MAX );
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361 if( ulCounterValue == 0 )
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363 /* There is no fraction remaining. */
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364 ulCounterValue = ulReloadValueForOneTick;
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365 ulCompleteTickPeriods++;
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367 TIM_SetAutoreload( TIM2, ( uint16_t ) ulCounterValue );
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368 TIM_SetCounter( TIM2, 0 );
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371 /* Restart TIM2 so it runs up to the reload value. The reload value
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372 will get set to the value required to generate exactly one tick period
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373 the next time the TIM2 interrupt executes. */
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374 TIM_Cmd( TIM2, ENABLE );
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376 /* Wind the tick forward by the number of tick periods that the CPU
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377 remained in a low power state. */
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378 vTaskStepTick( ulCompleteTickPeriods );
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384 #endif /* configCREATE_LOW_POWER_DEMO == 1 */
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