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[freertos] / FreeRTOS / Demo / CORTUS_APS3_GCC / Demo / RegTest.c
1 /*\r
2     FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
3 \r
4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
5 \r
6     ***************************************************************************\r
7      *                                                                       *\r
8      *    FreeRTOS provides completely free yet professionally developed,    *\r
9      *    robust, strictly quality controlled, supported, and cross          *\r
10      *    platform software that has become a de facto standard.             *\r
11      *                                                                       *\r
12      *    Help yourself get started quickly and support the FreeRTOS         *\r
13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
15      *                                                                       *\r
16      *    Thank you!                                                         *\r
17      *                                                                       *\r
18     ***************************************************************************\r
19 \r
20     This file is part of the FreeRTOS distribution.\r
21 \r
22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
23     the terms of the GNU General Public License (version 2) as published by the\r
24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
25 \r
26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
28     >>! the source code for proprietary components outside of the FreeRTOS\r
29     >>! kernel.\r
30 \r
31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
34     link: http://www.freertos.org/a00114.html\r
35 \r
36     1 tab == 4 spaces!\r
37 \r
38     ***************************************************************************\r
39      *                                                                       *\r
40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
41      *    not run, what could be wrong?"                                     *\r
42      *                                                                       *\r
43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
44      *                                                                       *\r
45     ***************************************************************************\r
46 \r
47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
48     license and Real Time Engineers Ltd. contact details.\r
49 \r
50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
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53 \r
54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
56     licenses offer ticketed support, indemnification and middleware.\r
57 \r
58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
59     engineered and independently SIL3 certified version for use in safety and\r
60     mission critical applications that require provable dependability.\r
61 \r
62     1 tab == 4 spaces!\r
63 */\r
64 \r
65 #include "FreeRTOS.h"\r
66 #include "task.h"\r
67 \r
68 /*\r
69  * Two test tasks that fill the CPU registers with known values before\r
70  * continuously looping round checking that each register still contains its\r
71  * expected value.  Both tasks use a separate set of values, with an incorrect\r
72  * value being found at any time being indicative of an error in the context\r
73  * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
74  * test coverage.  The nature of these tasks necessitates that they are written\r
75  * in assembly code.\r
76  */\r
77 static void vRegTest1( void *pvParameters );\r
78 static void vRegTest2( void *pvParameters );\r
79 \r
80 /* Counters used to ensure the tasks are still running. */\r
81 static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
82 \r
83 /*-----------------------------------------------------------*/\r
84 \r
85 void vStartRegTestTasks( void )\r
86 {\r
87         xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
88         xTaskCreate( vRegTest2, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
89 }\r
90 /*-----------------------------------------------------------*/\r
91 \r
92 static void vRegTest1( void *pvParameters )\r
93 {\r
94         __asm volatile\r
95         (\r
96                 "       mov             r2, #0x02                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
97                 "       mov             r3, #0x03                                                       \n"\r
98                 "       mov             r4, #0x04                                                       \n"\r
99                 "       mov             r5, #0x05                                                       \n"\r
100                 "       mov             r6, #0x06                                                       \n"\r
101                 "       mov             r7, #0x07                                                       \n"\r
102                 "       mov             r8, #0x08                                                       \n"\r
103                 "       mov             r9, #0x09                                                       \n"\r
104                 "       mov             r10, #0x0a                                                      \n"\r
105                 "       mov             r11, #0x0b                                                      \n"\r
106                 "       mov             r12, #0x0c                                                      \n"\r
107                 "       mov             r13, #0x0d                                                      \n"\r
108                 "       mov             r14, #0x0e                                                      \n"\r
109                 "       mov             r15, #0x0f                                                      \n"\r
110                 "                                                                                               \n"\r
111                 "reg_check_loop_1:                                                              \n"\r
112                 "       trap    #31                                                                     \n"\r
113                 "       cmp             r2, #0x02                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
114                 "       bne.s   reg_check_error_1                                       \n"\r
115                 "       cmp             r3, #0x03                                                       \n"\r
116                 "       bne.s   reg_check_error_1                                       \n"\r
117                 "       cmp             r4, #0x04                                                       \n"\r
118                 "       bne.s   reg_check_error_1                                       \n"\r
119                 "       cmp             r5, #0x05                                                       \n"\r
120                 "       bne.s   reg_check_error_1                                       \n"\r
121                 "       cmp             r6, #0x06                                                       \n"\r
122                 "       bne.s   reg_check_error_1                                       \n"\r
123                 "       cmp             r7, #0x07                                                       \n"\r
124                 "       bne.s   reg_check_error_1                                       \n"\r
125                 "       cmp             r8, #0x08                                                       \n"\r
126                 "       bne.s   reg_check_error_1                                       \n"\r
127                 "       cmp             r9, #0x09                                                       \n"\r
128                 "       bne.s   reg_check_error_1                                       \n"\r
129                 "       cmp             r10, #0x0a                                                      \n"\r
130                 "       bne.s   reg_check_error_1                                       \n"\r
131                 "       cmp             r11, #0x0b                                                      \n"\r
132                 "       bne.s   reg_check_error_1                                       \n"\r
133                 "       cmp             r12, #0x0c                                                      \n"\r
134                 "       bne.s   reg_check_error_1                                       \n"\r
135                 "       cmp             r13, #0x0d                                                      \n"\r
136                 "       bne.s   reg_check_error_1                                       \n"\r
137                 "       cmp             r14, #0x0e                                                      \n"\r
138                 "       bne.s   reg_check_error_1                                       \n"\r
139                 "       cmp             r15, #0x0f                                                      \n"\r
140                 "       bne.s   reg_check_error_1                                       \n"\r
141                 "                                                                                               \n"\r
142                 "       ld              r2, [r0]+short(ulRegTest1Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
143                 "       add             r2, #1                                                          \n"\r
144                 "       st              r2, [r0]+short(ulRegTest1Counter)       \n"\r
145                 "       mov             r2, #0x02                                                       \n"\r
146                 "                                                                                               \n"\r
147                 "       bra.s   reg_check_loop_1                                        \n" /* Do it all again. */\r
148                 "                                                                                               \n"\r
149                 "reg_check_error_1:                                                             \n"\r
150                         "bra.s          .                                                               \n"\r
151         );\r
152 }\r
153 /*-----------------------------------------------------------*/\r
154 \r
155 static void vRegTest2( void *pvParameters )\r
156 {\r
157         __asm volatile\r
158         (\r
159                 "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
160                 "       mov             r3, #0x13                                                       \n"\r
161                 "       mov             r4, #0x14                                                       \n"\r
162                 "       mov             r5, #0x15                                                       \n"\r
163                 "       mov             r6, #0x16                                                       \n"\r
164                 "       mov             r7, #0x17                                                       \n"\r
165                 "       mov             r8, #0x18                                                       \n"\r
166                 "       mov             r9, #0x19                                                       \n"\r
167                 "       mov             r10, #0x1a                                                      \n"\r
168                 "       mov             r11, #0x1b                                                      \n"\r
169                 "       mov             r12, #0x1c                                                      \n"\r
170                 "       mov             r13, #0x1d                                                      \n"\r
171                 "       mov             r14, #0x1e                                                      \n"\r
172                 "       mov             r15, #0x1f                                                      \n"\r
173                 "                                                                                               \n"\r
174                 "reg_check_loop_2:                                                              \n"\r
175                 "       cmp             r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
176                 "       bne.s   reg_check_error_2                                       \n"\r
177                 "       cmp             r3, #0x13                                                       \n"\r
178                 "       bne.s   reg_check_error_2                                       \n"\r
179                 "       cmp             r4, #0x14                                                       \n"\r
180                 "       bne.s   reg_check_error_2                                       \n"\r
181                 "       cmp             r5, #0x15                                                       \n"\r
182                 "       bne.s   reg_check_error_2                                       \n"\r
183                 "       cmp             r6, #0x16                                                       \n"\r
184                 "       bne.s   reg_check_error_2                                       \n"\r
185                 "       cmp             r7, #0x17                                                       \n"\r
186                 "       bne.s   reg_check_error_2                                       \n"\r
187                 "       cmp             r8, #0x18                                                       \n"\r
188                 "       bne.s   reg_check_error_2                                       \n"\r
189                 "       cmp             r9, #0x19                                                       \n"\r
190                 "       bne.s   reg_check_error_2                                       \n"\r
191                 "       cmp             r10, #0x1a                                                      \n"\r
192                 "       bne.s   reg_check_error_2                                       \n"\r
193                 "       cmp             r11, #0x1b                                                      \n"\r
194                 "       bne.s   reg_check_error_2                                       \n"\r
195                 "       cmp             r12, #0x1c                                                      \n"\r
196                 "       bne.s   reg_check_error_2                                       \n"\r
197                 "       cmp             r13, #0x1d                                                      \n"\r
198                 "       bne.s   reg_check_error_2                                       \n"\r
199                 "       cmp             r14, #0x1e                                                      \n"\r
200                 "       bne.s   reg_check_error_2                                       \n"\r
201                 "       cmp             r15, #0x1f                                                      \n"\r
202                 "       bne.s   reg_check_error_2                                       \n"\r
203                 "                                                                                               \n"\r
204                 "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
205                 "       add             r2, #1                                                          \n"\r
206                 "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
207                 "       mov             r2, #0x12                                                       \n"\r
208                 "                                                                                               \n"\r
209                 "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
210                 "                                                                                               \n"\r
211                 "reg_check_error_2:                                                             \n"\r
212                         "bra.s          .                                                               \n"\r
213         );\r
214 }\r
215 /*-----------------------------------------------------------*/\r
216 \r
217 portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
218 {\r
219 static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL;\r
220 long lReturn;\r
221 \r
222         /* Check that both loop counters are still incrementing, indicating that\r
223         both reg test tasks are still running error free. */\r
224         if( ulLastCounter1 == ulRegTest1Counter )\r
225         {\r
226                 lReturn = pdFAIL;\r
227         }\r
228         else if( ulLastCounter2 == ulRegTest2Counter )\r
229         {\r
230                 lReturn = pdFAIL;\r
231         }\r
232         else\r
233         {\r
234                 lReturn = pdPASS;\r
235         }\r
236 \r
237         ulLastCounter1 = ulRegTest1Counter;\r
238         ulLastCounter2 = ulRegTest2Counter;\r
239 \r
240         return lReturn;\r
241 }\r