git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c

   1 /*\r
   2     FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3         \r
   4 \r
   5     ***************************************************************************\r
   6      *                                                                       *\r
   7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
   8      *    Complete, revised, and edited pdf reference manuals are also       *\r
   9      *    available.                                                         *\r
  10      *                                                                       *\r
  11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  12      *    ensuring you get running as quickly as possible and with an        *\r
  13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  14      *    the FreeRTOS project to continue with its mission of providing     *\r
  15      *    professional grade, cross platform, de facto standard solutions    *\r
  16      *    for microcontrollers - completely free of charge!                  *\r
  17      *                                                                       *\r
  18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  19      *                                                                       *\r
  20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  21      *                                                                       *\r
  22     ***************************************************************************\r
  23 \r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  31     distribute a combined work that includes FreeRTOS without being obliged to\r
  32     provide the source code for proprietary components outside of the FreeRTOS\r
  33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public\r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43     \r
  44     ***************************************************************************\r
  45      *                                                                       *\r
  46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  47      *    not run, what could be wrong?                                      *\r
  48      *                                                                       *\r
  49      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  50      *                                                                       *\r
  51     ***************************************************************************\r
  52 \r
  53     \r
  54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
  55     license and contact details.\r
  56     \r
  57     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  58     including FreeRTOS+Trace - an indispensable productivity tool.\r
  59 \r
  60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
  61     the code with commercial support, indemnification, and middleware, under \r
  62     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
  63     provide a safety engineered and independently SIL3 certified version under \r
  64     the SafeRTOS brand: http://www.SafeRTOS.com.\r
  65 */\r
  66 \r
  67 #include "FreeRTOS.h"\r
  68 #include "task.h"\r
  69 \r
  70 /*\r
  71  * Two test tasks that fill the CPU registers with known values before\r
  72  * continuously looping round checking that each register still contains its\r
  73  * expected value.  Both tasks use a separate set of values, with an incorrect\r
  74  * value being found at any time being indicative of an error in the context\r
  75  * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
  76  * test coverage.  The nature of these tasks necessitates that they are written\r
  77  * in assembly code.\r
  78  */\r
  79 static void vRegTest1( void *pvParameters );\r
  80 static void vRegTest2( void *pvParameters );\r
  81 \r
  82 /*\r
  83  * A task that tests the management of the Interrupt Controller (IC) during a\r
  84  * context switch.  The state of the IC current mask level must be maintained\r
  85  * across context switches.  Also, yields must be able to be performed when the\r
  86  * interrupt controller mask is not zero.  This task tests both these\r
  87  * requirements.\r
  88  */\r
  89 static void prvICCheck1Task( void *pvParameters );\r
  90 \r
  91 /* Counters used to ensure the tasks are still running. */\r
  92 static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL, ulICTestCounter = 0UL;\r
  93 \r
  94 /* Handle to the task that checks the interrupt controller behaviour.  This is\r
  95 used by the traceTASK_SWITCHED_OUT() macro, which is defined in\r
  96 FreeRTOSConfig.h and can be removed - it is just for the purpose of this test. */\r
  97 xTaskHandle xICTestTask = NULL;\r
  98 \r
  99 /* Variable that gets set to pdTRUE by traceTASK_SWITCHED_OUT each time\r
 100 is switched out. */\r
 101 volatile unsigned long ulTaskSwitchedOut;\r
 102 /*-----------------------------------------------------------*/\r
 103 \r
 104 void vStartRegTestTasks( void )\r
 105 {\r
 106         xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 107         xTaskCreate( vRegTest2, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 108         xTaskCreate( prvICCheck1Task, ( signed char * ) "ICCheck", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xICTestTask );\r
 109 }\r
 110 /*-----------------------------------------------------------*/\r
 111 \r
 112 static void vRegTest1( void *pvParameters )\r
 113 {\r
 114         __asm volatile\r
 115         (\r
 116                 "       mov             r2, #0x02                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 117                 "       mov             r3, #0x03                                                       \n"\r
 118                 "       mov             r4, #0x04                                                       \n"\r
 119                 "       mov             r5, #0x05                                                       \n"\r
 120                 "       mov             r6, #0x06                                                       \n"\r
 121                 "       mov             r7, #0x07                                                       \n"\r
 122                 "       mov             r8, #0x08                                                       \n"\r
 123                 "       mov             r9, #0x09                                                       \n"\r
 124                 "       mov             r10, #0x0a                                                      \n"\r
 125                 "       mov             r11, #0x0b                                                      \n"\r
 126                 "       mov             r12, #0x0c                                                      \n"\r
 127                 "       mov             r13, #0x0d                                                      \n"\r
 128                 "       mov             r14, #0x0e                                                      \n"\r
 129                 "       mov             r15, #0x0f                                                      \n"\r
 130                 "                                                                                               \n"\r
 131                 "reg_check_loop_1:                                                              \n"\r
 132                 "       trap    #31                                                                     \n"\r
 133                 "       cmp             r2, #0x02                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 134                 "       bne.s   reg_check_error_1                                       \n"\r
 135                 "       cmp             r3, #0x03                                                       \n"\r
 136                 "       bne.s   reg_check_error_1                                       \n"\r
 137                 "       cmp             r4, #0x04                                                       \n"\r
 138                 "       bne.s   reg_check_error_1                                       \n"\r
 139                 "       cmp             r5, #0x05                                                       \n"\r
 140                 "       bne.s   reg_check_error_1                                       \n"\r
 141                 "       cmp             r6, #0x06                                                       \n"\r
 142                 "       bne.s   reg_check_error_1                                       \n"\r
 143                 "       cmp             r7, #0x07                                                       \n"\r
 144                 "       bne.s   reg_check_error_1                                       \n"\r
 145                 "       cmp             r8, #0x08                                                       \n"\r
 146                 "       bne.s   reg_check_error_1                                       \n"\r
 147                 "       cmp             r9, #0x09                                                       \n"\r
 148                 "       bne.s   reg_check_error_1                                       \n"\r
 149                 "       cmp             r10, #0x0a                                                      \n"\r
 150                 "       bne.s   reg_check_error_1                                       \n"\r
 151                 "       cmp             r11, #0x0b                                                      \n"\r
 152                 "       bne.s   reg_check_error_1                                       \n"\r
 153                 "       cmp             r12, #0x0c                                                      \n"\r
 154                 "       bne.s   reg_check_error_1                                       \n"\r
 155                 "       cmp             r13, #0x0d                                                      \n"\r
 156                 "       bne.s   reg_check_error_1                                       \n"\r
 157                 "       cmp             r14, #0x0e                                                      \n"\r
 158                 "       bne.s   reg_check_error_1                                       \n"\r
 159                 "       cmp             r15, #0x0f                                                      \n"\r
 160                 "       bne.s   reg_check_error_1                                       \n"\r
 161                 "                                                                                               \n"\r
 162                 "       ld              r2, [r0]+short(ulRegTest1Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 163                 "       add             r2, #1                                                          \n"\r
 164                 "       st              r2, [r0]+short(ulRegTest1Counter)       \n"\r
 165                 "       mov             r2, #0x02                                                       \n"\r
 166                 "                                                                                               \n"\r
 167                 "       bra.s   reg_check_loop_1                                        \n" /* Do it all again. */\r
 168                 "                                                                                               \n"\r
 169                 "reg_check_error_1:                                                             \n"\r
 170                         "bra.s          .                                                               \n"\r
 171         );\r
 172 }\r
 173 /*-----------------------------------------------------------*/\r
 174 \r
 175 static void vRegTest2( void *pvParameters )\r
 176 {\r
 177         __asm volatile\r
 178         (\r
 179                 "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 180                 "       mov             r3, #0x13                                                       \n"\r
 181                 "       mov             r4, #0x14                                                       \n"\r
 182                 "       mov             r5, #0x15                                                       \n"\r
 183                 "       mov             r6, #0x16                                                       \n"\r
 184                 "       mov             r7, #0x17                                                       \n"\r
 185                 "       mov             r8, #0x18                                                       \n"\r
 186                 "       mov             r9, #0x19                                                       \n"\r
 187                 "       mov             r10, #0x1a                                                      \n"\r
 188                 "       mov             r11, #0x1b                                                      \n"\r
 189                 "       mov             r12, #0x1c                                                      \n"\r
 190                 "       mov             r13, #0x1d                                                      \n"\r
 191                 "       mov             r14, #0x1e                                                      \n"\r
 192                 "       mov             r15, #0x1f                                                      \n"\r
 193                 "                                                                                               \n"\r
 194                 "reg_check_loop_2:                                                              \n"\r
 195                 "       cmp             r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 196                 "       bne.s   reg_check_error_2                                       \n"\r
 197                 "       cmp             r3, #0x13                                                       \n"\r
 198                 "       bne.s   reg_check_error_2                                       \n"\r
 199                 "       cmp             r4, #0x14                                                       \n"\r
 200                 "       bne.s   reg_check_error_2                                       \n"\r
 201                 "       cmp             r5, #0x15                                                       \n"\r
 202                 "       bne.s   reg_check_error_2                                       \n"\r
 203                 "       cmp             r6, #0x16                                                       \n"\r
 204                 "       bne.s   reg_check_error_2                                       \n"\r
 205                 "       cmp             r7, #0x17                                                       \n"\r
 206                 "       bne.s   reg_check_error_2                                       \n"\r
 207                 "       cmp             r8, #0x18                                                       \n"\r
 208                 "       bne.s   reg_check_error_2                                       \n"\r
 209                 "       cmp             r9, #0x19                                                       \n"\r
 210                 "       bne.s   reg_check_error_2                                       \n"\r
 211                 "       cmp             r10, #0x1a                                                      \n"\r
 212                 "       bne.s   reg_check_error_2                                       \n"\r
 213                 "       cmp             r11, #0x1b                                                      \n"\r
 214                 "       bne.s   reg_check_error_2                                       \n"\r
 215                 "       cmp             r12, #0x1c                                                      \n"\r
 216                 "       bne.s   reg_check_error_2                                       \n"\r
 217                 "       cmp             r13, #0x1d                                                      \n"\r
 218                 "       bne.s   reg_check_error_2                                       \n"\r
 219                 "       cmp             r14, #0x1e                                                      \n"\r
 220                 "       bne.s   reg_check_error_2                                       \n"\r
 221                 "       cmp             r15, #0x1f                                                      \n"\r
 222                 "       bne.s   reg_check_error_2                                       \n"\r
 223                 "                                                                                               \n"\r
 224                 "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 225                 "       add             r2, #1                                                          \n"\r
 226                 "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
 227                 "       mov             r2, #0x12                                                       \n"\r
 228                 "                                                                                               \n"\r
 229                 "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
 230                 "                                                                                               \n"\r
 231                 "reg_check_error_2:                                                             \n"\r
 232                         "bra.s          .                                                               \n"\r
 233         );\r
 234 }\r
 235 /*-----------------------------------------------------------*/\r
 236 \r
 237 static void prvICCheck1Task( void *pvParameters )\r
 238 {\r
 239 long lICCheckStatus = pdPASS;\r
 240 \r
 241         for( ;; )\r
 242         {\r
 243                 /* At this point the interrupt mask should be zero. */\r
 244                 if( ic->cpl != 0 )\r
 245                 {\r
 246                         lICCheckStatus = pdFAIL;\r
 247                 }\r
 248 \r
 249                 /* If we yield here, it should still be 0 when the task next runs.\r
 250                 ulTaskSwitchedOut is just used to check that a switch does actually\r
 251                 happen. */\r
 252                 ulTaskSwitchedOut = pdFALSE;\r
 253                 taskYIELD();\r
 254                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != 0 ) )\r
 255                 {\r
 256                         lICCheckStatus = pdFAIL;\r
 257                 }\r
 258 \r
 259                 /* Set the interrupt mask to portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1,\r
 260                 before checking it is as expected. */\r
 261                 taskENTER_CRITICAL();\r
 262                 if( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) )\r
 263                 {\r
 264                         lICCheckStatus = pdFAIL;\r
 265                 }\r
 266 \r
 267                 /* If we yield here, it should still be\r
 268                 portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 10 when the task next runs.  */\r
 269                 ulTaskSwitchedOut = pdFALSE;\r
 270                 taskYIELD();\r
 271                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) ) )\r
 272                 {\r
 273                         lICCheckStatus = pdFAIL;\r
 274                 }\r
 275 \r
 276                 /* Return the interrupt mask to its default state. */\r
 277                 taskEXIT_CRITICAL();\r
 278 \r
 279                 /* Just increment a loop counter so the check task knows if this task\r
 280                 is still running or not. */\r
 281                 if( lICCheckStatus == pdPASS )\r
 282                 {\r
 283                         ulICTestCounter++;\r
 284                 }\r
 285         }\r
 286 }\r
 287 /*-----------------------------------------------------------*/\r
 288 \r
 289 portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
 290 {\r
 291 static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL, ulLastICTestCounter = 0UL;\r
 292 long lReturn;\r
 293 \r
 294         /* Check that both loop counters are still incrementing, indicating that\r
 295         both reg test tasks are still running error free. */\r
 296         if( ulLastCounter1 == ulRegTest1Counter )\r
 297         {\r
 298                 lReturn = pdFAIL;\r
 299         }\r
 300         else if( ulLastCounter2 == ulRegTest2Counter )\r
 301         {\r
 302                 lReturn = pdFAIL;\r
 303         }\r
 304         else if( ulLastICTestCounter == ulICTestCounter )\r
 305         {\r
 306                 lReturn = pdFAIL;\r
 307         }\r
 308         else\r
 309         {\r
 310                 lReturn = pdPASS;\r
 311         }\r
 312 \r
 313         ulLastCounter1 = ulRegTest1Counter;\r
 314         ulLastCounter2 = ulRegTest2Counter;\r
 315         ulLastICTestCounter = ulICTestCounter;\r
 316 \r
 317         return lReturn;\r
 318 }\r
 319 \r
 320 \r
 321 \r
 322 \r
 323 \r
 324 \r
 325 \r
 326 \r
 327 \r
 328 \r
 329 \r
 330 \r
 331 \r
 332 \r