git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c

   1 /*\r
   2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
  11      *    available.                                                         *\r
  12      *                                                                       *\r
  13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  14      *    ensuring you get running as quickly as possible and with an        *\r
  15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  16      *    the FreeRTOS project to continue with its mission of providing     *\r
  17      *    professional grade, cross platform, de facto standard solutions    *\r
  18      *    for microcontrollers - completely free of charge!                  *\r
  19      *                                                                       *\r
  20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  21      *                                                                       *\r
  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32     >>>NOTE<<< The modification to the GPL is included to allow you to\r
  33     distribute a combined work that includes FreeRTOS without being obliged to\r
  34     provide the source code for proprietary components outside of the FreeRTOS\r
  35     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
  36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  38     more details. You should have received a copy of the GNU General Public\r
  39     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
  40     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
  41     by writing to Richard Barry, contact details for whom are available on the\r
  42     FreeRTOS WEB site.\r
  43 \r
  44     1 tab == 4 spaces!\r
  45     \r
  46     ***************************************************************************\r
  47      *                                                                       *\r
  48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  49      *    not run, what could be wrong?"                                     *\r
  50      *                                                                       *\r
  51      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  52      *                                                                       *\r
  53     ***************************************************************************\r
  54 \r
  55     \r
  56     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
  57     and contact details.  \r
  58     \r
  59     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  60     including FreeRTOS+Trace - an indispensable productivity tool.\r
  61 \r
  62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
  63     the code with commercial support, indemnification, and middleware, under \r
  64     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
  65     provide a safety engineered and independently SIL3 certified version under \r
  66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
  67 */\r
  68 \r
  69 #include "FreeRTOS.h"\r
  70 #include "task.h"\r
  71 \r
  72 /*\r
  73  * Two test tasks that fill the CPU registers with known values before\r
  74  * continuously looping round checking that each register still contains its\r
  75  * expected value.  Both tasks use a separate set of values, with an incorrect\r
  76  * value being found at any time being indicative of an error in the context\r
  77  * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
  78  * test coverage.  The nature of these tasks necessitates that they are written\r
  79  * in assembly code.\r
  80  */\r
  81 static void vRegTest1( void *pvParameters );\r
  82 static void vRegTest2( void *pvParameters );\r
  83 \r
  84 /*\r
  85  * A task that tests the management of the Interrupt Controller (IC) during a\r
  86  * context switch.  The state of the IC current mask level must be maintained\r
  87  * across context switches.  Also, yields must be able to be performed when the\r
  88  * interrupt controller mask is not zero.  This task tests both these\r
  89  * requirements.\r
  90  */\r
  91 static void prvICCheck1Task( void *pvParameters );\r
  92 \r
  93 /* Counters used to ensure the tasks are still running. */\r
  94 static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL, ulICTestCounter = 0UL;\r
  95 \r
  96 /* Handle to the task that checks the interrupt controller behaviour.  This is\r
  97 used by the traceTASK_SWITCHED_OUT() macro, which is defined in\r
  98 FreeRTOSConfig.h and can be removed - it is just for the purpose of this test. */\r
  99 xTaskHandle xICTestTask = NULL;\r
 100 \r
 101 /* Variable that gets set to pdTRUE by traceTASK_SWITCHED_OUT each time\r
 102 is switched out. */\r
 103 volatile unsigned long ulTaskSwitchedOut;\r
 104 /*-----------------------------------------------------------*/\r
 105 \r
 106 void vStartRegTestTasks( void )\r
 107 {\r
 108         xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 109         xTaskCreate( vRegTest2, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
 110         xTaskCreate( prvICCheck1Task, ( signed char * ) "ICCheck", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xICTestTask );\r
 111 }\r
 112 /*-----------------------------------------------------------*/\r
 113 \r
 114 static void vRegTest1( void *pvParameters )\r
 115 {\r
 116         __asm volatile\r
 117         (\r
 118                 "       mov             r2, #0x02                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 119                 "       mov             r3, #0x03                                                       \n"\r
 120                 "       mov             r4, #0x04                                                       \n"\r
 121                 "       mov             r5, #0x05                                                       \n"\r
 122                 "       mov             r6, #0x06                                                       \n"\r
 123                 "       mov             r7, #0x07                                                       \n"\r
 124                 "       mov             r8, #0x08                                                       \n"\r
 125                 "       mov             r9, #0x09                                                       \n"\r
 126                 "       mov             r10, #0x0a                                                      \n"\r
 127                 "       mov             r11, #0x0b                                                      \n"\r
 128                 "       mov             r12, #0x0c                                                      \n"\r
 129                 "       mov             r13, #0x0d                                                      \n"\r
 130                 "       mov             r14, #0x0e                                                      \n"\r
 131                 "       mov             r15, #0x0f                                                      \n"\r
 132                 "                                                                                               \n"\r
 133                 "reg_check_loop_1:                                                              \n"\r
 134                 "       trap    #31                                                                     \n"\r
 135                 "       cmp             r2, #0x02                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 136                 "       bne.s   reg_check_error_1                                       \n"\r
 137                 "       cmp             r3, #0x03                                                       \n"\r
 138                 "       bne.s   reg_check_error_1                                       \n"\r
 139                 "       cmp             r4, #0x04                                                       \n"\r
 140                 "       bne.s   reg_check_error_1                                       \n"\r
 141                 "       cmp             r5, #0x05                                                       \n"\r
 142                 "       bne.s   reg_check_error_1                                       \n"\r
 143                 "       cmp             r6, #0x06                                                       \n"\r
 144                 "       bne.s   reg_check_error_1                                       \n"\r
 145                 "       cmp             r7, #0x07                                                       \n"\r
 146                 "       bne.s   reg_check_error_1                                       \n"\r
 147                 "       cmp             r8, #0x08                                                       \n"\r
 148                 "       bne.s   reg_check_error_1                                       \n"\r
 149                 "       cmp             r9, #0x09                                                       \n"\r
 150                 "       bne.s   reg_check_error_1                                       \n"\r
 151                 "       cmp             r10, #0x0a                                                      \n"\r
 152                 "       bne.s   reg_check_error_1                                       \n"\r
 153                 "       cmp             r11, #0x0b                                                      \n"\r
 154                 "       bne.s   reg_check_error_1                                       \n"\r
 155                 "       cmp             r12, #0x0c                                                      \n"\r
 156                 "       bne.s   reg_check_error_1                                       \n"\r
 157                 "       cmp             r13, #0x0d                                                      \n"\r
 158                 "       bne.s   reg_check_error_1                                       \n"\r
 159                 "       cmp             r14, #0x0e                                                      \n"\r
 160                 "       bne.s   reg_check_error_1                                       \n"\r
 161                 "       cmp             r15, #0x0f                                                      \n"\r
 162                 "       bne.s   reg_check_error_1                                       \n"\r
 163                 "                                                                                               \n"\r
 164                 "       ld              r2, [r0]+short(ulRegTest1Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 165                 "       add             r2, #1                                                          \n"\r
 166                 "       st              r2, [r0]+short(ulRegTest1Counter)       \n"\r
 167                 "       mov             r2, #0x02                                                       \n"\r
 168                 "                                                                                               \n"\r
 169                 "       bra.s   reg_check_loop_1                                        \n" /* Do it all again. */\r
 170                 "                                                                                               \n"\r
 171                 "reg_check_error_1:                                                             \n"\r
 172                         "bra.s          .                                                               \n"\r
 173         );\r
 174 }\r
 175 /*-----------------------------------------------------------*/\r
 176 \r
 177 static void vRegTest2( void *pvParameters )\r
 178 {\r
 179         __asm volatile\r
 180         (\r
 181                 "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 182                 "       mov             r3, #0x13                                                       \n"\r
 183                 "       mov             r4, #0x14                                                       \n"\r
 184                 "       mov             r5, #0x15                                                       \n"\r
 185                 "       mov             r6, #0x16                                                       \n"\r
 186                 "       mov             r7, #0x17                                                       \n"\r
 187                 "       mov             r8, #0x18                                                       \n"\r
 188                 "       mov             r9, #0x19                                                       \n"\r
 189                 "       mov             r10, #0x1a                                                      \n"\r
 190                 "       mov             r11, #0x1b                                                      \n"\r
 191                 "       mov             r12, #0x1c                                                      \n"\r
 192                 "       mov             r13, #0x1d                                                      \n"\r
 193                 "       mov             r14, #0x1e                                                      \n"\r
 194                 "       mov             r15, #0x1f                                                      \n"\r
 195                 "                                                                                               \n"\r
 196                 "reg_check_loop_2:                                                              \n"\r
 197                 "       cmp             r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 198                 "       bne.s   reg_check_error_2                                       \n"\r
 199                 "       cmp             r3, #0x13                                                       \n"\r
 200                 "       bne.s   reg_check_error_2                                       \n"\r
 201                 "       cmp             r4, #0x14                                                       \n"\r
 202                 "       bne.s   reg_check_error_2                                       \n"\r
 203                 "       cmp             r5, #0x15                                                       \n"\r
 204                 "       bne.s   reg_check_error_2                                       \n"\r
 205                 "       cmp             r6, #0x16                                                       \n"\r
 206                 "       bne.s   reg_check_error_2                                       \n"\r
 207                 "       cmp             r7, #0x17                                                       \n"\r
 208                 "       bne.s   reg_check_error_2                                       \n"\r
 209                 "       cmp             r8, #0x18                                                       \n"\r
 210                 "       bne.s   reg_check_error_2                                       \n"\r
 211                 "       cmp             r9, #0x19                                                       \n"\r
 212                 "       bne.s   reg_check_error_2                                       \n"\r
 213                 "       cmp             r10, #0x1a                                                      \n"\r
 214                 "       bne.s   reg_check_error_2                                       \n"\r
 215                 "       cmp             r11, #0x1b                                                      \n"\r
 216                 "       bne.s   reg_check_error_2                                       \n"\r
 217                 "       cmp             r12, #0x1c                                                      \n"\r
 218                 "       bne.s   reg_check_error_2                                       \n"\r
 219                 "       cmp             r13, #0x1d                                                      \n"\r
 220                 "       bne.s   reg_check_error_2                                       \n"\r
 221                 "       cmp             r14, #0x1e                                                      \n"\r
 222                 "       bne.s   reg_check_error_2                                       \n"\r
 223                 "       cmp             r15, #0x1f                                                      \n"\r
 224                 "       bne.s   reg_check_error_2                                       \n"\r
 225                 "                                                                                               \n"\r
 226                 "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 227                 "       add             r2, #1                                                          \n"\r
 228                 "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
 229                 "       mov             r2, #0x12                                                       \n"\r
 230                 "                                                                                               \n"\r
 231                 "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
 232                 "                                                                                               \n"\r
 233                 "reg_check_error_2:                                                             \n"\r
 234                         "bra.s          .                                                               \n"\r
 235         );\r
 236 }\r
 237 /*-----------------------------------------------------------*/\r
 238 \r
 239 static void prvICCheck1Task( void *pvParameters )\r
 240 {\r
 241 long lICCheckStatus = pdPASS;\r
 242 \r
 243         for( ;; )\r
 244         {\r
 245                 /* At this point the interrupt mask should be zero. */\r
 246                 if( ic->cpl != 0 )\r
 247                 {\r
 248                         lICCheckStatus = pdFAIL;\r
 249                 }\r
 250 \r
 251                 /* If we yield here, it should still be 0 when the task next runs.\r
 252                 ulTaskSwitchedOut is just used to check that a switch does actually\r
 253                 happen. */\r
 254                 ulTaskSwitchedOut = pdFALSE;\r
 255                 taskYIELD();\r
 256                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != 0 ) )\r
 257                 {\r
 258                         lICCheckStatus = pdFAIL;\r
 259                 }\r
 260 \r
 261                 /* Set the interrupt mask to portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1,\r
 262                 before checking it is as expected. */\r
 263                 taskENTER_CRITICAL();\r
 264                 if( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) )\r
 265                 {\r
 266                         lICCheckStatus = pdFAIL;\r
 267                 }\r
 268 \r
 269                 /* If we yield here, it should still be\r
 270                 portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 10 when the task next runs.  */\r
 271                 ulTaskSwitchedOut = pdFALSE;\r
 272                 taskYIELD();\r
 273                 if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) ) )\r
 274                 {\r
 275                         lICCheckStatus = pdFAIL;\r
 276                 }\r
 277 \r
 278                 /* Return the interrupt mask to its default state. */\r
 279                 taskEXIT_CRITICAL();\r
 280 \r
 281                 /* Just increment a loop counter so the check task knows if this task\r
 282                 is still running or not. */\r
 283                 if( lICCheckStatus == pdPASS )\r
 284                 {\r
 285                         ulICTestCounter++;\r
 286                 }\r
 287         }\r
 288 }\r
 289 /*-----------------------------------------------------------*/\r
 290 \r
 291 portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
 292 {\r
 293 static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL, ulLastICTestCounter = 0UL;\r
 294 long lReturn;\r
 295 \r
 296         /* Check that both loop counters are still incrementing, indicating that\r
 297         both reg test tasks are still running error free. */\r
 298         if( ulLastCounter1 == ulRegTest1Counter )\r
 299         {\r
 300                 lReturn = pdFAIL;\r
 301         }\r
 302         else if( ulLastCounter2 == ulRegTest2Counter )\r
 303         {\r
 304                 lReturn = pdFAIL;\r
 305         }\r
 306         else if( ulLastICTestCounter == ulICTestCounter )\r
 307         {\r
 308                 lReturn = pdFAIL;\r
 309         }\r
 310         else\r
 311         {\r
 312                 lReturn = pdPASS;\r
 313         }\r
 314 \r
 315         ulLastCounter1 = ulRegTest1Counter;\r
 316         ulLastCounter2 = ulRegTest2Counter;\r
 317         ulLastICTestCounter = ulICTestCounter;\r
 318 \r
 319         return lReturn;\r
 320 }\r
 321 \r
 322 \r
 323 \r
 324 \r
 325 \r
 326 \r
 327 \r
 328 \r
 329 \r
 330 \r
 331 \r
 332 \r
 333 \r
 334 \r