git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/CORTUS_APS3_GCC/Demo/RegTest.c

   1 /*\r
   2  * FreeRTOS Kernel V10.0.0\r
   3  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
   4  *\r
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
   6  * this software and associated documentation files (the "Software"), to deal in\r
   7  * the Software without restriction, including without limitation the rights to\r
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
   9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
  10  * subject to the following conditions:\r
  11  *\r
  12  * The above copyright notice and this permission notice shall be included in all\r
  13  * copies or substantial portions of the Software. If you wish to use our Amazon\r
  14  * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
  15  *\r
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
  18  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
  19  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
  20  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
  22  *\r
  23  * http://www.FreeRTOS.org\r
  24  * http://aws.amazon.com/freertos\r
  25  *\r
  26  * 1 tab == 4 spaces!\r
  27  */\r
  28 \r
  29 #include "FreeRTOS.h"\r
  30 #include "task.h"\r
  31 \r
  32 /*\r
  33  * Two test tasks that fill the CPU registers with known values before\r
  34  * continuously looping round checking that each register still contains its\r
  35  * expected value.  Both tasks use a separate set of values, with an incorrect\r
  36  * value being found at any time being indicative of an error in the context\r
  37  * switch mechanism.  One of the tasks uses a yield instruction to increase the\r
  38  * test coverage.  The nature of these tasks necessitates that they are written\r
  39  * in assembly code.\r
  40  */\r
  41 static void vRegTest1( void *pvParameters );\r
  42 static void vRegTest2( void *pvParameters );\r
  43 \r
  44 /* Counters used to ensure the tasks are still running. */\r
  45 static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;\r
  46 \r
  47 /*-----------------------------------------------------------*/\r
  48 \r
  49 void vStartRegTestTasks( void )\r
  50 {\r
  51         xTaskCreate( vRegTest1, "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
  52         xTaskCreate( vRegTest2, "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
  53 }\r
  54 /*-----------------------------------------------------------*/\r
  55 \r
  56 static void vRegTest1( void *pvParameters )\r
  57 {\r
  58         __asm volatile\r
  59         (\r
  60                 "       mov             r2, #0x02                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
  61                 "       mov             r3, #0x03                                                       \n"\r
  62                 "       mov             r4, #0x04                                                       \n"\r
  63                 "       mov             r5, #0x05                                                       \n"\r
  64                 "       mov             r6, #0x06                                                       \n"\r
  65                 "       mov             r7, #0x07                                                       \n"\r
  66                 "       mov             r8, #0x08                                                       \n"\r
  67                 "       mov             r9, #0x09                                                       \n"\r
  68                 "       mov             r10, #0x0a                                                      \n"\r
  69                 "       mov             r11, #0x0b                                                      \n"\r
  70                 "       mov             r12, #0x0c                                                      \n"\r
  71                 "       mov             r13, #0x0d                                                      \n"\r
  72                 "       mov             r14, #0x0e                                                      \n"\r
  73                 "       mov             r15, #0x0f                                                      \n"\r
  74                 "                                                                                               \n"\r
  75                 "reg_check_loop_1:                                                              \n"\r
  76                 "       trap    #31                                                                     \n"\r
  77                 "       cmp             r2, #0x02                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
  78                 "       bne.s   reg_check_error_1                                       \n"\r
  79                 "       cmp             r3, #0x03                                                       \n"\r
  80                 "       bne.s   reg_check_error_1                                       \n"\r
  81                 "       cmp             r4, #0x04                                                       \n"\r
  82                 "       bne.s   reg_check_error_1                                       \n"\r
  83                 "       cmp             r5, #0x05                                                       \n"\r
  84                 "       bne.s   reg_check_error_1                                       \n"\r
  85                 "       cmp             r6, #0x06                                                       \n"\r
  86                 "       bne.s   reg_check_error_1                                       \n"\r
  87                 "       cmp             r7, #0x07                                                       \n"\r
  88                 "       bne.s   reg_check_error_1                                       \n"\r
  89                 "       cmp             r8, #0x08                                                       \n"\r
  90                 "       bne.s   reg_check_error_1                                       \n"\r
  91                 "       cmp             r9, #0x09                                                       \n"\r
  92                 "       bne.s   reg_check_error_1                                       \n"\r
  93                 "       cmp             r10, #0x0a                                                      \n"\r
  94                 "       bne.s   reg_check_error_1                                       \n"\r
  95                 "       cmp             r11, #0x0b                                                      \n"\r
  96                 "       bne.s   reg_check_error_1                                       \n"\r
  97                 "       cmp             r12, #0x0c                                                      \n"\r
  98                 "       bne.s   reg_check_error_1                                       \n"\r
  99                 "       cmp             r13, #0x0d                                                      \n"\r
 100                 "       bne.s   reg_check_error_1                                       \n"\r
 101                 "       cmp             r14, #0x0e                                                      \n"\r
 102                 "       bne.s   reg_check_error_1                                       \n"\r
 103                 "       cmp             r15, #0x0f                                                      \n"\r
 104                 "       bne.s   reg_check_error_1                                       \n"\r
 105                 "                                                                                               \n"\r
 106                 "       ld              r2, [r0]+short(ulRegTest1Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 107                 "       add             r2, #1                                                          \n"\r
 108                 "       st              r2, [r0]+short(ulRegTest1Counter)       \n"\r
 109                 "       mov             r2, #0x02                                                       \n"\r
 110                 "                                                                                               \n"\r
 111                 "       bra.s   reg_check_loop_1                                        \n" /* Do it all again. */\r
 112                 "                                                                                               \n"\r
 113                 "reg_check_error_1:                                                             \n"\r
 114                         "bra.s          .                                                               \n"\r
 115         );\r
 116 }\r
 117 /*-----------------------------------------------------------*/\r
 118 \r
 119 static void vRegTest2( void *pvParameters )\r
 120 {\r
 121         __asm volatile\r
 122         (\r
 123                 "       mov             r2, #0x12                                                       \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */\r
 124                 "       mov             r3, #0x13                                                       \n"\r
 125                 "       mov             r4, #0x14                                                       \n"\r
 126                 "       mov             r5, #0x15                                                       \n"\r
 127                 "       mov             r6, #0x16                                                       \n"\r
 128                 "       mov             r7, #0x17                                                       \n"\r
 129                 "       mov             r8, #0x18                                                       \n"\r
 130                 "       mov             r9, #0x19                                                       \n"\r
 131                 "       mov             r10, #0x1a                                                      \n"\r
 132                 "       mov             r11, #0x1b                                                      \n"\r
 133                 "       mov             r12, #0x1c                                                      \n"\r
 134                 "       mov             r13, #0x1d                                                      \n"\r
 135                 "       mov             r14, #0x1e                                                      \n"\r
 136                 "       mov             r15, #0x1f                                                      \n"\r
 137                 "                                                                                               \n"\r
 138                 "reg_check_loop_2:                                                              \n"\r
 139                 "       cmp             r2, #0x12                                                       \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */\r
 140                 "       bne.s   reg_check_error_2                                       \n"\r
 141                 "       cmp             r3, #0x13                                                       \n"\r
 142                 "       bne.s   reg_check_error_2                                       \n"\r
 143                 "       cmp             r4, #0x14                                                       \n"\r
 144                 "       bne.s   reg_check_error_2                                       \n"\r
 145                 "       cmp             r5, #0x15                                                       \n"\r
 146                 "       bne.s   reg_check_error_2                                       \n"\r
 147                 "       cmp             r6, #0x16                                                       \n"\r
 148                 "       bne.s   reg_check_error_2                                       \n"\r
 149                 "       cmp             r7, #0x17                                                       \n"\r
 150                 "       bne.s   reg_check_error_2                                       \n"\r
 151                 "       cmp             r8, #0x18                                                       \n"\r
 152                 "       bne.s   reg_check_error_2                                       \n"\r
 153                 "       cmp             r9, #0x19                                                       \n"\r
 154                 "       bne.s   reg_check_error_2                                       \n"\r
 155                 "       cmp             r10, #0x1a                                                      \n"\r
 156                 "       bne.s   reg_check_error_2                                       \n"\r
 157                 "       cmp             r11, #0x1b                                                      \n"\r
 158                 "       bne.s   reg_check_error_2                                       \n"\r
 159                 "       cmp             r12, #0x1c                                                      \n"\r
 160                 "       bne.s   reg_check_error_2                                       \n"\r
 161                 "       cmp             r13, #0x1d                                                      \n"\r
 162                 "       bne.s   reg_check_error_2                                       \n"\r
 163                 "       cmp             r14, #0x1e                                                      \n"\r
 164                 "       bne.s   reg_check_error_2                                       \n"\r
 165                 "       cmp             r15, #0x1f                                                      \n"\r
 166                 "       bne.s   reg_check_error_2                                       \n"\r
 167                 "                                                                                               \n"\r
 168                 "       ld              r2, [r0]+short(ulRegTest2Counter)       \n" /* Increment the loop counter to show that this task is still running error free. */\r
 169                 "       add             r2, #1                                                          \n"\r
 170                 "       st              r2, [r0]+short(ulRegTest2Counter)       \n"\r
 171                 "       mov             r2, #0x12                                                       \n"\r
 172                 "                                                                                               \n"\r
 173                 "       bra.s   reg_check_loop_2                                        \n" /* Do it all again. */\r
 174                 "                                                                                               \n"\r
 175                 "reg_check_error_2:                                                             \n"\r
 176                         "bra.s          .                                                               \n"\r
 177         );\r
 178 }\r
 179 /*-----------------------------------------------------------*/\r
 180 \r
 181 portBASE_TYPE xAreRegTestTasksStillRunning( void )\r
 182 {\r
 183 static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL;\r
 184 long lReturn;\r
 185 \r
 186         /* Check that both loop counters are still incrementing, indicating that\r
 187         both reg test tasks are still running error free. */\r
 188         if( ulLastCounter1 == ulRegTest1Counter )\r
 189         {\r
 190                 lReturn = pdFAIL;\r
 191         }\r
 192         else if( ulLastCounter2 == ulRegTest2Counter )\r
 193         {\r
 194                 lReturn = pdFAIL;\r
 195         }\r
 196         else\r
 197         {\r
 198                 lReturn = pdPASS;\r
 199         }\r
 200 \r
 201         ulLastCounter1 = ulRegTest1Counter;\r
 202         ulLastCounter2 = ulRegTest2Counter;\r
 203 \r
 204         return lReturn;\r
 205 }\r