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Change version numbers in preparation for V7.6.0 release.
[freertos] / FreeRTOS / Demo / ColdFire_MCF51CN128_CodeWarrior / Sources / main.c
1 /*\r
2     FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
28     >>! a combined work that includes FreeRTOS without being obliged to provide\r
29     >>! the source code for proprietary components outside of the FreeRTOS\r
30     >>! kernel.\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 \r
67 /*\r
68  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
69  * documentation provides more details of the standard demo application tasks.\r
70  * In addition to the standard demo tasks, the following tasks and tests are\r
71  * defined and/or created within this file:\r
72  *\r
73  * "Web server" - Very basic demonstration of the uIP stack.  The WEB server\r
74  * simply generates a page that shows the current state of all the tasks within\r
75  * the system, including the high water mark of each task stack. The high water\r
76  * mark is displayed as the amount of stack that has never been used, so the\r
77  * closer the value is to zero the closer the task has come to overflowing its\r
78  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.  Sub\r
79  * pages display some TCP/IP status information and permit LED3 to be turned on\r
80  * and off using a check box.\r
81  *\r
82  * Tick hook function that implements a "Check" function -  This is executed \r
83  * every 5 seconds from the tick hook function.  It checks to ensure that all \r
84  * the standard demo tasks are still operational and running without error.  \r
85  * The system status (pass/fail) is then displayed underneith the task table on \r
86  * the served WEB pages.  \r
87  *\r
88  * "Reg test" tasks - These fill the registers with known values, then check\r
89  * that each register still contains its expected value.  Each task uses\r
90  * different values.  The tasks run with very low priority so get preempted very\r
91  * frequently.  A register containing an unexpected value is indicative of an\r
92  * error in the context switching mechanism.\r
93  *\r
94  */\r
95 \r
96 /* Standard includes. */\r
97 #include <stdio.h>\r
98 \r
99 /* Scheduler includes. */\r
100 #include "FreeRTOS.h"\r
101 #include "task.h"\r
102 #include "queue.h"\r
103 #include "semphr.h"\r
104 \r
105 /* Demo app includes. */\r
106 #include "BlockQ.h"\r
107 #include "death.h"\r
108 #include "flash.h"\r
109 #include "partest.h"\r
110 #include "GenQTest.h"\r
111 #include "QPeek.h"\r
112 #include "recmutex.h"\r
113 \r
114 /*-----------------------------------------------------------*/\r
115 \r
116 /* ComTest constants - there is no free LED for the comtest tasks. */\r
117 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
118 #define mainCOM_TEST_LED                                        ( 5 )\r
119 \r
120 /* Task priorities. */\r
121 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
122 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
123 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
124 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
125 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
126 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
127 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
128 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
129 \r
130 /* WEB server requires enough stack for the string handling functions. */\r
131 #define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 2 )\r
132 \r
133 /*\r
134  * Configure the hardware for the demo.\r
135  */\r
136 static void prvSetupHardware( void );\r
137 \r
138 /*\r
139  * Implements the 'check' function as described at the top of this file.\r
140  */\r
141 static void prvCheckFunction( void );\r
142 \r
143 /*\r
144  * Implement the 'Reg test' functionality as described at the top of this file.\r
145  */\r
146 static void vRegTest1Task( void *pvParameters );\r
147 static void vRegTest2Task( void *pvParameters );\r
148 \r
149 /*\r
150  * The task that handles the uIP stack.  All TCP/IP processing is performed in\r
151  * this task.\r
152  */\r
153 extern void vuIP_Task( void *pvParameters );\r
154 \r
155 /*-----------------------------------------------------------*/\r
156 \r
157 /* Counters used to detect errors within the reg test tasks. */\r
158 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
159 \r
160 /* Flag that latches any errors detected in the system. */\r
161 unsigned long ulCheckErrors = 0;\r
162 \r
163 /*-----------------------------------------------------------*/\r
164 \r
165 int main( void )\r
166 {\r
167 extern void vBasicWEBServer( void *pv );\r
168 \r
169         /* Setup the hardware ready for this demo. */\r
170         prvSetupHardware();\r
171         \r
172         xTaskCreate( vuIP_Task, ( signed char * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
173 \r
174         /* Start the standard demo tasks. */\r
175         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
176         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
177         vStartQueuePeekTasks();\r
178         vStartRecursiveMutexTasks();\r
179         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
180 \r
181         /* Start the reg test tasks - defined in this file. */\r
182         xTaskCreate( vRegTest1Task, ( signed char * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
183         xTaskCreate( vRegTest2Task, ( signed char * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
184 \r
185         /* Start the scheduler. */\r
186         vTaskStartScheduler();\r
187 \r
188     /* Will only get here if there was insufficient memory to create the idle\r
189     task. */\r
190         for( ;; )\r
191         {\r
192         }\r
193 }\r
194 /*-----------------------------------------------------------*/\r
195 \r
196 void vApplicationTickHook( void )\r
197 {\r
198 static unsigned long ulExecutionCount = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
199 const unsigned long ulExecutionRate = 5000 / portTICK_RATE_MS;\r
200         \r
201     /* Increment the count of how many times the tick hook has been called. */\r
202     ulExecutionCount++;\r
203     \r
204     /* Is it time to perform the check again? */\r
205         if( ulExecutionCount >= ulExecutionRate )\r
206         {\r
207                 /* Reset the execution count so this function is called again in 5\r
208                 seconds time. */\r
209                 ulExecutionCount = 0;\r
210         \r
211                 /* Has an error been found in any task? */\r
212                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
213                 {\r
214                         ulCheckErrors |= 0x01UL;\r
215                 }\r
216 \r
217                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
218                 {\r
219                         ulCheckErrors |= 0x02UL;\r
220                 }\r
221 \r
222                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
223                 {\r
224                         ulCheckErrors |= 0x04UL;\r
225                 }\r
226 \r
227                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
228             {\r
229                 ulCheckErrors |= 0x200UL;\r
230             }\r
231 \r
232                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
233                 {\r
234                         ulCheckErrors |= 0x1000UL;\r
235                 }\r
236 \r
237                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
238                 {\r
239                         ulCheckErrors |= 0x1000UL;\r
240                 }\r
241 \r
242                 ulLastRegTest1Count = ulRegTest1Counter;\r
243                 ulLastRegTest2Count = ulRegTest2Counter;\r
244         }\r
245 }\r
246 /*-----------------------------------------------------------*/\r
247 \r
248 static void prvSetupHardware( void ) \r
249 {\r
250         /* Disable the watchdog, STOP and WAIT modes. */\r
251         SOPT1 = 0;\r
252 \r
253         /* --- Setup clock to use external 25MHz source. --- */\r
254         \r
255         /* Extal and xtal pin ON. */\r
256         PTDPF1_D4 = 0x03;\r
257         PTDPF1_D5 = 0x03;\r
258 \r
259         /* Switch from FEI to FBE (FLL bypassed external)\r
260         enable external clock source */\r
261         MCGC2 = MCGC2_ERCLKEN_MASK  /* Activate external reference clock */\r
262               | MCGC2_EREFS_MASK    /* Because crystal is being used */\r
263               | MCGC2_RANGE_MASK;   /* High range */\r
264                 \r
265         /* Select clock mode and clear IREFs. */\r
266         MCGC1 = (0x02 << 6 )        /* CLKS = 10 -> external reference clock. */\r
267               | (0x04 << 3 )        /* RDIV = 2^4 -> 25MHz/16 = 1.5625 MHz */\r
268               | MCGC1_IRCLKEN_MASK; /* IRCLK to RTC enabled */\r
269           \r
270         /* Wait for Reference and Clock status bits to update. */\r
271         while( MCGSC_IREFST | ( MCGSC_CLKST != 0x02 ) )\r
272         {\r
273                 /* Nothing to do here. */\r
274         }\r
275 \r
276         /* Switch from FBE to PBE (PLL bypassed internal) mode. */\r
277         MCGC3 =  0x08               /* Set PLL multi 50MHz. */\r
278               |  MCGC3_PLLS_MASK;   /* Select PLL. */\r
279 \r
280         /* Wait for PLL status and lock bits to update. */\r
281         while( !MCGSC_PLLST | !MCGSC_LOCK )\r
282         {\r
283                 /* Nothing to do here. */\r
284         }\r
285 \r
286 \r
287         /* Now in PBE Mode, finally switch from PBE to PEE (PLL enabled external \r
288         mode). */\r
289         MCGC1_CLKS  = 0b00; /* PLL clock to system (MCGOUT) */\r
290 \r
291         /* Wait for the clock status bits to update. */\r
292         while( MCGSC_CLKST != 0x03 )\r
293         {\r
294                 /* Nothing to do here. */\r
295         }\r
296 \r
297         /* Setup the IO for the LED outputs. */\r
298         vParTestInitialise();\r
299 }\r
300 /*-----------------------------------------------------------*/\r
301 \r
302 void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )\r
303 {\r
304         /* This will get called if a stack overflow is detected during the context\r
305         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
306         problems within nested interrupts, but only do this for debug purposes as\r
307         it will increase the context switch time. */\r
308 \r
309         ( void ) pxTask;\r
310         ( void ) pcTaskName;\r
311 \r
312         for( ;; )\r
313         {\r
314         }\r
315 }\r
316 /*-----------------------------------------------------------*/\r
317 \r
318 static void vRegTest1Task( void *pvParameters )\r
319 {\r
320   /* Just to remove compiler warnings. */\r
321   ( void ) pvParameters;\r
322   \r
323         /* Set all the registers to known values, then check that each retains its\r
324         expected value - as described at the top of this file.  If an error is\r
325         found then the loop counter will no longer be incremented allowing the check\r
326         task to recognise the error. */\r
327         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
328                                                 "       moveq           #1, d0                                  \n\t"\r
329                                                 "       moveq           #2, d1                                  \n\t"\r
330                                                 "       moveq           #3, d2                                  \n\t"\r
331                                                 "       moveq           #4, d3                                  \n\t"\r
332                                                 "       moveq           #5, d4                                  \n\t"\r
333                                                 "       moveq           #6, d5                                  \n\t"                                           \r
334                                                 "       moveq           #7, d6                                  \n\t"\r
335                                                 "       moveq           #8, d7                                  \n\t"\r
336                                                 "       move            #9, a0                                  \n\t"\r
337                                                 "       move            #10, a1                                 \n\t"\r
338                                                 "       move            #11, a2                                 \n\t"\r
339                                                 "       move            #12, a3                                 \n\t"\r
340                                                 "       move            #13, a4                                 \n\t"\r
341                                                 "       move            #15, a6                                 \n\t"\r
342                                                 "                                                                               \n\t"\r
343                                                 "       cmpi.l          #1, d0                                  \n\t"\r
344                                                 "       bne                     reg_test_1_error                \n\t"\r
345                                                 "       cmpi.l          #2, d1                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       cmpi.l          #3, d2                                  \n\t"\r
348                                                 "       bne                     reg_test_1_error                \n\t"\r
349                                                 "       cmpi.l          #4, d3                                  \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       cmpi.l          #5, d4                                  \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       cmpi.l          #6, d5                                  \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #7, d6                                  \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #8, d7                                  \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       move            a0, d0                                  \n\t"\r
360                                                 "       cmpi.l          #9, d0                                  \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       move            a1, d0                                  \n\t"\r
363                                                 "       cmpi.l          #10, d0                                 \n\t"\r
364                                                 "       bne                     reg_test_1_error                \n\t"\r
365                                                 "       move            a2, d0                                  \n\t"\r
366                                                 "       cmpi.l          #11, d0                                 \n\t"\r
367                                                 "       bne                     reg_test_1_error                \n\t"\r
368                                                 "       move            a3, d0                                  \n\t"\r
369                                                 "       cmpi.l          #12, d0                                 \n\t"\r
370                                                 "       bne                     reg_test_1_error                \n\t"\r
371                                                 "       move            a4, d0                                  \n\t"\r
372                                                 "       cmpi.l          #13, d0                                 \n\t"\r
373                                                 "       bne                     reg_test_1_error                \n\t"\r
374                                                 "       move            a6, d0                                  \n\t"\r
375                                                 "       cmpi.l          #15, d0                                 \n\t"\r
376                                                 "       bne                     reg_test_1_error                \n\t"\r
377                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
378                                                 "       addq            #1, d0                                  \n\t"\r
379                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
380                                                 "       bra                     reg_test_1_start                \n\t"\r
381                                                 "reg_test_1_error:                                              \n\t"\r
382                                                 "       bra                     reg_test_1_error                \n\t"\r
383                                         );\r
384 }\r
385 /*-----------------------------------------------------------*/\r
386 \r
387 static void vRegTest2Task( void *pvParameters )\r
388 {\r
389   /* Just to remove compiler warnings. */\r
390   ( void ) pvParameters;\r
391 \r
392         /* Set all the registers to known values, then check that each retains its\r
393         expected value - as described at the top of this file.  If an error is\r
394         found then the loop counter will no longer be incremented allowing the check\r
395         task to recognise the error. */\r
396         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
397                                                 "       moveq           #10, d0                                 \n\t"\r
398                                                 "       moveq           #20, d1                                 \n\t"\r
399                                                 "       moveq           #30, d2                                 \n\t"\r
400                                                 "       moveq           #40, d3                                 \n\t"\r
401                                                 "       moveq           #50, d4                                 \n\t"\r
402                                                 "       moveq           #60, d5                                 \n\t"\r
403                                                 "       moveq           #70, d6                                 \n\t"\r
404                                                 "       moveq           #80, d7                                 \n\t"\r
405                                                 "       move            #90, a0                                 \n\t"\r
406                                                 "       move            #100, a1                                \n\t"\r
407                                                 "       move            #110, a2                                \n\t"\r
408                                                 "       move            #120, a3                                \n\t"\r
409                                                 "       move            #130, a4                                \n\t"\r
410                                                 "       move            #150, a6                                \n\t"\r
411                                                 "                                                                               \n\t"\r
412                                                 "       cmpi.l          #10, d0                                 \n\t"\r
413                                                 "       bne                     reg_test_2_error                \n\t"\r
414                                                 "       cmpi.l          #20, d1                                 \n\t"\r
415                                                 "       bne                     reg_test_2_error                \n\t"\r
416                                                 "       cmpi.l          #30, d2                                 \n\t"\r
417                                                 "       bne                     reg_test_2_error                \n\t"\r
418                                                 "       cmpi.l          #40, d3                                 \n\t"\r
419                                                 "       bne                     reg_test_2_error                \n\t"\r
420                                                 "       cmpi.l          #50, d4                                 \n\t"\r
421                                                 "       bne                     reg_test_2_error                \n\t"\r
422                                                 "       cmpi.l          #60, d5                                 \n\t"\r
423                                                 "       bne                     reg_test_2_error                \n\t"\r
424                                                 "       cmpi.l          #70, d6                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       cmpi.l          #80, d7                                 \n\t"\r
427                                                 "       bne                     reg_test_2_error                \n\t"\r
428                                                 "       move            a0, d0                                  \n\t"\r
429                                                 "       cmpi.l          #90, d0                                 \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       move            a1, d0                                  \n\t"\r
432                                                 "       cmpi.l          #100, d0                                \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       move            a2, d0                                  \n\t"\r
435                                                 "       cmpi.l          #110, d0                                \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       move            a3, d0                                  \n\t"\r
438                                                 "       cmpi.l          #120, d0                                \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       move            a4, d0                                  \n\t"\r
441                                                 "       cmpi.l          #130, d0                                \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a6, d0                                  \n\t"\r
444                                                 "       cmpi.l          #150, d0                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
447                                                 "       addq            #1, d0                                  \n\t"\r
448                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
449                                                 "       bra                     reg_test_2_start                \n\t"\r
450                                                 "reg_test_2_error:                                              \n\t"\r
451                                                 "       bra                     reg_test_2_error                \n\t"\r
452                                         );\r
453 }\r
454 /*-----------------------------------------------------------*/\r
455 \r