2 * FreeRTOS Kernel V10.0.0
\r
3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
\r
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
\r
6 * this software and associated documentation files (the "Software"), to deal in
\r
7 * the Software without restriction, including without limitation the rights to
\r
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
\r
9 * the Software, and to permit persons to whom the Software is furnished to do so,
\r
10 * subject to the following conditions:
\r
12 * The above copyright notice and this permission notice shall be included in all
\r
13 * copies or substantial portions of the Software. If you wish to use our Amazon
\r
14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
\r
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
\r
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
\r
18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
\r
19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
\r
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
\r
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
\r
23 * http://www.FreeRTOS.org
\r
24 * http://aws.amazon.com/freertos
\r
26 * 1 tab == 4 spaces!
\r
31 * Creates all the demo application tasks, then starts the scheduler. The WEB
\r
32 * documentation provides more details of the standard demo application tasks.
\r
33 * In addition to the standard demo tasks, the following tasks and tests are
\r
34 * defined and/or created within this file:
\r
36 * "Web server" - Very basic demonstration of the uIP stack. The WEB server
\r
37 * simply generates a page that shows the current state of all the tasks within
\r
38 * the system, including the high water mark of each task stack. The high water
\r
39 * mark is displayed as the amount of stack that has never been used, so the
\r
40 * closer the value is to zero the closer the task has come to overflowing its
\r
41 * stack. The IP address and net mask are set within FreeRTOSConfig.h. Sub
\r
42 * pages display some TCP/IP status information and permit LED3 to be turned on
\r
43 * and off using a check box.
\r
45 * Tick hook function that implements a "Check" function - This is executed
\r
46 * every 5 seconds from the tick hook function. It checks to ensure that all
\r
47 * the standard demo tasks are still operational and running without error.
\r
48 * The system status (pass/fail) is then displayed underneith the task table on
\r
49 * the served WEB pages.
\r
51 * "Reg test" tasks - These fill the registers with known values, then check
\r
52 * that each register still contains its expected value. Each task uses
\r
53 * different values. The tasks run with very low priority so get preempted very
\r
54 * frequently. A register containing an unexpected value is indicative of an
\r
55 * error in the context switching mechanism.
\r
59 /* Standard includes. */
\r
62 /* Scheduler includes. */
\r
63 #include "FreeRTOS.h"
\r
68 /* Demo app includes. */
\r
72 #include "partest.h"
\r
73 #include "GenQTest.h"
\r
75 #include "recmutex.h"
\r
77 /*-----------------------------------------------------------*/
\r
79 /* ComTest constants - there is no free LED for the comtest tasks. */
\r
80 #define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 19200 )
\r
81 #define mainCOM_TEST_LED ( 5 )
\r
83 /* Task priorities. */
\r
84 #define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
\r
85 #define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
\r
86 #define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
\r
87 #define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
\r
88 #define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
\r
89 #define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )
\r
90 #define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
\r
91 #define mainWEB_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
\r
93 /* WEB server requires enough stack for the string handling functions. */
\r
94 #define mainBASIC_WEB_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 )
\r
97 * Configure the hardware for the demo.
\r
99 static void prvSetupHardware( void );
\r
102 * Implements the 'check' function as described at the top of this file.
\r
104 static void prvCheckFunction( void );
\r
107 * Implement the 'Reg test' functionality as described at the top of this file.
\r
109 static void vRegTest1Task( void *pvParameters );
\r
110 static void vRegTest2Task( void *pvParameters );
\r
113 * The task that handles the uIP stack. All TCP/IP processing is performed in
\r
116 extern void vuIP_Task( void *pvParameters );
\r
118 /*-----------------------------------------------------------*/
\r
120 /* Counters used to detect errors within the reg test tasks. */
\r
121 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;
\r
123 /* Flag that latches any errors detected in the system. */
\r
124 unsigned long ulCheckErrors = 0;
\r
126 /*-----------------------------------------------------------*/
\r
130 extern void vBasicWEBServer( void *pv );
\r
132 /* Setup the hardware ready for this demo. */
\r
133 prvSetupHardware();
\r
135 xTaskCreate( vuIP_Task, "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
\r
137 /* Start the standard demo tasks. */
\r
138 vStartLEDFlashTasks( tskIDLE_PRIORITY );
\r
139 vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
\r
140 vStartQueuePeekTasks();
\r
141 vStartRecursiveMutexTasks();
\r
142 vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
\r
144 /* Start the reg test tasks - defined in this file. */
\r
145 xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );
\r
146 xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );
\r
148 /* Start the scheduler. */
\r
149 vTaskStartScheduler();
\r
151 /* Will only get here if there was insufficient memory to create the idle
\r
157 /*-----------------------------------------------------------*/
\r
159 void vApplicationTickHook( void )
\r
161 static unsigned long ulExecutionCount = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;
\r
162 const unsigned long ulExecutionRate = 5000 / portTICK_PERIOD_MS;
\r
164 /* Increment the count of how many times the tick hook has been called. */
\r
165 ulExecutionCount++;
\r
167 /* Is it time to perform the check again? */
\r
168 if( ulExecutionCount >= ulExecutionRate )
\r
170 /* Reset the execution count so this function is called again in 5
\r
172 ulExecutionCount = 0;
\r
174 /* Has an error been found in any task? */
\r
175 if( xAreGenericQueueTasksStillRunning() != pdTRUE )
\r
177 ulCheckErrors |= 0x01UL;
\r
180 if( xAreQueuePeekTasksStillRunning() != pdTRUE )
\r
182 ulCheckErrors |= 0x02UL;
\r
185 if( xAreBlockingQueuesStillRunning() != pdTRUE )
\r
187 ulCheckErrors |= 0x04UL;
\r
190 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
\r
192 ulCheckErrors |= 0x200UL;
\r
195 if( ulLastRegTest1Count == ulRegTest1Counter )
\r
197 ulCheckErrors |= 0x1000UL;
\r
200 if( ulLastRegTest2Count == ulRegTest2Counter )
\r
202 ulCheckErrors |= 0x1000UL;
\r
205 ulLastRegTest1Count = ulRegTest1Counter;
\r
206 ulLastRegTest2Count = ulRegTest2Counter;
\r
209 /*-----------------------------------------------------------*/
\r
211 static void prvSetupHardware( void )
\r
213 /* Disable the watchdog, STOP and WAIT modes. */
\r
216 /* --- Setup clock to use external 25MHz source. --- */
\r
218 /* Extal and xtal pin ON. */
\r
222 /* Switch from FEI to FBE (FLL bypassed external)
\r
223 enable external clock source */
\r
224 MCGC2 = MCGC2_ERCLKEN_MASK /* Activate external reference clock */
\r
225 | MCGC2_EREFS_MASK /* Because crystal is being used */
\r
226 | MCGC2_RANGE_MASK; /* High range */
\r
228 /* Select clock mode and clear IREFs. */
\r
229 MCGC1 = (0x02 << 6 ) /* CLKS = 10 -> external reference clock. */
\r
230 | (0x04 << 3 ) /* RDIV = 2^4 -> 25MHz/16 = 1.5625 MHz */
\r
231 | MCGC1_IRCLKEN_MASK; /* IRCLK to RTC enabled */
\r
233 /* Wait for Reference and Clock status bits to update. */
\r
234 while( MCGSC_IREFST | ( MCGSC_CLKST != 0x02 ) )
\r
236 /* Nothing to do here. */
\r
239 /* Switch from FBE to PBE (PLL bypassed internal) mode. */
\r
240 MCGC3 = 0x08 /* Set PLL multi 50MHz. */
\r
241 | MCGC3_PLLS_MASK; /* Select PLL. */
\r
243 /* Wait for PLL status and lock bits to update. */
\r
244 while( !MCGSC_PLLST | !MCGSC_LOCK )
\r
246 /* Nothing to do here. */
\r
250 /* Now in PBE Mode, finally switch from PBE to PEE (PLL enabled external
\r
252 MCGC1_CLKS = 0b00; /* PLL clock to system (MCGOUT) */
\r
254 /* Wait for the clock status bits to update. */
\r
255 while( MCGSC_CLKST != 0x03 )
\r
257 /* Nothing to do here. */
\r
260 /* Setup the IO for the LED outputs. */
\r
261 vParTestInitialise();
\r
263 /*-----------------------------------------------------------*/
\r
265 void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
\r
267 /* This will get called if a stack overflow is detected during the context
\r
268 switch. Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack
\r
269 problems within nested interrupts, but only do this for debug purposes as
\r
270 it will increase the context switch time. */
\r
273 ( void ) pcTaskName;
\r
279 /*-----------------------------------------------------------*/
\r
281 static void vRegTest1Task( void *pvParameters )
\r
283 /* Just to remove compiler warnings. */
\r
284 ( void ) pvParameters;
\r
286 /* Set all the registers to known values, then check that each retains its
\r
287 expected value - as described at the top of this file. If an error is
\r
288 found then the loop counter will no longer be incremented allowing the check
\r
289 task to recognise the error. */
\r
290 asm volatile ( "reg_test_1_start: \n\t"
\r
291 " moveq #1, d0 \n\t"
\r
292 " moveq #2, d1 \n\t"
\r
293 " moveq #3, d2 \n\t"
\r
294 " moveq #4, d3 \n\t"
\r
295 " moveq #5, d4 \n\t"
\r
296 " moveq #6, d5 \n\t"
\r
297 " moveq #7, d6 \n\t"
\r
298 " moveq #8, d7 \n\t"
\r
299 " move #9, a0 \n\t"
\r
300 " move #10, a1 \n\t"
\r
301 " move #11, a2 \n\t"
\r
302 " move #12, a3 \n\t"
\r
303 " move #13, a4 \n\t"
\r
304 " move #15, a6 \n\t"
\r
306 " cmpi.l #1, d0 \n\t"
\r
307 " bne reg_test_1_error \n\t"
\r
308 " cmpi.l #2, d1 \n\t"
\r
309 " bne reg_test_1_error \n\t"
\r
310 " cmpi.l #3, d2 \n\t"
\r
311 " bne reg_test_1_error \n\t"
\r
312 " cmpi.l #4, d3 \n\t"
\r
313 " bne reg_test_1_error \n\t"
\r
314 " cmpi.l #5, d4 \n\t"
\r
315 " bne reg_test_1_error \n\t"
\r
316 " cmpi.l #6, d5 \n\t"
\r
317 " bne reg_test_1_error \n\t"
\r
318 " cmpi.l #7, d6 \n\t"
\r
319 " bne reg_test_1_error \n\t"
\r
320 " cmpi.l #8, d7 \n\t"
\r
321 " bne reg_test_1_error \n\t"
\r
322 " move a0, d0 \n\t"
\r
323 " cmpi.l #9, d0 \n\t"
\r
324 " bne reg_test_1_error \n\t"
\r
325 " move a1, d0 \n\t"
\r
326 " cmpi.l #10, d0 \n\t"
\r
327 " bne reg_test_1_error \n\t"
\r
328 " move a2, d0 \n\t"
\r
329 " cmpi.l #11, d0 \n\t"
\r
330 " bne reg_test_1_error \n\t"
\r
331 " move a3, d0 \n\t"
\r
332 " cmpi.l #12, d0 \n\t"
\r
333 " bne reg_test_1_error \n\t"
\r
334 " move a4, d0 \n\t"
\r
335 " cmpi.l #13, d0 \n\t"
\r
336 " bne reg_test_1_error \n\t"
\r
337 " move a6, d0 \n\t"
\r
338 " cmpi.l #15, d0 \n\t"
\r
339 " bne reg_test_1_error \n\t"
\r
340 " move ulRegTest1Counter, d0 \n\t"
\r
341 " addq #1, d0 \n\t"
\r
342 " move d0, ulRegTest1Counter \n\t"
\r
343 " bra reg_test_1_start \n\t"
\r
344 "reg_test_1_error: \n\t"
\r
345 " bra reg_test_1_error \n\t"
\r
348 /*-----------------------------------------------------------*/
\r
350 static void vRegTest2Task( void *pvParameters )
\r
352 /* Just to remove compiler warnings. */
\r
353 ( void ) pvParameters;
\r
355 /* Set all the registers to known values, then check that each retains its
\r
356 expected value - as described at the top of this file. If an error is
\r
357 found then the loop counter will no longer be incremented allowing the check
\r
358 task to recognise the error. */
\r
359 asm volatile ( "reg_test_2_start: \n\t"
\r
360 " moveq #10, d0 \n\t"
\r
361 " moveq #20, d1 \n\t"
\r
362 " moveq #30, d2 \n\t"
\r
363 " moveq #40, d3 \n\t"
\r
364 " moveq #50, d4 \n\t"
\r
365 " moveq #60, d5 \n\t"
\r
366 " moveq #70, d6 \n\t"
\r
367 " moveq #80, d7 \n\t"
\r
368 " move #90, a0 \n\t"
\r
369 " move #100, a1 \n\t"
\r
370 " move #110, a2 \n\t"
\r
371 " move #120, a3 \n\t"
\r
372 " move #130, a4 \n\t"
\r
373 " move #150, a6 \n\t"
\r
375 " cmpi.l #10, d0 \n\t"
\r
376 " bne reg_test_2_error \n\t"
\r
377 " cmpi.l #20, d1 \n\t"
\r
378 " bne reg_test_2_error \n\t"
\r
379 " cmpi.l #30, d2 \n\t"
\r
380 " bne reg_test_2_error \n\t"
\r
381 " cmpi.l #40, d3 \n\t"
\r
382 " bne reg_test_2_error \n\t"
\r
383 " cmpi.l #50, d4 \n\t"
\r
384 " bne reg_test_2_error \n\t"
\r
385 " cmpi.l #60, d5 \n\t"
\r
386 " bne reg_test_2_error \n\t"
\r
387 " cmpi.l #70, d6 \n\t"
\r
388 " bne reg_test_2_error \n\t"
\r
389 " cmpi.l #80, d7 \n\t"
\r
390 " bne reg_test_2_error \n\t"
\r
391 " move a0, d0 \n\t"
\r
392 " cmpi.l #90, d0 \n\t"
\r
393 " bne reg_test_2_error \n\t"
\r
394 " move a1, d0 \n\t"
\r
395 " cmpi.l #100, d0 \n\t"
\r
396 " bne reg_test_2_error \n\t"
\r
397 " move a2, d0 \n\t"
\r
398 " cmpi.l #110, d0 \n\t"
\r
399 " bne reg_test_2_error \n\t"
\r
400 " move a3, d0 \n\t"
\r
401 " cmpi.l #120, d0 \n\t"
\r
402 " bne reg_test_2_error \n\t"
\r
403 " move a4, d0 \n\t"
\r
404 " cmpi.l #130, d0 \n\t"
\r
405 " bne reg_test_2_error \n\t"
\r
406 " move a6, d0 \n\t"
\r
407 " cmpi.l #150, d0 \n\t"
\r
408 " bne reg_test_2_error \n\t"
\r
409 " move ulRegTest1Counter, d0 \n\t"
\r
410 " addq #1, d0 \n\t"
\r
411 " move d0, ulRegTest2Counter \n\t"
\r
412 " bra reg_test_2_start \n\t"
\r
413 "reg_test_2_error: \n\t"
\r
414 " bra reg_test_2_error \n\t"
\r
417 /*-----------------------------------------------------------*/
\r
projects / freertos / blob