]> git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c
29966ae6aa7eca6170d10f0099e5f4f52fe25805
[freertos] / FreeRTOS / Demo / ColdFire_MCF52221_CodeWarrior / sources / main.c
1 /*\r
2     FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43     \r
44     ***************************************************************************\r
45      *                                                                       *\r
46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
47      *    not run, what could be wrong?                                      *\r
48      *                                                                       *\r
49      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
50      *                                                                       *\r
51     ***************************************************************************\r
52 \r
53     \r
54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
55     license and contact details.\r
56     \r
57     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
58     including FreeRTOS+Trace - an indispensable productivity tool.\r
59 \r
60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
61     the code with commercial support, indemnification, and middleware, under \r
62     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
63     provide a safety engineered and independently SIL3 certified version under \r
64     the SafeRTOS brand: http://www.SafeRTOS.com.\r
65 */\r
66 \r
67 \r
68 /*\r
69  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
70  * documentation provides more details of the standard demo application tasks.\r
71  * In addition to the standard demo tasks, the following tasks and tests are\r
72  * defined and/or created within this file:\r
73  *\r
74  * "Check" task -  This only executes every five seconds but has a high priority\r
75  * to ensure it gets processor time.  Its main function is to check that all the\r
76  * standard demo tasks are still operational.  While no errors have been\r
77  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
78  * rate increasing to 500ms being a visual indication that at least one task has\r
79  * reported unexpected behaviour.\r
80  *\r
81  * "Reg test" tasks - These fill the registers with known values, then check\r
82  * that each register still contains its expected value.  Each task uses\r
83  * different values.  The tasks run with very low priority so get preempted very\r
84  * frequently.  A register containing an unexpected value is indicative of an\r
85  * error in the context switching mechanism.\r
86  *\r
87  */\r
88 \r
89 /* Standard includes. */\r
90 #include <stdio.h>\r
91 \r
92 /* Scheduler includes. */\r
93 #include "FreeRTOS.h"\r
94 #include "task.h"\r
95 #include "queue.h"\r
96 #include "semphr.h"\r
97 \r
98 /* Demo app includes. */\r
99 #include "BlockQ.h"\r
100 #include "crflash.h"\r
101 #include "partest.h"\r
102 #include "semtest.h"\r
103 #include "GenQTest.h"\r
104 #include "QPeek.h"\r
105 #include "comtest2.h"\r
106 \r
107 /*-----------------------------------------------------------*/\r
108 \r
109 /* The time between cycles of the 'check' functionality - as described at the\r
110 top of this file. */\r
111 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
112 \r
113 /* The rate at which the LED controlled by the 'check' task will flash should an\r
114 error have been detected. */\r
115 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
116 \r
117 /* The LED controlled by the 'check' task. */\r
118 #define mainCHECK_LED                                           ( 3 )\r
119 \r
120 /* ComTest constants - there is no free LED for the comtest tasks. */\r
121 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
122 #define mainCOM_TEST_LED                                        ( 5 )\r
123 \r
124 /* Task priorities. */\r
125 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
126 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
127 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
128 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
129 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
130 \r
131 /* Co-routines are used to flash the LEDs. */\r
132 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
133 \r
134 /* The baud rate used by the comtest tasks. */\r
135 #define mainBAUD_RATE                                           ( 38400 )\r
136 \r
137 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
138 number. */\r
139 #define mainCOM_LED                                                     ( 4 )\r
140 \r
141 /*\r
142  * Configure the hardware for the demo.\r
143  */\r
144 static void prvSetupHardware( void );\r
145 \r
146 /*\r
147  * Implements the 'check' task functionality as described at the top of this\r
148  * file.\r
149  */\r
150 static void prvCheckTask( void *pvParameters );\r
151 \r
152 /*\r
153  * Implement the 'Reg test' functionality as described at the top of this file.\r
154  */\r
155 static void vRegTest1Task( void *pvParameters );\r
156 static void vRegTest2Task( void *pvParameters );\r
157 \r
158 /*-----------------------------------------------------------*/\r
159 \r
160 /* Counters used to detect errors within the reg test tasks. */\r
161 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
162 \r
163 /*-----------------------------------------------------------*/\r
164 \r
165 int main( void )\r
166 {\r
167         /* Setup the hardware ready for this demo. */\r
168         prvSetupHardware();\r
169 \r
170         /* Start the standard demo tasks. */\r
171         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
172         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
173         vStartQueuePeekTasks();\r
174         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
175         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
176 \r
177         /* For demo purposes use some co-routines to flash the LEDs. */\r
178         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
179 \r
180         /* Create the check task. */\r
181         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
182 \r
183 \r
184         /* Start the reg test tasks - defined in this file. */\r
185         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
186         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
187 \r
188         /* Start the scheduler. */\r
189         vTaskStartScheduler();\r
190 \r
191     /* Will only get here if there was insufficient memory to create the idle\r
192     task. */\r
193         for( ;; )\r
194         {\r
195         }\r
196 }\r
197 /*-----------------------------------------------------------*/\r
198 \r
199 static void prvCheckTask( void *pvParameters )\r
200 {\r
201 unsigned portLONG ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
202 portTickType xLastExecutionTime;\r
203 volatile unsigned portBASE_TYPE uxUnusedStack;\r
204 \r
205         ( void ) pvParameters;\r
206 \r
207         /* Initialise the variable used to control our iteration rate prior to\r
208         its first use. */\r
209         xLastExecutionTime = xTaskGetTickCount();\r
210 \r
211         for( ;; )\r
212         {\r
213                 /* Wait until it is time to run the tests again. */\r
214                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
215 \r
216                 /* Has an error been found in any task? */\r
217                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
218                 {\r
219                         ulError |= 0x01UL;\r
220                 }\r
221 \r
222                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
223                 {\r
224                         ulError |= 0x02UL;\r
225                 }\r
226 \r
227                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
228                 {\r
229                         ulError |= 0x04UL;\r
230                 }\r
231 \r
232                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
233             {\r
234                 ulError |= 0x20UL;\r
235             }\r
236             \r
237             if( xAreComTestTasksStillRunning() != pdTRUE )\r
238             {\r
239                 ulError |= 0x40UL;\r
240             }\r
241 \r
242                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
243                 {\r
244                         ulError |= 0x1000UL;\r
245                 }\r
246 \r
247                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
248                 {\r
249                         ulError |= 0x1000UL;\r
250                 }\r
251 \r
252                 ulLastRegTest1Count = ulRegTest1Counter;\r
253                 ulLastRegTest2Count = ulRegTest2Counter;\r
254 \r
255                 /* If an error has been found then increase our cycle rate, and in so\r
256                 doing increase the rate at which the check task LED toggles. */\r
257                 if( ulError != 0 )\r
258                 {\r
259                 ulTicksToWait = mainERROR_PERIOD;\r
260                 }\r
261 \r
262                 /* Toggle the LED each itteration. */\r
263                 vParTestToggleLED( mainCHECK_LED );\r
264                 \r
265                 /* For demo only - how much unused stack does this task have? */\r
266                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
267         }\r
268 }\r
269 /*-----------------------------------------------------------*/\r
270 \r
271 void prvSetupHardware( void )\r
272 {\r
273         portDISABLE_INTERRUPTS();\r
274 \r
275         /* Setup the port used to toggle LEDs. */\r
276         vParTestInitialise();\r
277 }\r
278 /*-----------------------------------------------------------*/\r
279 \r
280 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
281 {\r
282         /* This will get called if a stack overflow is detected during the context\r
283         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
284         problems within nested interrupts, but only do this for debug purposes as\r
285         it will increase the context switch time. */\r
286 \r
287         ( void ) pxTask;\r
288         ( void ) pcTaskName;\r
289 \r
290         for( ;; )\r
291         {\r
292         }\r
293 }\r
294 /*-----------------------------------------------------------*/\r
295 \r
296 void vApplicationIdleHook( void );\r
297 void vApplicationIdleHook( void )\r
298 {\r
299         /* The co-routines run in the idle task. */\r
300         vCoRoutineSchedule();\r
301 }\r
302 /*-----------------------------------------------------------*/\r
303 \r
304 void exit( int n )\r
305 {\r
306         /* To keep the linker happy only as the libraries have been removed from\r
307         the build. */\r
308         ( void ) n;\r
309         for( ;; ) {}\r
310 }\r
311 /*-----------------------------------------------------------*/\r
312 \r
313 static void vRegTest1Task( void *pvParameters )\r
314 {\r
315         /* Sanity check - did we receive the parameter expected? */\r
316         if( pvParameters != &ulRegTest1Counter )\r
317         {\r
318                 /* Change here so the check task can detect that an error occurred. */\r
319                 for( ;; )\r
320                 {\r
321                 }\r
322         }\r
323 \r
324         /* Set all the registers to known values, then check that each retains its\r
325         expected value - as described at the top of this file.  If an error is\r
326         found then the loop counter will no longer be incremented allowing the check\r
327         task to recognise the error. */\r
328         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
329                                                 "       moveq           #1, d0                                  \n\t"\r
330                                                 "       moveq           #2, d1                                  \n\t"\r
331                                                 "       moveq           #3, d2                                  \n\t"\r
332                                                 "       moveq           #4, d3                                  \n\t"\r
333                                                 "       moveq           #5, d4                                  \n\t"\r
334                                                 "       moveq           #6, d5                                  \n\t"\r
335                                                 "       moveq           #7, d6                                  \n\t"\r
336                                                 "       moveq           #8, d7                                  \n\t"\r
337                                                 "       move            #9, a0                                  \n\t"\r
338                                                 "       move            #10, a1                                 \n\t"\r
339                                                 "       move            #11, a2                                 \n\t"\r
340                                                 "       move            #12, a3                                 \n\t"\r
341                                                 "       move            #13, a4                                 \n\t"\r
342                                                 "       move            #14, a5                                 \n\t"\r
343                                                 "       move            #15, a6                                 \n\t"\r
344                                                 "                                                                               \n\t"\r
345                                                 "       cmpi.l          #1, d0                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       cmpi.l          #2, d1                                  \n\t"\r
348                                                 "       bne                     reg_test_1_error                \n\t"\r
349                                                 "       cmpi.l          #3, d2                                  \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       cmpi.l          #4, d3                                  \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       cmpi.l          #5, d4                                  \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #6, d5                                  \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #7, d6                                  \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       cmpi.l          #8, d7                                  \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       move            a0, d0                                  \n\t"\r
362                                                 "       cmpi.l          #9, d0                                  \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            a1, d0                                  \n\t"\r
365                                                 "       cmpi.l          #10, d0                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            a2, d0                                  \n\t"\r
368                                                 "       cmpi.l          #11, d0                                 \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            a3, d0                                  \n\t"\r
371                                                 "       cmpi.l          #12, d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            a4, d0                                  \n\t"\r
374                                                 "       cmpi.l          #13, d0                                 \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            a5, d0                                  \n\t"\r
377                                                 "       cmpi.l          #14, d0                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            a6, d0                                  \n\t"\r
380                                                 "       cmpi.l          #15, d0                                 \n\t"\r
381                                                 "       bne                     reg_test_1_error                \n\t"\r
382                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
383                                                 "       addq            #1, d0                                  \n\t"\r
384                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
385                                                 "       bra                     reg_test_1_start                \n\t"\r
386                                                 "reg_test_1_error:                                              \n\t"\r
387                                                 "       bra                     reg_test_1_error                \n\t"\r
388                                         );\r
389 }\r
390 /*-----------------------------------------------------------*/\r
391 \r
392 static void vRegTest2Task( void *pvParameters )\r
393 {\r
394         /* Sanity check - did we receive the parameter expected? */\r
395         if( pvParameters != &ulRegTest2Counter )\r
396         {\r
397                 /* Change here so the check task can detect that an error occurred. */\r
398                 for( ;; )\r
399                 {\r
400                 }\r
401         }\r
402 \r
403         /* Set all the registers to known values, then check that each retains its\r
404         expected value - as described at the top of this file.  If an error is\r
405         found then the loop counter will no longer be incremented allowing the check\r
406         task to recognise the error. */\r
407         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
408                                                 "       moveq           #10, d0                                 \n\t"\r
409                                                 "       moveq           #20, d1                                 \n\t"\r
410                                                 "       moveq           #30, d2                                 \n\t"\r
411                                                 "       moveq           #40, d3                                 \n\t"\r
412                                                 "       moveq           #50, d4                                 \n\t"\r
413                                                 "       moveq           #60, d5                                 \n\t"\r
414                                                 "       moveq           #70, d6                                 \n\t"\r
415                                                 "       moveq           #80, d7                                 \n\t"\r
416                                                 "       move            #90, a0                                 \n\t"\r
417                                                 "       move            #100, a1                                \n\t"\r
418                                                 "       move            #110, a2                                \n\t"\r
419                                                 "       move            #120, a3                                \n\t"\r
420                                                 "       move            #130, a4                                \n\t"\r
421                                                 "       move            #140, a5                                \n\t"\r
422                                                 "       move            #150, a6                                \n\t"\r
423                                                 "                                                                               \n\t"\r
424                                                 "       cmpi.l          #10, d0                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       cmpi.l          #20, d1                                 \n\t"\r
427                                                 "       bne                     reg_test_2_error                \n\t"\r
428                                                 "       cmpi.l          #30, d2                                 \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       cmpi.l          #40, d3                                 \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       cmpi.l          #50, d4                                 \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       cmpi.l          #60, d5                                 \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       cmpi.l          #70, d6                                 \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       cmpi.l          #80, d7                                 \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       move            a0, d0                                  \n\t"\r
441                                                 "       cmpi.l          #90, d0                                 \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a1, d0                                  \n\t"\r
444                                                 "       cmpi.l          #100, d0                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            a2, d0                                  \n\t"\r
447                                                 "       cmpi.l          #110, d0                                \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            a3, d0                                  \n\t"\r
450                                                 "       cmpi.l          #120, d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            a4, d0                                  \n\t"\r
453                                                 "       cmpi.l          #130, d0                                \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            a5, d0                                  \n\t"\r
456                                                 "       cmpi.l          #140, d0                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            a6, d0                                  \n\t"\r
459                                                 "       cmpi.l          #150, d0                                \n\t"\r
460                                                 "       bne                     reg_test_2_error                \n\t"\r
461                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
462                                                 "       addq            #1, d0                                  \n\t"\r
463                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
464                                                 "       bra                     reg_test_2_start                \n\t"\r
465                                                 "reg_test_2_error:                                              \n\t"\r
466                                                 "       bra                     reg_test_2_error                \n\t"\r
467                                         );\r
468 }\r
469 /*-----------------------------------------------------------*/\r
470 \r
471 \r
472 \r