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Update version number ready for the V8.2.3 release.
[freertos] / FreeRTOS / Demo / ColdFire_MCF52221_CodeWarrior / sources / main.c
1 /*\r
2     FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     This file is part of the FreeRTOS distribution.\r
8 \r
9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
10     the terms of the GNU General Public License (version 2) as published by the\r
11     Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
12 \r
13     ***************************************************************************\r
14     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
15     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
16     >>!   obliged to provide the source code for proprietary components     !<<\r
17     >>!   outside of the FreeRTOS kernel.                                   !<<\r
18     ***************************************************************************\r
19 \r
20     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
21     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
22     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
23     link: http://www.freertos.org/a00114.html\r
24 \r
25     ***************************************************************************\r
26      *                                                                       *\r
27      *    FreeRTOS provides completely free yet professionally developed,    *\r
28      *    robust, strictly quality controlled, supported, and cross          *\r
29      *    platform software that is more than just the market leader, it     *\r
30      *    is the industry's de facto standard.                               *\r
31      *                                                                       *\r
32      *    Help yourself get started quickly while simultaneously helping     *\r
33      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
34      *    tutorial book, reference manual, or both:                          *\r
35      *    http://www.FreeRTOS.org/Documentation                              *\r
36      *                                                                       *\r
37     ***************************************************************************\r
38 \r
39     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading\r
40     the FAQ page "My application does not run, what could be wrong?".  Have you\r
41     defined configASSERT()?\r
42 \r
43     http://www.FreeRTOS.org/support - In return for receiving this top quality\r
44     embedded software for free we request you assist our global community by\r
45     participating in the support forum.\r
46 \r
47     http://www.FreeRTOS.org/training - Investing in training allows your team to\r
48     be as productive as possible as early as possible.  Now you can receive\r
49     FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
50     Ltd, and the world's leading authority on the world's leading RTOS.\r
51 \r
52     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
53     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
54     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
55 \r
56     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
57     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
58 \r
59     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
60     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
61     licenses offer ticketed support, indemnification and commercial middleware.\r
62 \r
63     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
64     engineered and independently SIL3 certified version for use in safety and\r
65     mission critical applications that require provable dependability.\r
66 \r
67     1 tab == 4 spaces!\r
68 */\r
69 \r
70 \r
71 /*\r
72  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
73  * documentation provides more details of the standard demo application tasks.\r
74  * In addition to the standard demo tasks, the following tasks and tests are\r
75  * defined and/or created within this file:\r
76  *\r
77  * "Check" task -  This only executes every five seconds but has a high priority\r
78  * to ensure it gets processor time.  Its main function is to check that all the\r
79  * standard demo tasks are still operational.  While no errors have been\r
80  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
81  * rate increasing to 500ms being a visual indication that at least one task has\r
82  * reported unexpected behaviour.\r
83  *\r
84  * "Reg test" tasks - These fill the registers with known values, then check\r
85  * that each register still contains its expected value.  Each task uses\r
86  * different values.  The tasks run with very low priority so get preempted very\r
87  * frequently.  A register containing an unexpected value is indicative of an\r
88  * error in the context switching mechanism.\r
89  *\r
90  */\r
91 \r
92 /* Standard includes. */\r
93 #include <stdio.h>\r
94 \r
95 /* Scheduler includes. */\r
96 #include "FreeRTOS.h"\r
97 #include "task.h"\r
98 #include "queue.h"\r
99 #include "semphr.h"\r
100 \r
101 /* Demo app includes. */\r
102 #include "BlockQ.h"\r
103 #include "crflash.h"\r
104 #include "partest.h"\r
105 #include "semtest.h"\r
106 #include "GenQTest.h"\r
107 #include "QPeek.h"\r
108 #include "comtest2.h"\r
109 \r
110 /*-----------------------------------------------------------*/\r
111 \r
112 /* The time between cycles of the 'check' functionality - as described at the\r
113 top of this file. */\r
114 #define mainNO_ERROR_PERIOD                                     ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
115 \r
116 /* The rate at which the LED controlled by the 'check' task will flash should an\r
117 error have been detected. */\r
118 #define mainERROR_PERIOD                                        ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
119 \r
120 /* The LED controlled by the 'check' task. */\r
121 #define mainCHECK_LED                                           ( 3 )\r
122 \r
123 /* ComTest constants - there is no free LED for the comtest tasks. */\r
124 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
125 #define mainCOM_TEST_LED                                        ( 5 )\r
126 \r
127 /* Task priorities. */\r
128 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
129 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
130 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
131 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
132 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
133 \r
134 /* Co-routines are used to flash the LEDs. */\r
135 #define mainNUM_FLASH_CO_ROUTINES                       ( 3 )\r
136 \r
137 /* The baud rate used by the comtest tasks. */\r
138 #define mainBAUD_RATE                                           ( 38400 )\r
139 \r
140 /* There is no spare LED for the comtest tasks, so this is set to an invalid\r
141 number. */\r
142 #define mainCOM_LED                                                     ( 4 )\r
143 \r
144 /*\r
145  * Configure the hardware for the demo.\r
146  */\r
147 static void prvSetupHardware( void );\r
148 \r
149 /*\r
150  * Implements the 'check' task functionality as described at the top of this\r
151  * file.\r
152  */\r
153 static void prvCheckTask( void *pvParameters );\r
154 \r
155 /*\r
156  * Implement the 'Reg test' functionality as described at the top of this file.\r
157  */\r
158 static void vRegTest1Task( void *pvParameters );\r
159 static void vRegTest2Task( void *pvParameters );\r
160 \r
161 /*-----------------------------------------------------------*/\r
162 \r
163 /* Counters used to detect errors within the reg test tasks. */\r
164 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
165 \r
166 /*-----------------------------------------------------------*/\r
167 \r
168 int main( void )\r
169 {\r
170         /* Setup the hardware ready for this demo. */\r
171         prvSetupHardware();\r
172 \r
173         /* Start the standard demo tasks. */\r
174         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
175         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
176         vStartQueuePeekTasks();\r
177         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
178         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_LED );\r
179 \r
180         /* For demo purposes use some co-routines to flash the LEDs. */\r
181         vStartFlashCoRoutines( mainNUM_FLASH_CO_ROUTINES );\r
182 \r
183         /* Create the check task. */\r
184         xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
185 \r
186 \r
187         /* Start the reg test tasks - defined in this file. */\r
188         xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
189         xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
190 \r
191         /* Start the scheduler. */\r
192         vTaskStartScheduler();\r
193 \r
194     /* Will only get here if there was insufficient memory to create the idle\r
195     task. */\r
196         for( ;; )\r
197         {\r
198         }\r
199 }\r
200 /*-----------------------------------------------------------*/\r
201 \r
202 static void prvCheckTask( void *pvParameters )\r
203 {\r
204 unsigned long ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
205 TickType_t xLastExecutionTime;\r
206 volatile unsigned portBASE_TYPE uxUnusedStack;\r
207 \r
208         ( void ) pvParameters;\r
209 \r
210         /* Initialise the variable used to control our iteration rate prior to\r
211         its first use. */\r
212         xLastExecutionTime = xTaskGetTickCount();\r
213 \r
214         for( ;; )\r
215         {\r
216                 /* Wait until it is time to run the tests again. */\r
217                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
218 \r
219                 /* Has an error been found in any task? */\r
220                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
221                 {\r
222                         ulError |= 0x01UL;\r
223                 }\r
224 \r
225                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
226                 {\r
227                         ulError |= 0x02UL;\r
228                 }\r
229 \r
230                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
231                 {\r
232                         ulError |= 0x04UL;\r
233                 }\r
234 \r
235                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
236             {\r
237                 ulError |= 0x20UL;\r
238             }\r
239 \r
240             if( xAreComTestTasksStillRunning() != pdTRUE )\r
241             {\r
242                 ulError |= 0x40UL;\r
243             }\r
244 \r
245                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
246                 {\r
247                         ulError |= 0x1000UL;\r
248                 }\r
249 \r
250                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
251                 {\r
252                         ulError |= 0x1000UL;\r
253                 }\r
254 \r
255                 ulLastRegTest1Count = ulRegTest1Counter;\r
256                 ulLastRegTest2Count = ulRegTest2Counter;\r
257 \r
258                 /* If an error has been found then increase our cycle rate, and in so\r
259                 doing increase the rate at which the check task LED toggles. */\r
260                 if( ulError != 0 )\r
261                 {\r
262                 ulTicksToWait = mainERROR_PERIOD;\r
263                 }\r
264 \r
265                 /* Toggle the LED each iteration. */\r
266                 vParTestToggleLED( mainCHECK_LED );\r
267 \r
268                 /* For demo only - how much unused stack does this task have? */\r
269                 uxUnusedStack = uxTaskGetStackHighWaterMark( NULL );\r
270         }\r
271 }\r
272 /*-----------------------------------------------------------*/\r
273 \r
274 void prvSetupHardware( void )\r
275 {\r
276         portDISABLE_INTERRUPTS();\r
277 \r
278         /* Setup the port used to toggle LEDs. */\r
279         vParTestInitialise();\r
280 }\r
281 /*-----------------------------------------------------------*/\r
282 \r
283 void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
284 {\r
285         /* This will get called if a stack overflow is detected during the context\r
286         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
287         problems within nested interrupts, but only do this for debug purposes as\r
288         it will increase the context switch time. */\r
289 \r
290         ( void ) pxTask;\r
291         ( void ) pcTaskName;\r
292 \r
293         for( ;; )\r
294         {\r
295         }\r
296 }\r
297 /*-----------------------------------------------------------*/\r
298 \r
299 void vApplicationIdleHook( void );\r
300 void vApplicationIdleHook( void )\r
301 {\r
302         /* The co-routines run in the idle task. */\r
303         vCoRoutineSchedule();\r
304 }\r
305 /*-----------------------------------------------------------*/\r
306 \r
307 void exit( int n )\r
308 {\r
309         /* To keep the linker happy only as the libraries have been removed from\r
310         the build. */\r
311         ( void ) n;\r
312         for( ;; ) {}\r
313 }\r
314 /*-----------------------------------------------------------*/\r
315 \r
316 static void vRegTest1Task( void *pvParameters )\r
317 {\r
318         /* Sanity check - did we receive the parameter expected? */\r
319         if( pvParameters != &ulRegTest1Counter )\r
320         {\r
321                 /* Change here so the check task can detect that an error occurred. */\r
322                 for( ;; )\r
323                 {\r
324                 }\r
325         }\r
326 \r
327         /* Set all the registers to known values, then check that each retains its\r
328         expected value - as described at the top of this file.  If an error is\r
329         found then the loop counter will no longer be incremented allowing the check\r
330         task to recognise the error. */\r
331         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
332                                                 "       moveq           #1, d0                                  \n\t"\r
333                                                 "       moveq           #2, d1                                  \n\t"\r
334                                                 "       moveq           #3, d2                                  \n\t"\r
335                                                 "       moveq           #4, d3                                  \n\t"\r
336                                                 "       moveq           #5, d4                                  \n\t"\r
337                                                 "       moveq           #6, d5                                  \n\t"\r
338                                                 "       moveq           #7, d6                                  \n\t"\r
339                                                 "       moveq           #8, d7                                  \n\t"\r
340                                                 "       move            #9, a0                                  \n\t"\r
341                                                 "       move            #10, a1                                 \n\t"\r
342                                                 "       move            #11, a2                                 \n\t"\r
343                                                 "       move            #12, a3                                 \n\t"\r
344                                                 "       move            #13, a4                                 \n\t"\r
345                                                 "       move            #14, a5                                 \n\t"\r
346                                                 "       move            #15, a6                                 \n\t"\r
347                                                 "                                                                               \n\t"\r
348                                                 "       cmpi.l          #1, d0                                  \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       cmpi.l          #2, d1                                  \n\t"\r
351                                                 "       bne                     reg_test_1_error                \n\t"\r
352                                                 "       cmpi.l          #3, d2                                  \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       cmpi.l          #4, d3                                  \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       cmpi.l          #5, d4                                  \n\t"\r
357                                                 "       bne                     reg_test_1_error                \n\t"\r
358                                                 "       cmpi.l          #6, d5                                  \n\t"\r
359                                                 "       bne                     reg_test_1_error                \n\t"\r
360                                                 "       cmpi.l          #7, d6                                  \n\t"\r
361                                                 "       bne                     reg_test_1_error                \n\t"\r
362                                                 "       cmpi.l          #8, d7                                  \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            a0, d0                                  \n\t"\r
365                                                 "       cmpi.l          #9, d0                                  \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            a1, d0                                  \n\t"\r
368                                                 "       cmpi.l          #10, d0                                 \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            a2, d0                                  \n\t"\r
371                                                 "       cmpi.l          #11, d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            a3, d0                                  \n\t"\r
374                                                 "       cmpi.l          #12, d0                                 \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            a4, d0                                  \n\t"\r
377                                                 "       cmpi.l          #13, d0                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            a5, d0                                  \n\t"\r
380                                                 "       cmpi.l          #14, d0                                 \n\t"\r
381                                                 "       bne                     reg_test_1_error                \n\t"\r
382                                                 "       move            a6, d0                                  \n\t"\r
383                                                 "       cmpi.l          #15, d0                                 \n\t"\r
384                                                 "       bne                     reg_test_1_error                \n\t"\r
385                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
386                                                 "       addq            #1, d0                                  \n\t"\r
387                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
388                                                 "       bra                     reg_test_1_start                \n\t"\r
389                                                 "reg_test_1_error:                                              \n\t"\r
390                                                 "       bra                     reg_test_1_error                \n\t"\r
391                                         );\r
392 }\r
393 /*-----------------------------------------------------------*/\r
394 \r
395 static void vRegTest2Task( void *pvParameters )\r
396 {\r
397         /* Sanity check - did we receive the parameter expected? */\r
398         if( pvParameters != &ulRegTest2Counter )\r
399         {\r
400                 /* Change here so the check task can detect that an error occurred. */\r
401                 for( ;; )\r
402                 {\r
403                 }\r
404         }\r
405 \r
406         /* Set all the registers to known values, then check that each retains its\r
407         expected value - as described at the top of this file.  If an error is\r
408         found then the loop counter will no longer be incremented allowing the check\r
409         task to recognise the error. */\r
410         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
411                                                 "       moveq           #10, d0                                 \n\t"\r
412                                                 "       moveq           #20, d1                                 \n\t"\r
413                                                 "       moveq           #30, d2                                 \n\t"\r
414                                                 "       moveq           #40, d3                                 \n\t"\r
415                                                 "       moveq           #50, d4                                 \n\t"\r
416                                                 "       moveq           #60, d5                                 \n\t"\r
417                                                 "       moveq           #70, d6                                 \n\t"\r
418                                                 "       moveq           #80, d7                                 \n\t"\r
419                                                 "       move            #90, a0                                 \n\t"\r
420                                                 "       move            #100, a1                                \n\t"\r
421                                                 "       move            #110, a2                                \n\t"\r
422                                                 "       move            #120, a3                                \n\t"\r
423                                                 "       move            #130, a4                                \n\t"\r
424                                                 "       move            #140, a5                                \n\t"\r
425                                                 "       move            #150, a6                                \n\t"\r
426                                                 "                                                                               \n\t"\r
427                                                 "       cmpi.l          #10, d0                                 \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       cmpi.l          #20, d1                                 \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       cmpi.l          #30, d2                                 \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       cmpi.l          #40, d3                                 \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       cmpi.l          #50, d4                                 \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       cmpi.l          #60, d5                                 \n\t"\r
438                                                 "       bne                     reg_test_2_error                \n\t"\r
439                                                 "       cmpi.l          #70, d6                                 \n\t"\r
440                                                 "       bne                     reg_test_2_error                \n\t"\r
441                                                 "       cmpi.l          #80, d7                                 \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a0, d0                                  \n\t"\r
444                                                 "       cmpi.l          #90, d0                                 \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            a1, d0                                  \n\t"\r
447                                                 "       cmpi.l          #100, d0                                \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            a2, d0                                  \n\t"\r
450                                                 "       cmpi.l          #110, d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            a3, d0                                  \n\t"\r
453                                                 "       cmpi.l          #120, d0                                \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            a4, d0                                  \n\t"\r
456                                                 "       cmpi.l          #130, d0                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            a5, d0                                  \n\t"\r
459                                                 "       cmpi.l          #140, d0                                \n\t"\r
460                                                 "       bne                     reg_test_2_error                \n\t"\r
461                                                 "       move            a6, d0                                  \n\t"\r
462                                                 "       cmpi.l          #150, d0                                \n\t"\r
463                                                 "       bne                     reg_test_2_error                \n\t"\r
464                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
465                                                 "       addq            #1, d0                                  \n\t"\r
466                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
467                                                 "       bra                     reg_test_2_start                \n\t"\r
468                                                 "reg_test_2_error:                                              \n\t"\r
469                                                 "       bra                     reg_test_2_error                \n\t"\r
470                                         );\r
471 }\r
472 /*-----------------------------------------------------------*/\r
473 \r
474 \r
475 \r