git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ColdFire_MCF52233_Eclipse/RTOSDemo/main.c

   1 /*\r
   2     FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT\r
   5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
  10      *    Complete, revised, and edited pdf reference manuals are also       *\r
  11      *    available.                                                         *\r
  12      *                                                                       *\r
  13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
  14      *    ensuring you get running as quickly as possible and with an        *\r
  15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
  16      *    the FreeRTOS project to continue with its mission of providing     *\r
  17      *    professional grade, cross platform, de facto standard solutions    *\r
  18      *    for microcontrollers - completely free of charge!                  *\r
  19      *                                                                       *\r
  20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
  21      *                                                                       *\r
  22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
  23      *                                                                       *\r
  24     ***************************************************************************\r
  25 \r
  26 \r
  27     This file is part of the FreeRTOS distribution.\r
  28 \r
  29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  30     the terms of the GNU General Public License (version 2) as published by the\r
  31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  32 \r
  33     >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
  34     distribute a combined work that includes FreeRTOS without being obliged to\r
  35     provide the source code for proprietary components outside of the FreeRTOS\r
  36     kernel.\r
  37 \r
  38     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  39     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  40     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more\r
  41     details. You should have received a copy of the GNU General Public License\r
  42     and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
  43     viewed here: http://www.freertos.org/a00114.html and also obtained by\r
  44     writing to Real Time Engineers Ltd., contact details for whom are available\r
  45     on the FreeRTOS WEB site.\r
  46 \r
  47     1 tab == 4 spaces!\r
  48 \r
  49     ***************************************************************************\r
  50      *                                                                       *\r
  51      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  52      *    not run, what could be wrong?"                                     *\r
  53      *                                                                       *\r
  54      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  55      *                                                                       *\r
  56     ***************************************************************************\r
  57 \r
  58 \r
  59     http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
  60     license and Real Time Engineers Ltd. contact details.\r
  61 \r
  62     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  63     including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
  64     fully thread aware and reentrant UDP/IP stack.\r
  65 \r
  66     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
  67     Integrity Systems, who sell the code with commercial support, \r
  68     indemnification and middleware, under the OpenRTOS brand.\r
  69     \r
  70     http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
  71     engineered and independently SIL3 certified version for use in safety and \r
  72     mission critical applications that require provable dependability.\r
  73 */\r
  74 \r
  75 \r
  76 /*\r
  77  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  78  * documentation provides more details of the standard demo application tasks.\r
  79  * In addition to the standard demo tasks, the following tasks and tests are\r
  80  * defined and/or created within this file:\r
  81  *\r
  82  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
  83  * processing is performed in this task.  It manages the WEB server functionality.\r
  84  *\r
  85  * "Check" task -  This only executes every five seconds but has a high priority\r
  86  * to ensure it gets processor time.  Its main function is to check that all the\r
  87  * standard demo tasks are still operational.  An error found in any task will be\r
  88  * latched in the ulErrorCode variable for display through the WEB server (the\r
  89  * error code is displayed at the foot of the table that contains information on\r
  90  * the state of each task).\r
  91  *\r
  92  * "Reg test" tasks - These fill the registers with known values, then check\r
  93  * that each register still contains its expected value.  Each task uses\r
  94  * different values.  The tasks run with very low priority so get preempted very\r
  95  * frequently.  A register containing an unexpected value is indicative of an\r
  96  * error in the context switching mechanism.\r
  97  *\r
  98  */\r
  99 \r
 100 /* Standard includes. */\r
 101 #include <stdio.h>\r
 102 \r
 103 /* Scheduler includes. */\r
 104 #include "FreeRTOS.h"\r
 105 #include "task.h"\r
 106 #include "queue.h"\r
 107 #include "semphr.h"\r
 108 \r
 109 /* Demo app includes. */\r
 110 #include "BlockQ.h"\r
 111 #include "death.h"\r
 112 #include "blocktim.h"\r
 113 #include "flash.h"\r
 114 #include "partest.h"\r
 115 #include "semtest.h"\r
 116 #include "PollQ.h"\r
 117 #include "GenQTest.h"\r
 118 #include "QPeek.h"\r
 119 #include "recmutex.h"\r
 120 #include "IntQueue.h"\r
 121 #include "comtest2.h"\r
 122 \r
 123 /*-----------------------------------------------------------*/\r
 124 \r
 125 /* The time between cycles of the 'check' functionality - as described at the\r
 126 top of this file. */\r
 127 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
 128 \r
 129 /* Task priorities. */\r
 130 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 131 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 132 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 133 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 134 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 135 \r
 136 /* The WEB server task uses more stack than most other tasks because of its\r
 137 reliance on using sprintf(). */\r
 138 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
 139 \r
 140 /*\r
 141  * Configure the hardware for the demo.\r
 142  */\r
 143 static void prvSetupHardware( void );\r
 144 \r
 145 /*\r
 146  * Implements the 'check' task functionality as described at the top of this\r
 147  * file.\r
 148  */\r
 149 static void prvCheckTask( void *pvParameters );\r
 150 \r
 151 /*\r
 152  * The task that implements the WEB server.\r
 153  */\r
 154 extern void vuIP_Task( void *pvParameters );\r
 155 \r
 156 /*\r
 157  * Implement the 'Reg test' functionality as described at the top of this file.\r
 158  */\r
 159 static void vRegTest1Task( void *pvParameters );\r
 160 static void vRegTest2Task( void *pvParameters );\r
 161 \r
 162 /*-----------------------------------------------------------*/\r
 163 \r
 164 /* Counters used to detect errors within the reg test tasks. */\r
 165 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 166 \r
 167 /* Any errors that the check task finds in any tasks are latched into \r
 168 ulErrorCode, and then displayed via the WEB server. */\r
 169 static unsigned portLONG ulErrorCode = 0UL;\r
 170 \r
 171 /*-----------------------------------------------------------*/\r
 172 \r
 173 int main( void )\r
 174 {\r
 175         /* Setup the hardware ready for this demo. */\r
 176         prvSetupHardware();\r
 177 \r
 178         /* Create the WEB server task. */\r
 179         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
 180 \r
 181         /* Start the standard demo tasks. */\r
 182         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 183         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 184     vCreateBlockTimeTasks();\r
 185         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 186         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 187         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 188         vStartQueuePeekTasks();\r
 189     vStartRecursiveMutexTasks();\r
 190 \r
 191         /* Start the reg test tasks - defined in this file. */\r
 192         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 193         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 194 \r
 195         /* Create the check task. */\r
 196         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 197 \r
 198         /* Start the scheduler. */\r
 199         vTaskStartScheduler();\r
 200 \r
 201     /* Will only get here if there was insufficient heap to create the idle\r
 202     task. */\r
 203         for( ;; );\r
 204 }\r
 205 /*-----------------------------------------------------------*/\r
 206 \r
 207 static void prvCheckTask( void *pvParameters )\r
 208 {\r
 209 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 210 portTickType xLastExecutionTime;\r
 211 \r
 212         /* To prevent compiler warnings. */\r
 213         ( void ) pvParameters;\r
 214 \r
 215         /* Initialise the variable used to control our iteration rate prior to\r
 216         its first use. */\r
 217         xLastExecutionTime = xTaskGetTickCount();\r
 218 \r
 219         for( ;; )\r
 220         {\r
 221                 /* Wait until it is time to run the tests again. */\r
 222                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
 223 \r
 224                 /* Has an error been found in any task? */\r
 225                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 226                 {\r
 227                         ulErrorCode |= 0x01UL;\r
 228                 }\r
 229 \r
 230                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 231                 {\r
 232                         ulErrorCode |= 0x02UL;\r
 233                 }\r
 234 \r
 235                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 236                 {\r
 237                         ulErrorCode |= 0x04UL;\r
 238                 }\r
 239 \r
 240                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 241             {\r
 242                 ulErrorCode |= 0x20UL;\r
 243             }\r
 244 \r
 245                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 246             {\r
 247                 ulErrorCode |= 0x40UL;\r
 248             }\r
 249 \r
 250                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
 251                 {\r
 252                         ulErrorCode |= 0x80UL;\r
 253                 }\r
 254 \r
 255             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 256             {\r
 257                 ulErrorCode |= 0x100UL;\r
 258             }\r
 259 \r
 260                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 261                 {\r
 262                         ulErrorCode |= 0x200UL;\r
 263                 }\r
 264 \r
 265                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 266                 {\r
 267                         ulErrorCode |= 0x200UL;\r
 268                 }\r
 269 \r
 270                 /* Remember the reg test counts so a stall in their values can be\r
 271                 detected next time around. */\r
 272                 ulLastRegTest1Count = ulRegTest1Counter;\r
 273                 ulLastRegTest2Count = ulRegTest2Counter;\r
 274         }\r
 275 }\r
 276 /*-----------------------------------------------------------*/\r
 277 \r
 278 unsigned portLONG ulGetErrorCode( void )\r
 279 {\r
 280         /* Returns the error code for display via the WEB server. */\r
 281         return ulErrorCode;\r
 282 }\r
 283 /*-----------------------------------------------------------*/\r
 284 \r
 285 void prvSetupHardware( void )\r
 286 {\r
 287 __attribute__ ((section(".cfmconfig")))\r
 288 static const unsigned long _cfm[6] = {\r
 289         0, /* KEY_UPPER 0x00000400 */\r
 290         0, /* KEY_LOWER 0x00000404 */\r
 291         0, /* CFMPROT 0x00000408 */\r
 292         0, /* CFMSACC 0x0000040C */\r
 293         0, /* CFMDACC 0x00000410 */\r
 294         0, /* CFMSEC 0x00000414 */\r
 295 };\r
 296 \r
 297         /* Just to stop compiler warnings. */\r
 298         ( void ) _cfm;\r
 299 \r
 300         /* Ensure the watchdog is disabled. */\r
 301         MCF_SCM_CWCR = 0;\r
 302 \r
 303     /* Initialize IPSBAR (0x40000000). */\r
 304         asm volatile(\r
 305                 "move.l  #0x40000000,%d0        \n"\r
 306                 "andi.l  #0xC0000000,%d0        \n"\r
 307                 "add.l   #0x1,%d0                       \n"\r
 308                 "move.l  %d0,0x40000000         "\r
 309         );\r
 310 \r
 311     /* Initialize FLASHBAR (0x00) */\r
 312         asm volatile(\r
 313                 "move.l  #0x00,%d0                      \n"\r
 314                 "andi.l  #0xFFF80000,%d0        \n"\r
 315                 "add.l   #0x41,%d0                      \n"\r
 316                 "movec   %d0,%FLASHBAR          "\r
 317         );\r
 318 \r
 319         portDISABLE_INTERRUPTS();\r
 320 \r
 321         /* RAMBAR. */\r
 322         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
 323 \r
 324         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
 325         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
 326         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
 327         {\r
 328         }\r
 329 \r
 330         /* Setup the port used to toggle LEDs. */\r
 331         vParTestInitialise();\r
 332 }\r
 333 /*-----------------------------------------------------------*/\r
 334 \r
 335 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 336 {\r
 337         /* This will get called if a stack overflow is detected during the context\r
 338         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 339         problems within nested interrupts, but only do this for debug purposes as\r
 340         it will increase the context switch time. */\r
 341 \r
 342         ( void ) pxTask;\r
 343         ( void ) pcTaskName;\r
 344 \r
 345         for( ;; );\r
 346 }\r
 347 /*-----------------------------------------------------------*/\r
 348 \r
 349 static void vRegTest1Task( void *pvParameters )\r
 350 {\r
 351         /* Sanity check - did we receive the parameter expected? */\r
 352         if( pvParameters != &ulRegTest1Counter )\r
 353         {\r
 354                 /* Change here so the check task can detect that an error occurred. */\r
 355                 for( ;; );\r
 356         }\r
 357 \r
 358         /* Set all the registers to known values, then check that each retains its\r
 359         expected value - as described at the top of this file.  If an error is\r
 360         found then the loop counter will no longer be incremented allowing the check\r
 361         task to recognise the error. */\r
 362         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 363                                                 "       moveq           #1, %d0                                 \n\t"\r
 364                                                 "       moveq           #2, %d1                                 \n\t"\r
 365                                                 "       moveq           #3, %d2                                 \n\t"\r
 366                                                 "       moveq           #4, %d3                                 \n\t"\r
 367                                                 "       moveq           #5, %d4                                 \n\t"\r
 368                                                 "       moveq           #6, %d5                                 \n\t"\r
 369                                                 "       moveq           #7, %d6                                 \n\t"\r
 370                                                 "       moveq           #8, %d7                                 \n\t"\r
 371                                                 "       move            #9, %a0                                 \n\t"\r
 372                                                 "       move            #10, %a1                                \n\t"\r
 373                                                 "       move            #11, %a2                                \n\t"\r
 374                                                 "       move            #12, %a3                                \n\t"\r
 375                                                 "       move            #13, %a4                                \n\t"\r
 376                                                 "       move            #14, %a5                                \n\t"\r
 377                                                 "       move            #15, %a6                                \n\t"\r
 378                                                 "                                                                               \n\t"\r
 379                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 380                                                 "       bne                     reg_test_1_error                \n\t"\r
 381                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 382                                                 "       bne                     reg_test_1_error                \n\t"\r
 383                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 384                                                 "       bne                     reg_test_1_error                \n\t"\r
 385                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 386                                                 "       bne                     reg_test_1_error                \n\t"\r
 387                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 388                                                 "       bne                     reg_test_1_error                \n\t"\r
 389                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 390                                                 "       bne                     reg_test_1_error                \n\t"\r
 391                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 392                                                 "       bne                     reg_test_1_error                \n\t"\r
 393                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 394                                                 "       bne                     reg_test_1_error                \n\t"\r
 395                                                 "       move            %a0, %d0                                \n\t"\r
 396                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 397                                                 "       bne                     reg_test_1_error                \n\t"\r
 398                                                 "       move            %a1, %d0                                \n\t"\r
 399                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 400                                                 "       bne                     reg_test_1_error                \n\t"\r
 401                                                 "       move            %a2, %d0                                \n\t"\r
 402                                                 "       cmpi.l          #11, %d0                                \n\t"\r
 403                                                 "       bne                     reg_test_1_error                \n\t"\r
 404                                                 "       move            %a3, %d0                                \n\t"\r
 405                                                 "       cmpi.l          #12, %d0                                \n\t"\r
 406                                                 "       bne                     reg_test_1_error                \n\t"\r
 407                                                 "       move            %a4, %d0                                \n\t"\r
 408                                                 "       cmpi.l          #13, %d0                                \n\t"\r
 409                                                 "       bne                     reg_test_1_error                \n\t"\r
 410                                                 "       move            %a5, %d0                                \n\t"\r
 411                                                 "       cmpi.l          #14, %d0                                \n\t"\r
 412                                                 "       bne                     reg_test_1_error                \n\t"\r
 413                                                 "       move            %a6, %d0                                \n\t"\r
 414                                                 "       cmpi.l          #15, %d0                                \n\t"\r
 415                                                 "       bne                     reg_test_1_error                \n\t"\r
 416                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 417                                                 "       addql           #1, %d0                                 \n\t"\r
 418                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 419                                                 "       bra                     reg_test_1_start                \n\t"\r
 420                                                 "reg_test_1_error:                                              \n\t"\r
 421                                                 "       bra                     reg_test_1_error                \n\t"\r
 422                                         );\r
 423 }\r
 424 /*-----------------------------------------------------------*/\r
 425 \r
 426 static void vRegTest2Task( void *pvParameters )\r
 427 {\r
 428         /* Sanity check - did we receive the parameter expected? */\r
 429         if( pvParameters != &ulRegTest2Counter )\r
 430         {\r
 431                 /* Change here so the check task can detect that an error occurred. */\r
 432                 for( ;; );\r
 433         }\r
 434 \r
 435         /* Set all the registers to known values, then check that each retains its\r
 436         expected value - as described at the top of this file.  If an error is\r
 437         found then the loop counter will no longer be incremented allowing the check\r
 438         task to recognise the error. */\r
 439         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 440                                                 "       moveq           #10, %d0                                \n\t"\r
 441                                                 "       moveq           #20, %d1                                \n\t"\r
 442                                                 "       moveq           #30, %d2                                \n\t"\r
 443                                                 "       moveq           #40, %d3                                \n\t"\r
 444                                                 "       moveq           #50, %d4                                \n\t"\r
 445                                                 "       moveq           #60, %d5                                \n\t"\r
 446                                                 "       moveq           #70, %d6                                \n\t"\r
 447                                                 "       moveq           #80, %d7                                \n\t"\r
 448                                                 "       move            #90, %a0                                \n\t"\r
 449                                                 "       move            #100, %a1                               \n\t"\r
 450                                                 "       move            #110, %a2                               \n\t"\r
 451                                                 "       move            #120, %a3                               \n\t"\r
 452                                                 "       move            #130, %a4                               \n\t"\r
 453                                                 "       move            #140, %a5                               \n\t"\r
 454                                                 "       move            #150, %a6                               \n\t"\r
 455                                                 "                                                                               \n\t"\r
 456                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 457                                                 "       bne                     reg_test_2_error                \n\t"\r
 458                                                 "       cmpi.l          #20, %d1                                \n\t"\r
 459                                                 "       bne                     reg_test_2_error                \n\t"\r
 460                                                 "       cmpi.l          #30, %d2                                \n\t"\r
 461                                                 "       bne                     reg_test_2_error                \n\t"\r
 462                                                 "       cmpi.l          #40, %d3                                \n\t"\r
 463                                                 "       bne                     reg_test_2_error                \n\t"\r
 464                                                 "       cmpi.l          #50, %d4                                \n\t"\r
 465                                                 "       bne                     reg_test_2_error                \n\t"\r
 466                                                 "       cmpi.l          #60, %d5                                \n\t"\r
 467                                                 "       bne                     reg_test_2_error                \n\t"\r
 468                                                 "       cmpi.l          #70, %d6                                \n\t"\r
 469                                                 "       bne                     reg_test_2_error                \n\t"\r
 470                                                 "       cmpi.l          #80, %d7                                \n\t"\r
 471                                                 "       bne                     reg_test_2_error                \n\t"\r
 472                                                 "       move            %a0, %d0                                \n\t"\r
 473                                                 "       cmpi.l          #90, %d0                                \n\t"\r
 474                                                 "       bne                     reg_test_2_error                \n\t"\r
 475                                                 "       move            %a1, %d0                                \n\t"\r
 476                                                 "       cmpi.l          #100, %d0                               \n\t"\r
 477                                                 "       bne                     reg_test_2_error                \n\t"\r
 478                                                 "       move            %a2, %d0                                \n\t"\r
 479                                                 "       cmpi.l          #110, %d0                               \n\t"\r
 480                                                 "       bne                     reg_test_2_error                \n\t"\r
 481                                                 "       move            %a3, %d0                                \n\t"\r
 482                                                 "       cmpi.l          #120, %d0                               \n\t"\r
 483                                                 "       bne                     reg_test_2_error                \n\t"\r
 484                                                 "       move            %a4, %d0                                \n\t"\r
 485                                                 "       cmpi.l          #130, %d0                               \n\t"\r
 486                                                 "       bne                     reg_test_2_error                \n\t"\r
 487                                                 "       move            %a5, %d0                                \n\t"\r
 488                                                 "       cmpi.l          #140, %d0                               \n\t"\r
 489                                                 "       bne                     reg_test_2_error                \n\t"\r
 490                                                 "       move            %a6, %d0                                \n\t"\r
 491                                                 "       cmpi.l          #150, %d0                               \n\t"\r
 492                                                 "       bne                     reg_test_2_error                \n\t"\r
 493                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 494                                                 "       addql           #1, %d0                                 \n\t"\r
 495                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 496                                                 "       bra                     reg_test_2_start                \n\t"\r
 497                                                 "reg_test_2_error:                                              \n\t"\r
 498                                                 "       bra                     reg_test_2_error                \n\t"\r
 499                                         );\r
 500 }\r
 501 /*-----------------------------------------------------------*/\r
 502 \r