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1 /*\r
2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3 \r
4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
10      *    Complete, revised, and edited pdf reference manuals are also       *\r
11      *    available.                                                         *\r
12      *                                                                       *\r
13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
14      *    ensuring you get running as quickly as possible and with an        *\r
15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
16      *    the FreeRTOS project to continue with its mission of providing     *\r
17      *    professional grade, cross platform, de facto standard solutions    *\r
18      *    for microcontrollers - completely free of charge!                  *\r
19      *                                                                       *\r
20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
21      *                                                                       *\r
22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
23      *                                                                       *\r
24     ***************************************************************************\r
25 \r
26 \r
27     This file is part of the FreeRTOS distribution.\r
28 \r
29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
30     the terms of the GNU General Public License (version 2) as published by the\r
31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
32     >>>NOTE<<< The modification to the GPL is included to allow you to\r
33     distribute a combined work that includes FreeRTOS without being obliged to\r
34     provide the source code for proprietary components outside of the FreeRTOS\r
35     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
38     more details. You should have received a copy of the GNU General Public\r
39     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
40     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
41     by writing to Richard Barry, contact details for whom are available on the\r
42     FreeRTOS WEB site.\r
43 \r
44     1 tab == 4 spaces!\r
45     \r
46     ***************************************************************************\r
47      *                                                                       *\r
48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
49      *    not run, what could be wrong?"                                     *\r
50      *                                                                       *\r
51      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
52      *                                                                       *\r
53     ***************************************************************************\r
54 \r
55     \r
56     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
57     and contact details.  \r
58     \r
59     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
60     including FreeRTOS+Trace - an indispensable productivity tool.\r
61 \r
62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
63     the code with commercial support, indemnification, and middleware, under \r
64     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
65     provide a safety engineered and independently SIL3 certified version under \r
66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
67 */\r
68 \r
69 \r
70 /*\r
71  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
72  * documentation provides more details of the standard demo application tasks.\r
73  * In addition to the standard demo tasks, the following tasks and tests are\r
74  * defined and/or created within this file:\r
75  *\r
76  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
77  * processing is performed in this task.  It manages the WEB server functionality.\r
78  *\r
79  * "Check" task -  This only executes every five seconds but has a high priority\r
80  * to ensure it gets processor time.  Its main function is to check that all the\r
81  * standard demo tasks are still operational.  An error found in any task will be\r
82  * latched in the ulErrorCode variable for display through the WEB server (the\r
83  * error code is displayed at the foot of the table that contains information on\r
84  * the state of each task).\r
85  *\r
86  * "Reg test" tasks - These fill the registers with known values, then check\r
87  * that each register still contains its expected value.  Each task uses\r
88  * different values.  The tasks run with very low priority so get preempted very\r
89  * frequently.  A register containing an unexpected value is indicative of an\r
90  * error in the context switching mechanism.\r
91  *\r
92  */\r
93 \r
94 /* Standard includes. */\r
95 #include <stdio.h>\r
96 \r
97 /* Scheduler includes. */\r
98 #include "FreeRTOS.h"\r
99 #include "task.h"\r
100 #include "queue.h"\r
101 #include "semphr.h"\r
102 \r
103 /* Demo app includes. */\r
104 #include "BlockQ.h"\r
105 #include "death.h"\r
106 #include "blocktim.h"\r
107 #include "flash.h"\r
108 #include "partest.h"\r
109 #include "semtest.h"\r
110 #include "PollQ.h"\r
111 #include "GenQTest.h"\r
112 #include "QPeek.h"\r
113 #include "recmutex.h"\r
114 #include "IntQueue.h"\r
115 #include "comtest2.h"\r
116 \r
117 /*-----------------------------------------------------------*/\r
118 \r
119 /* The time between cycles of the 'check' functionality - as described at the\r
120 top of this file. */\r
121 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
122 \r
123 /* Task priorities. */\r
124 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
125 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
126 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
127 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
128 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
129 \r
130 /* The WEB server task uses more stack than most other tasks because of its\r
131 reliance on using sprintf(). */\r
132 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
133 \r
134 /*\r
135  * Configure the hardware for the demo.\r
136  */\r
137 static void prvSetupHardware( void );\r
138 \r
139 /*\r
140  * Implements the 'check' task functionality as described at the top of this\r
141  * file.\r
142  */\r
143 static void prvCheckTask( void *pvParameters );\r
144 \r
145 /*\r
146  * The task that implements the WEB server.\r
147  */\r
148 extern void vuIP_Task( void *pvParameters );\r
149 \r
150 /*\r
151  * Implement the 'Reg test' functionality as described at the top of this file.\r
152  */\r
153 static void vRegTest1Task( void *pvParameters );\r
154 static void vRegTest2Task( void *pvParameters );\r
155 \r
156 /*-----------------------------------------------------------*/\r
157 \r
158 /* Counters used to detect errors within the reg test tasks. */\r
159 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
160 \r
161 /* Any errors that the check task finds in any tasks are latched into \r
162 ulErrorCode, and then displayed via the WEB server. */\r
163 static unsigned portLONG ulErrorCode = 0UL;\r
164 \r
165 /*-----------------------------------------------------------*/\r
166 \r
167 int main( void )\r
168 {\r
169         /* Setup the hardware ready for this demo. */\r
170         prvSetupHardware();\r
171 \r
172         /* Create the WEB server task. */\r
173         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
174 \r
175         /* Start the standard demo tasks. */\r
176         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
177         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
178     vCreateBlockTimeTasks();\r
179         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
180         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
181         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
182         vStartQueuePeekTasks();\r
183     vStartRecursiveMutexTasks();\r
184 \r
185         /* Start the reg test tasks - defined in this file. */\r
186         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
187         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
188 \r
189         /* Create the check task. */\r
190         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
191 \r
192         /* Start the scheduler. */\r
193         vTaskStartScheduler();\r
194 \r
195     /* Will only get here if there was insufficient heap to create the idle\r
196     task. */\r
197         for( ;; );\r
198 }\r
199 /*-----------------------------------------------------------*/\r
200 \r
201 static void prvCheckTask( void *pvParameters )\r
202 {\r
203 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
204 portTickType xLastExecutionTime;\r
205 \r
206         /* To prevent compiler warnings. */\r
207         ( void ) pvParameters;\r
208 \r
209         /* Initialise the variable used to control our iteration rate prior to\r
210         its first use. */\r
211         xLastExecutionTime = xTaskGetTickCount();\r
212 \r
213         for( ;; )\r
214         {\r
215                 /* Wait until it is time to run the tests again. */\r
216                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
217 \r
218                 /* Has an error been found in any task? */\r
219                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
220                 {\r
221                         ulErrorCode |= 0x01UL;\r
222                 }\r
223 \r
224                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
225                 {\r
226                         ulErrorCode |= 0x02UL;\r
227                 }\r
228 \r
229                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
230                 {\r
231                         ulErrorCode |= 0x04UL;\r
232                 }\r
233 \r
234                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
235             {\r
236                 ulErrorCode |= 0x20UL;\r
237             }\r
238 \r
239                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
240             {\r
241                 ulErrorCode |= 0x40UL;\r
242             }\r
243 \r
244                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
245                 {\r
246                         ulErrorCode |= 0x80UL;\r
247                 }\r
248 \r
249             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
250             {\r
251                 ulErrorCode |= 0x100UL;\r
252             }\r
253 \r
254                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
255                 {\r
256                         ulErrorCode |= 0x200UL;\r
257                 }\r
258 \r
259                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
260                 {\r
261                         ulErrorCode |= 0x200UL;\r
262                 }\r
263 \r
264                 /* Remember the reg test counts so a stall in their values can be\r
265                 detected next time around. */\r
266                 ulLastRegTest1Count = ulRegTest1Counter;\r
267                 ulLastRegTest2Count = ulRegTest2Counter;\r
268         }\r
269 }\r
270 /*-----------------------------------------------------------*/\r
271 \r
272 unsigned portLONG ulGetErrorCode( void )\r
273 {\r
274         /* Returns the error code for display via the WEB server. */\r
275         return ulErrorCode;\r
276 }\r
277 /*-----------------------------------------------------------*/\r
278 \r
279 void prvSetupHardware( void )\r
280 {\r
281 __attribute__ ((section(".cfmconfig")))\r
282 static const unsigned long _cfm[6] = {\r
283         0, /* KEY_UPPER 0x00000400 */\r
284         0, /* KEY_LOWER 0x00000404 */\r
285         0, /* CFMPROT 0x00000408 */\r
286         0, /* CFMSACC 0x0000040C */\r
287         0, /* CFMDACC 0x00000410 */\r
288         0, /* CFMSEC 0x00000414 */\r
289 };\r
290 \r
291         /* Just to stop compiler warnings. */\r
292         ( void ) _cfm;\r
293 \r
294         /* Ensure the watchdog is disabled. */\r
295         MCF_SCM_CWCR = 0;\r
296 \r
297     /* Initialize IPSBAR (0x40000000). */\r
298         asm volatile(\r
299                 "move.l  #0x40000000,%d0        \n"\r
300                 "andi.l  #0xC0000000,%d0        \n"\r
301                 "add.l   #0x1,%d0                       \n"\r
302                 "move.l  %d0,0x40000000         "\r
303         );\r
304 \r
305     /* Initialize FLASHBAR (0x00) */\r
306         asm volatile(\r
307                 "move.l  #0x00,%d0                      \n"\r
308                 "andi.l  #0xFFF80000,%d0        \n"\r
309                 "add.l   #0x41,%d0                      \n"\r
310                 "movec   %d0,%FLASHBAR          "\r
311         );\r
312 \r
313         portDISABLE_INTERRUPTS();\r
314 \r
315         /* RAMBAR. */\r
316         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
317 \r
318         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
319         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
320         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
321         {\r
322         }\r
323 \r
324         /* Setup the port used to toggle LEDs. */\r
325         vParTestInitialise();\r
326 }\r
327 /*-----------------------------------------------------------*/\r
328 \r
329 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
330 {\r
331         /* This will get called if a stack overflow is detected during the context\r
332         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
333         problems within nested interrupts, but only do this for debug purposes as\r
334         it will increase the context switch time. */\r
335 \r
336         ( void ) pxTask;\r
337         ( void ) pcTaskName;\r
338 \r
339         for( ;; );\r
340 }\r
341 /*-----------------------------------------------------------*/\r
342 \r
343 static void vRegTest1Task( void *pvParameters )\r
344 {\r
345         /* Sanity check - did we receive the parameter expected? */\r
346         if( pvParameters != &ulRegTest1Counter )\r
347         {\r
348                 /* Change here so the check task can detect that an error occurred. */\r
349                 for( ;; );\r
350         }\r
351 \r
352         /* Set all the registers to known values, then check that each retains its\r
353         expected value - as described at the top of this file.  If an error is\r
354         found then the loop counter will no longer be incremented allowing the check\r
355         task to recognise the error. */\r
356         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
357                                                 "       moveq           #1, %d0                                 \n\t"\r
358                                                 "       moveq           #2, %d1                                 \n\t"\r
359                                                 "       moveq           #3, %d2                                 \n\t"\r
360                                                 "       moveq           #4, %d3                                 \n\t"\r
361                                                 "       moveq           #5, %d4                                 \n\t"\r
362                                                 "       moveq           #6, %d5                                 \n\t"\r
363                                                 "       moveq           #7, %d6                                 \n\t"\r
364                                                 "       moveq           #8, %d7                                 \n\t"\r
365                                                 "       move            #9, %a0                                 \n\t"\r
366                                                 "       move            #10, %a1                                \n\t"\r
367                                                 "       move            #11, %a2                                \n\t"\r
368                                                 "       move            #12, %a3                                \n\t"\r
369                                                 "       move            #13, %a4                                \n\t"\r
370                                                 "       move            #14, %a5                                \n\t"\r
371                                                 "       move            #15, %a6                                \n\t"\r
372                                                 "                                                                               \n\t"\r
373                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
374                                                 "       bne                     reg_test_1_error                \n\t"\r
375                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
376                                                 "       bne                     reg_test_1_error                \n\t"\r
377                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
380                                                 "       bne                     reg_test_1_error                \n\t"\r
381                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
382                                                 "       bne                     reg_test_1_error                \n\t"\r
383                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
384                                                 "       bne                     reg_test_1_error                \n\t"\r
385                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
386                                                 "       bne                     reg_test_1_error                \n\t"\r
387                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
388                                                 "       bne                     reg_test_1_error                \n\t"\r
389                                                 "       move            %a0, %d0                                \n\t"\r
390                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
391                                                 "       bne                     reg_test_1_error                \n\t"\r
392                                                 "       move            %a1, %d0                                \n\t"\r
393                                                 "       cmpi.l          #10, %d0                                \n\t"\r
394                                                 "       bne                     reg_test_1_error                \n\t"\r
395                                                 "       move            %a2, %d0                                \n\t"\r
396                                                 "       cmpi.l          #11, %d0                                \n\t"\r
397                                                 "       bne                     reg_test_1_error                \n\t"\r
398                                                 "       move            %a3, %d0                                \n\t"\r
399                                                 "       cmpi.l          #12, %d0                                \n\t"\r
400                                                 "       bne                     reg_test_1_error                \n\t"\r
401                                                 "       move            %a4, %d0                                \n\t"\r
402                                                 "       cmpi.l          #13, %d0                                \n\t"\r
403                                                 "       bne                     reg_test_1_error                \n\t"\r
404                                                 "       move            %a5, %d0                                \n\t"\r
405                                                 "       cmpi.l          #14, %d0                                \n\t"\r
406                                                 "       bne                     reg_test_1_error                \n\t"\r
407                                                 "       move            %a6, %d0                                \n\t"\r
408                                                 "       cmpi.l          #15, %d0                                \n\t"\r
409                                                 "       bne                     reg_test_1_error                \n\t"\r
410                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
411                                                 "       addql           #1, %d0                                 \n\t"\r
412                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
413                                                 "       bra                     reg_test_1_start                \n\t"\r
414                                                 "reg_test_1_error:                                              \n\t"\r
415                                                 "       bra                     reg_test_1_error                \n\t"\r
416                                         );\r
417 }\r
418 /*-----------------------------------------------------------*/\r
419 \r
420 static void vRegTest2Task( void *pvParameters )\r
421 {\r
422         /* Sanity check - did we receive the parameter expected? */\r
423         if( pvParameters != &ulRegTest2Counter )\r
424         {\r
425                 /* Change here so the check task can detect that an error occurred. */\r
426                 for( ;; );\r
427         }\r
428 \r
429         /* Set all the registers to known values, then check that each retains its\r
430         expected value - as described at the top of this file.  If an error is\r
431         found then the loop counter will no longer be incremented allowing the check\r
432         task to recognise the error. */\r
433         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
434                                                 "       moveq           #10, %d0                                \n\t"\r
435                                                 "       moveq           #20, %d1                                \n\t"\r
436                                                 "       moveq           #30, %d2                                \n\t"\r
437                                                 "       moveq           #40, %d3                                \n\t"\r
438                                                 "       moveq           #50, %d4                                \n\t"\r
439                                                 "       moveq           #60, %d5                                \n\t"\r
440                                                 "       moveq           #70, %d6                                \n\t"\r
441                                                 "       moveq           #80, %d7                                \n\t"\r
442                                                 "       move            #90, %a0                                \n\t"\r
443                                                 "       move            #100, %a1                               \n\t"\r
444                                                 "       move            #110, %a2                               \n\t"\r
445                                                 "       move            #120, %a3                               \n\t"\r
446                                                 "       move            #130, %a4                               \n\t"\r
447                                                 "       move            #140, %a5                               \n\t"\r
448                                                 "       move            #150, %a6                               \n\t"\r
449                                                 "                                                                               \n\t"\r
450                                                 "       cmpi.l          #10, %d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       cmpi.l          #20, %d1                                \n\t"\r
453                                                 "       bne                     reg_test_2_error                \n\t"\r
454                                                 "       cmpi.l          #30, %d2                                \n\t"\r
455                                                 "       bne                     reg_test_2_error                \n\t"\r
456                                                 "       cmpi.l          #40, %d3                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       cmpi.l          #50, %d4                                \n\t"\r
459                                                 "       bne                     reg_test_2_error                \n\t"\r
460                                                 "       cmpi.l          #60, %d5                                \n\t"\r
461                                                 "       bne                     reg_test_2_error                \n\t"\r
462                                                 "       cmpi.l          #70, %d6                                \n\t"\r
463                                                 "       bne                     reg_test_2_error                \n\t"\r
464                                                 "       cmpi.l          #80, %d7                                \n\t"\r
465                                                 "       bne                     reg_test_2_error                \n\t"\r
466                                                 "       move            %a0, %d0                                \n\t"\r
467                                                 "       cmpi.l          #90, %d0                                \n\t"\r
468                                                 "       bne                     reg_test_2_error                \n\t"\r
469                                                 "       move            %a1, %d0                                \n\t"\r
470                                                 "       cmpi.l          #100, %d0                               \n\t"\r
471                                                 "       bne                     reg_test_2_error                \n\t"\r
472                                                 "       move            %a2, %d0                                \n\t"\r
473                                                 "       cmpi.l          #110, %d0                               \n\t"\r
474                                                 "       bne                     reg_test_2_error                \n\t"\r
475                                                 "       move            %a3, %d0                                \n\t"\r
476                                                 "       cmpi.l          #120, %d0                               \n\t"\r
477                                                 "       bne                     reg_test_2_error                \n\t"\r
478                                                 "       move            %a4, %d0                                \n\t"\r
479                                                 "       cmpi.l          #130, %d0                               \n\t"\r
480                                                 "       bne                     reg_test_2_error                \n\t"\r
481                                                 "       move            %a5, %d0                                \n\t"\r
482                                                 "       cmpi.l          #140, %d0                               \n\t"\r
483                                                 "       bne                     reg_test_2_error                \n\t"\r
484                                                 "       move            %a6, %d0                                \n\t"\r
485                                                 "       cmpi.l          #150, %d0                               \n\t"\r
486                                                 "       bne                     reg_test_2_error                \n\t"\r
487                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
488                                                 "       addql           #1, %d0                                 \n\t"\r
489                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
490                                                 "       bra                     reg_test_2_start                \n\t"\r
491                                                 "reg_test_2_error:                                              \n\t"\r
492                                                 "       bra                     reg_test_2_error                \n\t"\r
493                                         );\r
494 }\r
495 /*-----------------------------------------------------------*/\r
496 \r