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[freertos] / FreeRTOS / Demo / ColdFire_MCF52233_Eclipse / RTOSDemo / main.c
1 /*\r
2     FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3         \r
4 \r
5     ***************************************************************************\r
6      *                                                                       *\r
7      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
8      *    Complete, revised, and edited pdf reference manuals are also       *\r
9      *    available.                                                         *\r
10      *                                                                       *\r
11      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
12      *    ensuring you get running as quickly as possible and with an        *\r
13      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
14      *    the FreeRTOS project to continue with its mission of providing     *\r
15      *    professional grade, cross platform, de facto standard solutions    *\r
16      *    for microcontrollers - completely free of charge!                  *\r
17      *                                                                       *\r
18      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
19      *                                                                       *\r
20      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
21      *                                                                       *\r
22     ***************************************************************************\r
23 \r
24 \r
25     This file is part of the FreeRTOS distribution.\r
26 \r
27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
28     the terms of the GNU General Public License (version 2) as published by the\r
29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
30     >>>NOTE<<< The modification to the GPL is included to allow you to\r
31     distribute a combined work that includes FreeRTOS without being obliged to\r
32     provide the source code for proprietary components outside of the FreeRTOS\r
33     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
34     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
35     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
36     more details. You should have received a copy of the GNU General Public\r
37     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
38     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
39     by writing to Richard Barry, contact details for whom are available on the\r
40     FreeRTOS WEB site.\r
41 \r
42     1 tab == 4 spaces!\r
43     \r
44     ***************************************************************************\r
45      *                                                                       *\r
46      *    Having a problem?  Start by reading the FAQ "My application does   *\r
47      *    not run, what could be wrong?                                      *\r
48      *                                                                       *\r
49      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
50      *                                                                       *\r
51     ***************************************************************************\r
52 \r
53     \r
54     http://www.FreeRTOS.org - Documentation, training, latest information, \r
55     license and contact details.\r
56     \r
57     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
58     including FreeRTOS+Trace - an indispensable productivity tool.\r
59 \r
60     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
61     the code with commercial support, indemnification, and middleware, under \r
62     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
63     provide a safety engineered and independently SIL3 certified version under \r
64     the SafeRTOS brand: http://www.SafeRTOS.com.\r
65 */\r
66 \r
67 \r
68 /*\r
69  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
70  * documentation provides more details of the standard demo application tasks.\r
71  * In addition to the standard demo tasks, the following tasks and tests are\r
72  * defined and/or created within this file:\r
73  *\r
74  * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP\r
75  * processing is performed in this task.  It manages the WEB server functionality.\r
76  *\r
77  * "Check" task -  This only executes every five seconds but has a high priority\r
78  * to ensure it gets processor time.  Its main function is to check that all the\r
79  * standard demo tasks are still operational.  An error found in any task will be\r
80  * latched in the ulErrorCode variable for display through the WEB server (the\r
81  * error code is displayed at the foot of the table that contains information on\r
82  * the state of each task).\r
83  *\r
84  * "Reg test" tasks - These fill the registers with known values, then check\r
85  * that each register still contains its expected value.  Each task uses\r
86  * different values.  The tasks run with very low priority so get preempted very\r
87  * frequently.  A register containing an unexpected value is indicative of an\r
88  * error in the context switching mechanism.\r
89  *\r
90  */\r
91 \r
92 /* Standard includes. */\r
93 #include <stdio.h>\r
94 \r
95 /* Scheduler includes. */\r
96 #include "FreeRTOS.h"\r
97 #include "task.h"\r
98 #include "queue.h"\r
99 #include "semphr.h"\r
100 \r
101 /* Demo app includes. */\r
102 #include "BlockQ.h"\r
103 #include "death.h"\r
104 #include "blocktim.h"\r
105 #include "flash.h"\r
106 #include "partest.h"\r
107 #include "semtest.h"\r
108 #include "PollQ.h"\r
109 #include "GenQTest.h"\r
110 #include "QPeek.h"\r
111 #include "recmutex.h"\r
112 #include "IntQueue.h"\r
113 #include "comtest2.h"\r
114 \r
115 /*-----------------------------------------------------------*/\r
116 \r
117 /* The time between cycles of the 'check' functionality - as described at the\r
118 top of this file. */\r
119 #define mainCHECK_TASK_PERIOD                                   ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
120 \r
121 /* Task priorities. */\r
122 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
123 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
124 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
125 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
126 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
127 \r
128 /* The WEB server task uses more stack than most other tasks because of its\r
129 reliance on using sprintf(). */\r
130 #define mainBASIC_WEB_STACK_SIZE                        ( configMINIMAL_STACK_SIZE * 2 )\r
131 \r
132 /*\r
133  * Configure the hardware for the demo.\r
134  */\r
135 static void prvSetupHardware( void );\r
136 \r
137 /*\r
138  * Implements the 'check' task functionality as described at the top of this\r
139  * file.\r
140  */\r
141 static void prvCheckTask( void *pvParameters );\r
142 \r
143 /*\r
144  * The task that implements the WEB server.\r
145  */\r
146 extern void vuIP_Task( void *pvParameters );\r
147 \r
148 /*\r
149  * Implement the 'Reg test' functionality as described at the top of this file.\r
150  */\r
151 static void vRegTest1Task( void *pvParameters );\r
152 static void vRegTest2Task( void *pvParameters );\r
153 \r
154 /*-----------------------------------------------------------*/\r
155 \r
156 /* Counters used to detect errors within the reg test tasks. */\r
157 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
158 \r
159 /* Any errors that the check task finds in any tasks are latched into \r
160 ulErrorCode, and then displayed via the WEB server. */\r
161 static unsigned portLONG ulErrorCode = 0UL;\r
162 \r
163 /*-----------------------------------------------------------*/\r
164 \r
165 int main( void )\r
166 {\r
167         /* Setup the hardware ready for this demo. */\r
168         prvSetupHardware();\r
169 \r
170         /* Create the WEB server task. */\r
171         xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );\r
172 \r
173         /* Start the standard demo tasks. */\r
174         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
175         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
176     vCreateBlockTimeTasks();\r
177         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
178         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
179         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
180         vStartQueuePeekTasks();\r
181     vStartRecursiveMutexTasks();\r
182 \r
183         /* Start the reg test tasks - defined in this file. */\r
184         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
185         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
186 \r
187         /* Create the check task. */\r
188         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
189 \r
190         /* Start the scheduler. */\r
191         vTaskStartScheduler();\r
192 \r
193     /* Will only get here if there was insufficient heap to create the idle\r
194     task. */\r
195         for( ;; );\r
196 }\r
197 /*-----------------------------------------------------------*/\r
198 \r
199 static void prvCheckTask( void *pvParameters )\r
200 {\r
201 unsigned ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
202 portTickType xLastExecutionTime;\r
203 \r
204         /* To prevent compiler warnings. */\r
205         ( void ) pvParameters;\r
206 \r
207         /* Initialise the variable used to control our iteration rate prior to\r
208         its first use. */\r
209         xLastExecutionTime = xTaskGetTickCount();\r
210 \r
211         for( ;; )\r
212         {\r
213                 /* Wait until it is time to run the tests again. */\r
214                 vTaskDelayUntil( &xLastExecutionTime, mainCHECK_TASK_PERIOD );\r
215 \r
216                 /* Has an error been found in any task? */\r
217                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
218                 {\r
219                         ulErrorCode |= 0x01UL;\r
220                 }\r
221 \r
222                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
223                 {\r
224                         ulErrorCode |= 0x02UL;\r
225                 }\r
226 \r
227                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
228                 {\r
229                         ulErrorCode |= 0x04UL;\r
230                 }\r
231 \r
232                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
233             {\r
234                 ulErrorCode |= 0x20UL;\r
235             }\r
236 \r
237                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
238             {\r
239                 ulErrorCode |= 0x40UL;\r
240             }\r
241 \r
242                 if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
243                 {\r
244                         ulErrorCode |= 0x80UL;\r
245                 }\r
246 \r
247             if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
248             {\r
249                 ulErrorCode |= 0x100UL;\r
250             }\r
251 \r
252                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
253                 {\r
254                         ulErrorCode |= 0x200UL;\r
255                 }\r
256 \r
257                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
258                 {\r
259                         ulErrorCode |= 0x200UL;\r
260                 }\r
261 \r
262                 /* Remember the reg test counts so a stall in their values can be\r
263                 detected next time around. */\r
264                 ulLastRegTest1Count = ulRegTest1Counter;\r
265                 ulLastRegTest2Count = ulRegTest2Counter;\r
266         }\r
267 }\r
268 /*-----------------------------------------------------------*/\r
269 \r
270 unsigned portLONG ulGetErrorCode( void )\r
271 {\r
272         /* Returns the error code for display via the WEB server. */\r
273         return ulErrorCode;\r
274 }\r
275 /*-----------------------------------------------------------*/\r
276 \r
277 void prvSetupHardware( void )\r
278 {\r
279 __attribute__ ((section(".cfmconfig")))\r
280 static const unsigned long _cfm[6] = {\r
281         0, /* KEY_UPPER 0x00000400 */\r
282         0, /* KEY_LOWER 0x00000404 */\r
283         0, /* CFMPROT 0x00000408 */\r
284         0, /* CFMSACC 0x0000040C */\r
285         0, /* CFMDACC 0x00000410 */\r
286         0, /* CFMSEC 0x00000414 */\r
287 };\r
288 \r
289         /* Just to stop compiler warnings. */\r
290         ( void ) _cfm;\r
291 \r
292         /* Ensure the watchdog is disabled. */\r
293         MCF_SCM_CWCR = 0;\r
294 \r
295     /* Initialize IPSBAR (0x40000000). */\r
296         asm volatile(\r
297                 "move.l  #0x40000000,%d0        \n"\r
298                 "andi.l  #0xC0000000,%d0        \n"\r
299                 "add.l   #0x1,%d0                       \n"\r
300                 "move.l  %d0,0x40000000         "\r
301         );\r
302 \r
303     /* Initialize FLASHBAR (0x00) */\r
304         asm volatile(\r
305                 "move.l  #0x00,%d0                      \n"\r
306                 "andi.l  #0xFFF80000,%d0        \n"\r
307                 "add.l   #0x41,%d0                      \n"\r
308                 "movec   %d0,%FLASHBAR          "\r
309         );\r
310 \r
311         portDISABLE_INTERRUPTS();\r
312 \r
313         /* RAMBAR. */\r
314         MCF_SCM_RAMBAR = MCF_SCM_RAMBAR_BA( RAMBAR_ADDRESS ) | MCF_SCM_RAMBAR_BDE;\r
315 \r
316         /* Multiply 25MHz crystal by 12 to get 60MHz clock. */\r
317         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(4) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;\r
318         while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))\r
319         {\r
320         }\r
321 \r
322         /* Setup the port used to toggle LEDs. */\r
323         vParTestInitialise();\r
324 }\r
325 /*-----------------------------------------------------------*/\r
326 \r
327 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
328 {\r
329         /* This will get called if a stack overflow is detected during the context\r
330         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
331         problems within nested interrupts, but only do this for debug purposes as\r
332         it will increase the context switch time. */\r
333 \r
334         ( void ) pxTask;\r
335         ( void ) pcTaskName;\r
336 \r
337         for( ;; );\r
338 }\r
339 /*-----------------------------------------------------------*/\r
340 \r
341 static void vRegTest1Task( void *pvParameters )\r
342 {\r
343         /* Sanity check - did we receive the parameter expected? */\r
344         if( pvParameters != &ulRegTest1Counter )\r
345         {\r
346                 /* Change here so the check task can detect that an error occurred. */\r
347                 for( ;; );\r
348         }\r
349 \r
350         /* Set all the registers to known values, then check that each retains its\r
351         expected value - as described at the top of this file.  If an error is\r
352         found then the loop counter will no longer be incremented allowing the check\r
353         task to recognise the error. */\r
354         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
355                                                 "       moveq           #1, %d0                                 \n\t"\r
356                                                 "       moveq           #2, %d1                                 \n\t"\r
357                                                 "       moveq           #3, %d2                                 \n\t"\r
358                                                 "       moveq           #4, %d3                                 \n\t"\r
359                                                 "       moveq           #5, %d4                                 \n\t"\r
360                                                 "       moveq           #6, %d5                                 \n\t"\r
361                                                 "       moveq           #7, %d6                                 \n\t"\r
362                                                 "       moveq           #8, %d7                                 \n\t"\r
363                                                 "       move            #9, %a0                                 \n\t"\r
364                                                 "       move            #10, %a1                                \n\t"\r
365                                                 "       move            #11, %a2                                \n\t"\r
366                                                 "       move            #12, %a3                                \n\t"\r
367                                                 "       move            #13, %a4                                \n\t"\r
368                                                 "       move            #14, %a5                                \n\t"\r
369                                                 "       move            #15, %a6                                \n\t"\r
370                                                 "                                                                               \n\t"\r
371                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
374                                                 "       bne                     reg_test_1_error                \n\t"\r
375                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
376                                                 "       bne                     reg_test_1_error                \n\t"\r
377                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
380                                                 "       bne                     reg_test_1_error                \n\t"\r
381                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
382                                                 "       bne                     reg_test_1_error                \n\t"\r
383                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
384                                                 "       bne                     reg_test_1_error                \n\t"\r
385                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
386                                                 "       bne                     reg_test_1_error                \n\t"\r
387                                                 "       move            %a0, %d0                                \n\t"\r
388                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
389                                                 "       bne                     reg_test_1_error                \n\t"\r
390                                                 "       move            %a1, %d0                                \n\t"\r
391                                                 "       cmpi.l          #10, %d0                                \n\t"\r
392                                                 "       bne                     reg_test_1_error                \n\t"\r
393                                                 "       move            %a2, %d0                                \n\t"\r
394                                                 "       cmpi.l          #11, %d0                                \n\t"\r
395                                                 "       bne                     reg_test_1_error                \n\t"\r
396                                                 "       move            %a3, %d0                                \n\t"\r
397                                                 "       cmpi.l          #12, %d0                                \n\t"\r
398                                                 "       bne                     reg_test_1_error                \n\t"\r
399                                                 "       move            %a4, %d0                                \n\t"\r
400                                                 "       cmpi.l          #13, %d0                                \n\t"\r
401                                                 "       bne                     reg_test_1_error                \n\t"\r
402                                                 "       move            %a5, %d0                                \n\t"\r
403                                                 "       cmpi.l          #14, %d0                                \n\t"\r
404                                                 "       bne                     reg_test_1_error                \n\t"\r
405                                                 "       move            %a6, %d0                                \n\t"\r
406                                                 "       cmpi.l          #15, %d0                                \n\t"\r
407                                                 "       bne                     reg_test_1_error                \n\t"\r
408                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
409                                                 "       addql           #1, %d0                                 \n\t"\r
410                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
411                                                 "       bra                     reg_test_1_start                \n\t"\r
412                                                 "reg_test_1_error:                                              \n\t"\r
413                                                 "       bra                     reg_test_1_error                \n\t"\r
414                                         );\r
415 }\r
416 /*-----------------------------------------------------------*/\r
417 \r
418 static void vRegTest2Task( void *pvParameters )\r
419 {\r
420         /* Sanity check - did we receive the parameter expected? */\r
421         if( pvParameters != &ulRegTest2Counter )\r
422         {\r
423                 /* Change here so the check task can detect that an error occurred. */\r
424                 for( ;; );\r
425         }\r
426 \r
427         /* Set all the registers to known values, then check that each retains its\r
428         expected value - as described at the top of this file.  If an error is\r
429         found then the loop counter will no longer be incremented allowing the check\r
430         task to recognise the error. */\r
431         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
432                                                 "       moveq           #10, %d0                                \n\t"\r
433                                                 "       moveq           #20, %d1                                \n\t"\r
434                                                 "       moveq           #30, %d2                                \n\t"\r
435                                                 "       moveq           #40, %d3                                \n\t"\r
436                                                 "       moveq           #50, %d4                                \n\t"\r
437                                                 "       moveq           #60, %d5                                \n\t"\r
438                                                 "       moveq           #70, %d6                                \n\t"\r
439                                                 "       moveq           #80, %d7                                \n\t"\r
440                                                 "       move            #90, %a0                                \n\t"\r
441                                                 "       move            #100, %a1                               \n\t"\r
442                                                 "       move            #110, %a2                               \n\t"\r
443                                                 "       move            #120, %a3                               \n\t"\r
444                                                 "       move            #130, %a4                               \n\t"\r
445                                                 "       move            #140, %a5                               \n\t"\r
446                                                 "       move            #150, %a6                               \n\t"\r
447                                                 "                                                                               \n\t"\r
448                                                 "       cmpi.l          #10, %d0                                \n\t"\r
449                                                 "       bne                     reg_test_2_error                \n\t"\r
450                                                 "       cmpi.l          #20, %d1                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       cmpi.l          #30, %d2                                \n\t"\r
453                                                 "       bne                     reg_test_2_error                \n\t"\r
454                                                 "       cmpi.l          #40, %d3                                \n\t"\r
455                                                 "       bne                     reg_test_2_error                \n\t"\r
456                                                 "       cmpi.l          #50, %d4                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       cmpi.l          #60, %d5                                \n\t"\r
459                                                 "       bne                     reg_test_2_error                \n\t"\r
460                                                 "       cmpi.l          #70, %d6                                \n\t"\r
461                                                 "       bne                     reg_test_2_error                \n\t"\r
462                                                 "       cmpi.l          #80, %d7                                \n\t"\r
463                                                 "       bne                     reg_test_2_error                \n\t"\r
464                                                 "       move            %a0, %d0                                \n\t"\r
465                                                 "       cmpi.l          #90, %d0                                \n\t"\r
466                                                 "       bne                     reg_test_2_error                \n\t"\r
467                                                 "       move            %a1, %d0                                \n\t"\r
468                                                 "       cmpi.l          #100, %d0                               \n\t"\r
469                                                 "       bne                     reg_test_2_error                \n\t"\r
470                                                 "       move            %a2, %d0                                \n\t"\r
471                                                 "       cmpi.l          #110, %d0                               \n\t"\r
472                                                 "       bne                     reg_test_2_error                \n\t"\r
473                                                 "       move            %a3, %d0                                \n\t"\r
474                                                 "       cmpi.l          #120, %d0                               \n\t"\r
475                                                 "       bne                     reg_test_2_error                \n\t"\r
476                                                 "       move            %a4, %d0                                \n\t"\r
477                                                 "       cmpi.l          #130, %d0                               \n\t"\r
478                                                 "       bne                     reg_test_2_error                \n\t"\r
479                                                 "       move            %a5, %d0                                \n\t"\r
480                                                 "       cmpi.l          #140, %d0                               \n\t"\r
481                                                 "       bne                     reg_test_2_error                \n\t"\r
482                                                 "       move            %a6, %d0                                \n\t"\r
483                                                 "       cmpi.l          #150, %d0                               \n\t"\r
484                                                 "       bne                     reg_test_2_error                \n\t"\r
485                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
486                                                 "       addql           #1, %d0                                 \n\t"\r
487                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
488                                                 "       bra                     reg_test_2_start                \n\t"\r
489                                                 "reg_test_2_error:                                              \n\t"\r
490                                                 "       bra                     reg_test_2_error                \n\t"\r
491                                         );\r
492 }\r
493 /*-----------------------------------------------------------*/\r
494 \r