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[freertos] / FreeRTOS / Demo / ColdFire_MCF52259_CodeWarrior / main.c
1 /*\r
2  * FreeRTOS Kernel V10.2.1\r
3  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software.\r
14  *\r
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
21  *\r
22  * http://www.FreeRTOS.org\r
23  * http://aws.amazon.com/freertos\r
24  *\r
25  * 1 tab == 4 spaces!\r
26  */\r
27 \r
28 \r
29 /*\r
30  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
31  * documentation provides more details of the standard demo application tasks.\r
32  * In addition to the standard demo tasks, the following tasks and tests are\r
33  * defined and/or created within this file:\r
34  *\r
35  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
36  * simply generates a page that shows the current state of all the tasks within\r
37  * the system, including the high water mark of each task stack. The high water\r
38  * mark is displayed as the amount of stack that has never been used, so the\r
39  * closer the value is to zero the closer the task has come to overflowing its\r
40  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
41  *\r
42  * "Check" task -  This only executes every five seconds but has a high priority\r
43  * to ensure it gets processor time.  Its main function is to check that all the\r
44  * standard demo tasks are still operational.  While no errors have been\r
45  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
46  * rate increasing to 500ms being a visual indication that at least one task has\r
47  * reported unexpected behaviour.\r
48  *\r
49  * "Reg test" tasks - These fill the registers with known values, then check\r
50  * that each register still contains its expected value.  Each task uses\r
51  * different values.  The tasks run with very low priority so get preempted very\r
52  * frequently.  A register containing an unexpected value is indicative of an\r
53  * error in the context switching mechanism.\r
54  *\r
55  */\r
56 \r
57 /* Standard includes. */\r
58 #include <stdio.h>\r
59 \r
60 /* Scheduler includes. */\r
61 #include "FreeRTOS.h"\r
62 #include "task.h"\r
63 #include "queue.h"\r
64 #include "semphr.h"\r
65 \r
66 /* Demo app includes. */\r
67 #include "BlockQ.h"\r
68 #include "death.h"\r
69 #include "flash.h"\r
70 #include "partest.h"\r
71 #include "semtest.h"\r
72 #include "PollQ.h"\r
73 #include "GenQTest.h"\r
74 #include "QPeek.h"\r
75 #include "recmutex.h"\r
76 \r
77 /*-----------------------------------------------------------*/\r
78 \r
79 /* The time between cycles of the 'check' functionality - as described at the\r
80 top of this file. */\r
81 #define mainNO_ERROR_PERIOD                                     ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
82 \r
83 /* The rate at which the LED controlled by the 'check' task will flash should an\r
84 error have been detected. */\r
85 #define mainERROR_PERIOD                                        ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
86 \r
87 /* The LED controlled by the 'check' task. */\r
88 #define mainCHECK_LED                                           ( 3 )\r
89 \r
90 /* ComTest constants - there is no free LED for the comtest tasks. */\r
91 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
92 #define mainCOM_TEST_LED                                        ( 5 )\r
93 \r
94 /* Task priorities. */\r
95 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
96 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
97 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
98 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
99 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
100 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
101 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
102 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
103 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
104 \r
105 /*\r
106  * Configure the hardware for the demo.\r
107  */\r
108 static void prvSetupHardware( void );\r
109 \r
110 /*\r
111  * Implements the 'check' task functionality as described at the top of this\r
112  * file.\r
113  */\r
114 static void prvCheckTask( void *pvParameters );\r
115 \r
116 /*\r
117  * Implement the 'Reg test' functionality as described at the top of this file.\r
118  */\r
119 static void vRegTest1Task( void *pvParameters );\r
120 static void vRegTest2Task( void *pvParameters );\r
121 \r
122 /*-----------------------------------------------------------*/\r
123 \r
124 /* Counters used to detect errors within the reg test tasks. */\r
125 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
126 \r
127 /*-----------------------------------------------------------*/\r
128 \r
129 int main( void )\r
130 {\r
131 extern void vBasicWEBServer( void *pv );\r
132 \r
133         /* Setup the hardware ready for this demo. */\r
134         prvSetupHardware();\r
135         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
136 \r
137         /* Start the standard demo tasks. */\r
138         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
139         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
140         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
141         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
142         vStartQueuePeekTasks();\r
143         vStartRecursiveMutexTasks();\r
144         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
145 \r
146         /* Start the reg test tasks - defined in this file. */\r
147         xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
148         xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
149 \r
150         /* Create the check task. */\r
151         xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
152 \r
153         /* The suicide tasks must be created last as they need to know how many\r
154         tasks were running prior to their creation in order to ascertain whether\r
155         or not the correct/expected number of tasks are running at any given time. */\r
156     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
157 \r
158         /* Start the scheduler. */\r
159         vTaskStartScheduler();\r
160 \r
161     /* Will only get here if there was insufficient memory to create the idle\r
162     task. */\r
163         for( ;; )\r
164         {\r
165         }\r
166 }\r
167 /*-----------------------------------------------------------*/\r
168 \r
169 static void prvCheckTask( void *pvParameters )\r
170 {\r
171 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
172 TickType_t xLastExecutionTime;\r
173 \r
174         ( void ) pvParameters;\r
175 \r
176         /* Initialise the variable used to control our iteration rate prior to\r
177         its first use. */\r
178         xLastExecutionTime = xTaskGetTickCount();\r
179 \r
180         for( ;; )\r
181         {\r
182                 /* Wait until it is time to run the tests again. */\r
183                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
184 \r
185                 /* Has an error been found in any task? */\r
186                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
187                 {\r
188                         ulError |= 0x01UL;\r
189                 }\r
190 \r
191                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
192                 {\r
193                         ulError |= 0x02UL;\r
194                 }\r
195 \r
196                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
197                 {\r
198                         ulError |= 0x04UL;\r
199                 }\r
200 \r
201                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
202             {\r
203                 ulError |= 0x20UL;\r
204             }\r
205 \r
206                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
207             {\r
208                 ulError |= 0x40UL;\r
209             }\r
210 \r
211                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
212             {\r
213                 ulError |= 0x80UL;\r
214             }\r
215 \r
216                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
217             {\r
218                 ulError |= 0x200UL;\r
219             }\r
220 \r
221                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
222                 {\r
223                         ulError |= 0x1000UL;\r
224                 }\r
225 \r
226                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
227                 {\r
228                         ulError |= 0x1000UL;\r
229                 }\r
230 \r
231                 ulLastRegTest1Count = ulRegTest1Counter;\r
232                 ulLastRegTest2Count = ulRegTest2Counter;\r
233 \r
234                 /* If an error has been found then increase our cycle rate, and in so\r
235                 going increase the rate at which the check task LED toggles. */\r
236                 if( ulError != 0 )\r
237                 {\r
238                 ulTicksToWait = mainERROR_PERIOD;\r
239                 }\r
240 \r
241                 /* Toggle the LED each iteration. */\r
242                 vParTestToggleLED( mainCHECK_LED );\r
243         }\r
244 }\r
245 /*-----------------------------------------------------------*/\r
246 \r
247 void prvSetupHardware( void )\r
248 {\r
249         portDISABLE_INTERRUPTS();\r
250 \r
251         /* Setup the port used to toggle LEDs. */\r
252         vParTestInitialise();\r
253 }\r
254 /*-----------------------------------------------------------*/\r
255 \r
256 void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
257 {\r
258         /* This will get called if a stack overflow is detected during the context\r
259         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
260         problems within nested interrupts, but only do this for debug purposes as\r
261         it will increase the context switch time. */\r
262 \r
263         ( void ) pxTask;\r
264         ( void ) pcTaskName;\r
265 \r
266         for( ;; )\r
267         {\r
268         }\r
269 }\r
270 /*-----------------------------------------------------------*/\r
271 \r
272 static void vRegTest1Task( void *pvParameters )\r
273 {\r
274         /* Sanity check - did we receive the parameter expected? */\r
275         if( pvParameters != &ulRegTest1Counter )\r
276         {\r
277                 /* Change here so the check task can detect that an error occurred. */\r
278                 for( ;; )\r
279                 {\r
280                 }\r
281         }\r
282 \r
283         /* Set all the registers to known values, then check that each retains its\r
284         expected value - as described at the top of this file.  If an error is\r
285         found then the loop counter will no longer be incremented allowing the check\r
286         task to recognise the error. */\r
287         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
288                                                 "       moveq           #1, d0                                  \n\t"\r
289                                                 "       moveq           #2, d1                                  \n\t"\r
290                                                 "       moveq           #3, d2                                  \n\t"\r
291                                                 "       moveq           #4, d3                                  \n\t"\r
292                                                 "       moveq           #5, d4                                  \n\t"\r
293                                                 "       moveq           #6, d5                                  \n\t"\r
294                                                 "       moveq           #7, d6                                  \n\t"\r
295                                                 "       moveq           #8, d7                                  \n\t"\r
296                                                 "       move            #9, a0                                  \n\t"\r
297                                                 "       move            #10, a1                                 \n\t"\r
298                                                 "       move            #11, a2                                 \n\t"\r
299                                                 "       move            #12, a3                                 \n\t"\r
300                                                 "       move            #13, a4                                 \n\t"\r
301                                                 "       move            #14, a5                                 \n\t"\r
302                                                 "       move            #15, a6                                 \n\t"\r
303                                                 "                                                                               \n\t"\r
304                                                 "       cmpi.l          #1, d0                                  \n\t"\r
305                                                 "       bne                     reg_test_1_error                \n\t"\r
306                                                 "       cmpi.l          #2, d1                                  \n\t"\r
307                                                 "       bne                     reg_test_1_error                \n\t"\r
308                                                 "       cmpi.l          #3, d2                                  \n\t"\r
309                                                 "       bne                     reg_test_1_error                \n\t"\r
310                                                 "       cmpi.l          #4, d3                                  \n\t"\r
311                                                 "       bne                     reg_test_1_error                \n\t"\r
312                                                 "       cmpi.l          #5, d4                                  \n\t"\r
313                                                 "       bne                     reg_test_1_error                \n\t"\r
314                                                 "       cmpi.l          #6, d5                                  \n\t"\r
315                                                 "       bne                     reg_test_1_error                \n\t"\r
316                                                 "       cmpi.l          #7, d6                                  \n\t"\r
317                                                 "       bne                     reg_test_1_error                \n\t"\r
318                                                 "       cmpi.l          #8, d7                                  \n\t"\r
319                                                 "       bne                     reg_test_1_error                \n\t"\r
320                                                 "       move            a0, d0                                  \n\t"\r
321                                                 "       cmpi.l          #9, d0                                  \n\t"\r
322                                                 "       bne                     reg_test_1_error                \n\t"\r
323                                                 "       move            a1, d0                                  \n\t"\r
324                                                 "       cmpi.l          #10, d0                                 \n\t"\r
325                                                 "       bne                     reg_test_1_error                \n\t"\r
326                                                 "       move            a2, d0                                  \n\t"\r
327                                                 "       cmpi.l          #11, d0                                 \n\t"\r
328                                                 "       bne                     reg_test_1_error                \n\t"\r
329                                                 "       move            a3, d0                                  \n\t"\r
330                                                 "       cmpi.l          #12, d0                                 \n\t"\r
331                                                 "       bne                     reg_test_1_error                \n\t"\r
332                                                 "       move            a4, d0                                  \n\t"\r
333                                                 "       cmpi.l          #13, d0                                 \n\t"\r
334                                                 "       bne                     reg_test_1_error                \n\t"\r
335                                                 "       move            a5, d0                                  \n\t"\r
336                                                 "       cmpi.l          #14, d0                                 \n\t"\r
337                                                 "       bne                     reg_test_1_error                \n\t"\r
338                                                 "       move            a6, d0                                  \n\t"\r
339                                                 "       cmpi.l          #15, d0                                 \n\t"\r
340                                                 "       bne                     reg_test_1_error                \n\t"\r
341                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
342                                                 "       addq            #1, d0                                  \n\t"\r
343                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
344                                                 "       bra                     reg_test_1_start                \n\t"\r
345                                                 "reg_test_1_error:                                              \n\t"\r
346                                                 "       bra                     reg_test_1_error                \n\t"\r
347                                         );\r
348 }\r
349 /*-----------------------------------------------------------*/\r
350 \r
351 static void vRegTest2Task( void *pvParameters )\r
352 {\r
353         /* Sanity check - did we receive the parameter expected? */\r
354         if( pvParameters != &ulRegTest2Counter )\r
355         {\r
356                 /* Change here so the check task can detect that an error occurred. */\r
357                 for( ;; )\r
358                 {\r
359                 }\r
360         }\r
361 \r
362         /* Set all the registers to known values, then check that each retains its\r
363         expected value - as described at the top of this file.  If an error is\r
364         found then the loop counter will no longer be incremented allowing the check\r
365         task to recognise the error. */\r
366         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
367                                                 "       moveq           #10, d0                                 \n\t"\r
368                                                 "       moveq           #20, d1                                 \n\t"\r
369                                                 "       moveq           #30, d2                                 \n\t"\r
370                                                 "       moveq           #40, d3                                 \n\t"\r
371                                                 "       moveq           #50, d4                                 \n\t"\r
372                                                 "       moveq           #60, d5                                 \n\t"\r
373                                                 "       moveq           #70, d6                                 \n\t"\r
374                                                 "       moveq           #80, d7                                 \n\t"\r
375                                                 "       move            #90, a0                                 \n\t"\r
376                                                 "       move            #100, a1                                \n\t"\r
377                                                 "       move            #110, a2                                \n\t"\r
378                                                 "       move            #120, a3                                \n\t"\r
379                                                 "       move            #130, a4                                \n\t"\r
380                                                 "       move            #140, a5                                \n\t"\r
381                                                 "       move            #150, a6                                \n\t"\r
382                                                 "                                                                               \n\t"\r
383                                                 "       cmpi.l          #10, d0                                 \n\t"\r
384                                                 "       bne                     reg_test_2_error                \n\t"\r
385                                                 "       cmpi.l          #20, d1                                 \n\t"\r
386                                                 "       bne                     reg_test_2_error                \n\t"\r
387                                                 "       cmpi.l          #30, d2                                 \n\t"\r
388                                                 "       bne                     reg_test_2_error                \n\t"\r
389                                                 "       cmpi.l          #40, d3                                 \n\t"\r
390                                                 "       bne                     reg_test_2_error                \n\t"\r
391                                                 "       cmpi.l          #50, d4                                 \n\t"\r
392                                                 "       bne                     reg_test_2_error                \n\t"\r
393                                                 "       cmpi.l          #60, d5                                 \n\t"\r
394                                                 "       bne                     reg_test_2_error                \n\t"\r
395                                                 "       cmpi.l          #70, d6                                 \n\t"\r
396                                                 "       bne                     reg_test_2_error                \n\t"\r
397                                                 "       cmpi.l          #80, d7                                 \n\t"\r
398                                                 "       bne                     reg_test_2_error                \n\t"\r
399                                                 "       move            a0, d0                                  \n\t"\r
400                                                 "       cmpi.l          #90, d0                                 \n\t"\r
401                                                 "       bne                     reg_test_2_error                \n\t"\r
402                                                 "       move            a1, d0                                  \n\t"\r
403                                                 "       cmpi.l          #100, d0                                \n\t"\r
404                                                 "       bne                     reg_test_2_error                \n\t"\r
405                                                 "       move            a2, d0                                  \n\t"\r
406                                                 "       cmpi.l          #110, d0                                \n\t"\r
407                                                 "       bne                     reg_test_2_error                \n\t"\r
408                                                 "       move            a3, d0                                  \n\t"\r
409                                                 "       cmpi.l          #120, d0                                \n\t"\r
410                                                 "       bne                     reg_test_2_error                \n\t"\r
411                                                 "       move            a4, d0                                  \n\t"\r
412                                                 "       cmpi.l          #130, d0                                \n\t"\r
413                                                 "       bne                     reg_test_2_error                \n\t"\r
414                                                 "       move            a5, d0                                  \n\t"\r
415                                                 "       cmpi.l          #140, d0                                \n\t"\r
416                                                 "       bne                     reg_test_2_error                \n\t"\r
417                                                 "       move            a6, d0                                  \n\t"\r
418                                                 "       cmpi.l          #150, d0                                \n\t"\r
419                                                 "       bne                     reg_test_2_error                \n\t"\r
420                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
421                                                 "       addq            #1, d0                                  \n\t"\r
422                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
423                                                 "       bra                     reg_test_2_start                \n\t"\r
424                                                 "reg_test_2_error:                                              \n\t"\r
425                                                 "       bra                     reg_test_2_error                \n\t"\r
426                                         );\r
427 }\r
428 /*-----------------------------------------------------------*/\r
429 \r
430 \r
431 \r