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1 /*\r
2  * FreeRTOS Kernel V10.0.0\r
3  * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software. If you wish to use our Amazon\r
14  * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
15  *\r
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
18  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
19  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
20  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
22  *\r
23  * http://www.FreeRTOS.org\r
24  * http://aws.amazon.com/freertos\r
25  *\r
26  * 1 tab == 4 spaces!\r
27  */\r
28 \r
29 \r
30 /*\r
31  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
32  * documentation provides more details of the standard demo application tasks.\r
33  * In addition to the standard demo tasks, the following tasks and tests are\r
34  * defined and/or created within this file:\r
35  *\r
36  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
37  * simply generates a page that shows the current state of all the tasks within\r
38  * the system, including the high water mark of each task stack. The high water\r
39  * mark is displayed as the amount of stack that has never been used, so the\r
40  * closer the value is to zero the closer the task has come to overflowing its\r
41  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
42  *\r
43  * "Check" task -  This only executes every five seconds but has a high priority\r
44  * to ensure it gets processor time.  Its main function is to check that all the\r
45  * standard demo tasks are still operational.  While no errors have been\r
46  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
47  * rate increasing to 500ms being a visual indication that at least one task has\r
48  * reported unexpected behaviour.\r
49  *\r
50  * "Reg test" tasks - These fill the registers with known values, then check\r
51  * that each register still contains its expected value.  Each task uses\r
52  * different values.  The tasks run with very low priority so get preempted very\r
53  * frequently.  A register containing an unexpected value is indicative of an\r
54  * error in the context switching mechanism.\r
55  *\r
56  */\r
57 \r
58 /* Standard includes. */\r
59 #include <stdio.h>\r
60 \r
61 /* Scheduler includes. */\r
62 #include "FreeRTOS.h"\r
63 #include "task.h"\r
64 #include "queue.h"\r
65 #include "semphr.h"\r
66 \r
67 /* Demo app includes. */\r
68 #include "BlockQ.h"\r
69 #include "death.h"\r
70 #include "flash.h"\r
71 #include "partest.h"\r
72 #include "semtest.h"\r
73 #include "PollQ.h"\r
74 #include "GenQTest.h"\r
75 #include "QPeek.h"\r
76 #include "recmutex.h"\r
77 \r
78 /*-----------------------------------------------------------*/\r
79 \r
80 /* The time between cycles of the 'check' functionality - as described at the\r
81 top of this file. */\r
82 #define mainNO_ERROR_PERIOD                                     ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
83 \r
84 /* The rate at which the LED controlled by the 'check' task will flash should an\r
85 error have been detected. */\r
86 #define mainERROR_PERIOD                                        ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
87 \r
88 /* The LED controlled by the 'check' task. */\r
89 #define mainCHECK_LED                                           ( 3 )\r
90 \r
91 /* ComTest constants - there is no free LED for the comtest tasks. */\r
92 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
93 #define mainCOM_TEST_LED                                        ( 5 )\r
94 \r
95 /* Task priorities. */\r
96 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
97 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
98 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
99 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
100 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
101 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
102 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
103 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
104 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
105 \r
106 /*\r
107  * Configure the hardware for the demo.\r
108  */\r
109 static void prvSetupHardware( void );\r
110 \r
111 /*\r
112  * Implements the 'check' task functionality as described at the top of this\r
113  * file.\r
114  */\r
115 static void prvCheckTask( void *pvParameters );\r
116 \r
117 /*\r
118  * Implement the 'Reg test' functionality as described at the top of this file.\r
119  */\r
120 static void vRegTest1Task( void *pvParameters );\r
121 static void vRegTest2Task( void *pvParameters );\r
122 \r
123 /*-----------------------------------------------------------*/\r
124 \r
125 /* Counters used to detect errors within the reg test tasks. */\r
126 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
127 \r
128 /*-----------------------------------------------------------*/\r
129 \r
130 int main( void )\r
131 {\r
132 extern void vBasicWEBServer( void *pv );\r
133 \r
134         /* Setup the hardware ready for this demo. */\r
135         prvSetupHardware();\r
136         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
137 \r
138         /* Start the standard demo tasks. */\r
139         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
140         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
141         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
142         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
143         vStartQueuePeekTasks();\r
144         vStartRecursiveMutexTasks();\r
145         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
146 \r
147         /* Start the reg test tasks - defined in this file. */\r
148         xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
149         xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
150 \r
151         /* Create the check task. */\r
152         xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
153 \r
154         /* The suicide tasks must be created last as they need to know how many\r
155         tasks were running prior to their creation in order to ascertain whether\r
156         or not the correct/expected number of tasks are running at any given time. */\r
157     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
158 \r
159         /* Start the scheduler. */\r
160         vTaskStartScheduler();\r
161 \r
162     /* Will only get here if there was insufficient memory to create the idle\r
163     task. */\r
164         for( ;; )\r
165         {\r
166         }\r
167 }\r
168 /*-----------------------------------------------------------*/\r
169 \r
170 static void prvCheckTask( void *pvParameters )\r
171 {\r
172 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
173 TickType_t xLastExecutionTime;\r
174 \r
175         ( void ) pvParameters;\r
176 \r
177         /* Initialise the variable used to control our iteration rate prior to\r
178         its first use. */\r
179         xLastExecutionTime = xTaskGetTickCount();\r
180 \r
181         for( ;; )\r
182         {\r
183                 /* Wait until it is time to run the tests again. */\r
184                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
185 \r
186                 /* Has an error been found in any task? */\r
187                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
188                 {\r
189                         ulError |= 0x01UL;\r
190                 }\r
191 \r
192                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
193                 {\r
194                         ulError |= 0x02UL;\r
195                 }\r
196 \r
197                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
198                 {\r
199                         ulError |= 0x04UL;\r
200                 }\r
201 \r
202                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
203             {\r
204                 ulError |= 0x20UL;\r
205             }\r
206 \r
207                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
208             {\r
209                 ulError |= 0x40UL;\r
210             }\r
211 \r
212                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
213             {\r
214                 ulError |= 0x80UL;\r
215             }\r
216 \r
217                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
218             {\r
219                 ulError |= 0x200UL;\r
220             }\r
221 \r
222                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
223                 {\r
224                         ulError |= 0x1000UL;\r
225                 }\r
226 \r
227                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
228                 {\r
229                         ulError |= 0x1000UL;\r
230                 }\r
231 \r
232                 ulLastRegTest1Count = ulRegTest1Counter;\r
233                 ulLastRegTest2Count = ulRegTest2Counter;\r
234 \r
235                 /* If an error has been found then increase our cycle rate, and in so\r
236                 going increase the rate at which the check task LED toggles. */\r
237                 if( ulError != 0 )\r
238                 {\r
239                 ulTicksToWait = mainERROR_PERIOD;\r
240                 }\r
241 \r
242                 /* Toggle the LED each iteration. */\r
243                 vParTestToggleLED( mainCHECK_LED );\r
244         }\r
245 }\r
246 /*-----------------------------------------------------------*/\r
247 \r
248 void prvSetupHardware( void )\r
249 {\r
250         portDISABLE_INTERRUPTS();\r
251 \r
252         /* Setup the port used to toggle LEDs. */\r
253         vParTestInitialise();\r
254 }\r
255 /*-----------------------------------------------------------*/\r
256 \r
257 void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
258 {\r
259         /* This will get called if a stack overflow is detected during the context\r
260         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
261         problems within nested interrupts, but only do this for debug purposes as\r
262         it will increase the context switch time. */\r
263 \r
264         ( void ) pxTask;\r
265         ( void ) pcTaskName;\r
266 \r
267         for( ;; )\r
268         {\r
269         }\r
270 }\r
271 /*-----------------------------------------------------------*/\r
272 \r
273 static void vRegTest1Task( void *pvParameters )\r
274 {\r
275         /* Sanity check - did we receive the parameter expected? */\r
276         if( pvParameters != &ulRegTest1Counter )\r
277         {\r
278                 /* Change here so the check task can detect that an error occurred. */\r
279                 for( ;; )\r
280                 {\r
281                 }\r
282         }\r
283 \r
284         /* Set all the registers to known values, then check that each retains its\r
285         expected value - as described at the top of this file.  If an error is\r
286         found then the loop counter will no longer be incremented allowing the check\r
287         task to recognise the error. */\r
288         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
289                                                 "       moveq           #1, d0                                  \n\t"\r
290                                                 "       moveq           #2, d1                                  \n\t"\r
291                                                 "       moveq           #3, d2                                  \n\t"\r
292                                                 "       moveq           #4, d3                                  \n\t"\r
293                                                 "       moveq           #5, d4                                  \n\t"\r
294                                                 "       moveq           #6, d5                                  \n\t"\r
295                                                 "       moveq           #7, d6                                  \n\t"\r
296                                                 "       moveq           #8, d7                                  \n\t"\r
297                                                 "       move            #9, a0                                  \n\t"\r
298                                                 "       move            #10, a1                                 \n\t"\r
299                                                 "       move            #11, a2                                 \n\t"\r
300                                                 "       move            #12, a3                                 \n\t"\r
301                                                 "       move            #13, a4                                 \n\t"\r
302                                                 "       move            #14, a5                                 \n\t"\r
303                                                 "       move            #15, a6                                 \n\t"\r
304                                                 "                                                                               \n\t"\r
305                                                 "       cmpi.l          #1, d0                                  \n\t"\r
306                                                 "       bne                     reg_test_1_error                \n\t"\r
307                                                 "       cmpi.l          #2, d1                                  \n\t"\r
308                                                 "       bne                     reg_test_1_error                \n\t"\r
309                                                 "       cmpi.l          #3, d2                                  \n\t"\r
310                                                 "       bne                     reg_test_1_error                \n\t"\r
311                                                 "       cmpi.l          #4, d3                                  \n\t"\r
312                                                 "       bne                     reg_test_1_error                \n\t"\r
313                                                 "       cmpi.l          #5, d4                                  \n\t"\r
314                                                 "       bne                     reg_test_1_error                \n\t"\r
315                                                 "       cmpi.l          #6, d5                                  \n\t"\r
316                                                 "       bne                     reg_test_1_error                \n\t"\r
317                                                 "       cmpi.l          #7, d6                                  \n\t"\r
318                                                 "       bne                     reg_test_1_error                \n\t"\r
319                                                 "       cmpi.l          #8, d7                                  \n\t"\r
320                                                 "       bne                     reg_test_1_error                \n\t"\r
321                                                 "       move            a0, d0                                  \n\t"\r
322                                                 "       cmpi.l          #9, d0                                  \n\t"\r
323                                                 "       bne                     reg_test_1_error                \n\t"\r
324                                                 "       move            a1, d0                                  \n\t"\r
325                                                 "       cmpi.l          #10, d0                                 \n\t"\r
326                                                 "       bne                     reg_test_1_error                \n\t"\r
327                                                 "       move            a2, d0                                  \n\t"\r
328                                                 "       cmpi.l          #11, d0                                 \n\t"\r
329                                                 "       bne                     reg_test_1_error                \n\t"\r
330                                                 "       move            a3, d0                                  \n\t"\r
331                                                 "       cmpi.l          #12, d0                                 \n\t"\r
332                                                 "       bne                     reg_test_1_error                \n\t"\r
333                                                 "       move            a4, d0                                  \n\t"\r
334                                                 "       cmpi.l          #13, d0                                 \n\t"\r
335                                                 "       bne                     reg_test_1_error                \n\t"\r
336                                                 "       move            a5, d0                                  \n\t"\r
337                                                 "       cmpi.l          #14, d0                                 \n\t"\r
338                                                 "       bne                     reg_test_1_error                \n\t"\r
339                                                 "       move            a6, d0                                  \n\t"\r
340                                                 "       cmpi.l          #15, d0                                 \n\t"\r
341                                                 "       bne                     reg_test_1_error                \n\t"\r
342                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
343                                                 "       addq            #1, d0                                  \n\t"\r
344                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
345                                                 "       bra                     reg_test_1_start                \n\t"\r
346                                                 "reg_test_1_error:                                              \n\t"\r
347                                                 "       bra                     reg_test_1_error                \n\t"\r
348                                         );\r
349 }\r
350 /*-----------------------------------------------------------*/\r
351 \r
352 static void vRegTest2Task( void *pvParameters )\r
353 {\r
354         /* Sanity check - did we receive the parameter expected? */\r
355         if( pvParameters != &ulRegTest2Counter )\r
356         {\r
357                 /* Change here so the check task can detect that an error occurred. */\r
358                 for( ;; )\r
359                 {\r
360                 }\r
361         }\r
362 \r
363         /* Set all the registers to known values, then check that each retains its\r
364         expected value - as described at the top of this file.  If an error is\r
365         found then the loop counter will no longer be incremented allowing the check\r
366         task to recognise the error. */\r
367         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
368                                                 "       moveq           #10, d0                                 \n\t"\r
369                                                 "       moveq           #20, d1                                 \n\t"\r
370                                                 "       moveq           #30, d2                                 \n\t"\r
371                                                 "       moveq           #40, d3                                 \n\t"\r
372                                                 "       moveq           #50, d4                                 \n\t"\r
373                                                 "       moveq           #60, d5                                 \n\t"\r
374                                                 "       moveq           #70, d6                                 \n\t"\r
375                                                 "       moveq           #80, d7                                 \n\t"\r
376                                                 "       move            #90, a0                                 \n\t"\r
377                                                 "       move            #100, a1                                \n\t"\r
378                                                 "       move            #110, a2                                \n\t"\r
379                                                 "       move            #120, a3                                \n\t"\r
380                                                 "       move            #130, a4                                \n\t"\r
381                                                 "       move            #140, a5                                \n\t"\r
382                                                 "       move            #150, a6                                \n\t"\r
383                                                 "                                                                               \n\t"\r
384                                                 "       cmpi.l          #10, d0                                 \n\t"\r
385                                                 "       bne                     reg_test_2_error                \n\t"\r
386                                                 "       cmpi.l          #20, d1                                 \n\t"\r
387                                                 "       bne                     reg_test_2_error                \n\t"\r
388                                                 "       cmpi.l          #30, d2                                 \n\t"\r
389                                                 "       bne                     reg_test_2_error                \n\t"\r
390                                                 "       cmpi.l          #40, d3                                 \n\t"\r
391                                                 "       bne                     reg_test_2_error                \n\t"\r
392                                                 "       cmpi.l          #50, d4                                 \n\t"\r
393                                                 "       bne                     reg_test_2_error                \n\t"\r
394                                                 "       cmpi.l          #60, d5                                 \n\t"\r
395                                                 "       bne                     reg_test_2_error                \n\t"\r
396                                                 "       cmpi.l          #70, d6                                 \n\t"\r
397                                                 "       bne                     reg_test_2_error                \n\t"\r
398                                                 "       cmpi.l          #80, d7                                 \n\t"\r
399                                                 "       bne                     reg_test_2_error                \n\t"\r
400                                                 "       move            a0, d0                                  \n\t"\r
401                                                 "       cmpi.l          #90, d0                                 \n\t"\r
402                                                 "       bne                     reg_test_2_error                \n\t"\r
403                                                 "       move            a1, d0                                  \n\t"\r
404                                                 "       cmpi.l          #100, d0                                \n\t"\r
405                                                 "       bne                     reg_test_2_error                \n\t"\r
406                                                 "       move            a2, d0                                  \n\t"\r
407                                                 "       cmpi.l          #110, d0                                \n\t"\r
408                                                 "       bne                     reg_test_2_error                \n\t"\r
409                                                 "       move            a3, d0                                  \n\t"\r
410                                                 "       cmpi.l          #120, d0                                \n\t"\r
411                                                 "       bne                     reg_test_2_error                \n\t"\r
412                                                 "       move            a4, d0                                  \n\t"\r
413                                                 "       cmpi.l          #130, d0                                \n\t"\r
414                                                 "       bne                     reg_test_2_error                \n\t"\r
415                                                 "       move            a5, d0                                  \n\t"\r
416                                                 "       cmpi.l          #140, d0                                \n\t"\r
417                                                 "       bne                     reg_test_2_error                \n\t"\r
418                                                 "       move            a6, d0                                  \n\t"\r
419                                                 "       cmpi.l          #150, d0                                \n\t"\r
420                                                 "       bne                     reg_test_2_error                \n\t"\r
421                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
422                                                 "       addq            #1, d0                                  \n\t"\r
423                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
424                                                 "       bra                     reg_test_2_start                \n\t"\r
425                                                 "reg_test_2_error:                                              \n\t"\r
426                                                 "       bra                     reg_test_2_error                \n\t"\r
427                                         );\r
428 }\r
429 /*-----------------------------------------------------------*/\r
430 \r
431 \r
432 \r