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1 /*\r
2     FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
29     >>!   obliged to provide the source code for proprietary components     !<<\r
30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 \r
67 /*\r
68  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
69  * documentation provides more details of the standard demo application tasks.\r
70  * In addition to the standard demo tasks, the following tasks and tests are\r
71  * defined and/or created within this file:\r
72  *\r
73  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
74  * simply generates a page that shows the current state of all the tasks within\r
75  * the system, including the high water mark of each task stack. The high water\r
76  * mark is displayed as the amount of stack that has never been used, so the\r
77  * closer the value is to zero the closer the task has come to overflowing its\r
78  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
79  *\r
80  * "Check" task -  This only executes every five seconds but has a high priority\r
81  * to ensure it gets processor time.  Its main function is to check that all the\r
82  * standard demo tasks are still operational.  While no errors have been\r
83  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
84  * rate increasing to 500ms being a visual indication that at least one task has\r
85  * reported unexpected behaviour.\r
86  *\r
87  * "Reg test" tasks - These fill the registers with known values, then check\r
88  * that each register still contains its expected value.  Each task uses\r
89  * different values.  The tasks run with very low priority so get preempted very\r
90  * frequently.  A register containing an unexpected value is indicative of an\r
91  * error in the context switching mechanism.\r
92  *\r
93  */\r
94 \r
95 /* Standard includes. */\r
96 #include <stdio.h>\r
97 \r
98 /* Scheduler includes. */\r
99 #include "FreeRTOS.h"\r
100 #include "task.h"\r
101 #include "queue.h"\r
102 #include "semphr.h"\r
103 \r
104 /* Demo app includes. */\r
105 #include "BlockQ.h"\r
106 #include "death.h"\r
107 #include "flash.h"\r
108 #include "partest.h"\r
109 #include "semtest.h"\r
110 #include "PollQ.h"\r
111 #include "GenQTest.h"\r
112 #include "QPeek.h"\r
113 #include "recmutex.h"\r
114 \r
115 /*-----------------------------------------------------------*/\r
116 \r
117 /* The time between cycles of the 'check' functionality - as described at the\r
118 top of this file. */\r
119 #define mainNO_ERROR_PERIOD                                     ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
120 \r
121 /* The rate at which the LED controlled by the 'check' task will flash should an\r
122 error have been detected. */\r
123 #define mainERROR_PERIOD                                        ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
124 \r
125 /* The LED controlled by the 'check' task. */\r
126 #define mainCHECK_LED                                           ( 3 )\r
127 \r
128 /* ComTest constants - there is no free LED for the comtest tasks. */\r
129 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
130 #define mainCOM_TEST_LED                                        ( 5 )\r
131 \r
132 /* Task priorities. */\r
133 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
134 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
135 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
136 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
137 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
138 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
139 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
140 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
141 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
142 \r
143 /*\r
144  * Configure the hardware for the demo.\r
145  */\r
146 static void prvSetupHardware( void );\r
147 \r
148 /*\r
149  * Implements the 'check' task functionality as described at the top of this\r
150  * file.\r
151  */\r
152 static void prvCheckTask( void *pvParameters );\r
153 \r
154 /*\r
155  * Implement the 'Reg test' functionality as described at the top of this file.\r
156  */\r
157 static void vRegTest1Task( void *pvParameters );\r
158 static void vRegTest2Task( void *pvParameters );\r
159 \r
160 /*-----------------------------------------------------------*/\r
161 \r
162 /* Counters used to detect errors within the reg test tasks. */\r
163 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
164 \r
165 /*-----------------------------------------------------------*/\r
166 \r
167 int main( void )\r
168 {\r
169 extern void vBasicWEBServer( void *pv );\r
170 \r
171         /* Setup the hardware ready for this demo. */\r
172         prvSetupHardware();\r
173         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
174 \r
175         /* Start the standard demo tasks. */\r
176         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
177         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
178         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
179         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
180         vStartQueuePeekTasks();\r
181         vStartRecursiveMutexTasks();\r
182         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
183 \r
184         /* Start the reg test tasks - defined in this file. */\r
185         xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
186         xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
187 \r
188         /* Create the check task. */\r
189         xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
190 \r
191         /* The suicide tasks must be created last as they need to know how many\r
192         tasks were running prior to their creation in order to ascertain whether\r
193         or not the correct/expected number of tasks are running at any given time. */\r
194     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
195 \r
196         /* Start the scheduler. */\r
197         vTaskStartScheduler();\r
198 \r
199     /* Will only get here if there was insufficient memory to create the idle\r
200     task. */\r
201         for( ;; )\r
202         {\r
203         }\r
204 }\r
205 /*-----------------------------------------------------------*/\r
206 \r
207 static void prvCheckTask( void *pvParameters )\r
208 {\r
209 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
210 TickType_t xLastExecutionTime;\r
211 \r
212         ( void ) pvParameters;\r
213 \r
214         /* Initialise the variable used to control our iteration rate prior to\r
215         its first use. */\r
216         xLastExecutionTime = xTaskGetTickCount();\r
217 \r
218         for( ;; )\r
219         {\r
220                 /* Wait until it is time to run the tests again. */\r
221                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
222 \r
223                 /* Has an error been found in any task? */\r
224                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
225                 {\r
226                         ulError |= 0x01UL;\r
227                 }\r
228 \r
229                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
230                 {\r
231                         ulError |= 0x02UL;\r
232                 }\r
233 \r
234                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
235                 {\r
236                         ulError |= 0x04UL;\r
237                 }\r
238 \r
239                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
240             {\r
241                 ulError |= 0x20UL;\r
242             }\r
243 \r
244                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
245             {\r
246                 ulError |= 0x40UL;\r
247             }\r
248 \r
249                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
250             {\r
251                 ulError |= 0x80UL;\r
252             }\r
253 \r
254                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
255             {\r
256                 ulError |= 0x200UL;\r
257             }\r
258 \r
259                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
260                 {\r
261                         ulError |= 0x1000UL;\r
262                 }\r
263 \r
264                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
265                 {\r
266                         ulError |= 0x1000UL;\r
267                 }\r
268 \r
269                 ulLastRegTest1Count = ulRegTest1Counter;\r
270                 ulLastRegTest2Count = ulRegTest2Counter;\r
271 \r
272                 /* If an error has been found then increase our cycle rate, and in so\r
273                 going increase the rate at which the check task LED toggles. */\r
274                 if( ulError != 0 )\r
275                 {\r
276                 ulTicksToWait = mainERROR_PERIOD;\r
277                 }\r
278 \r
279                 /* Toggle the LED each itteration. */\r
280                 vParTestToggleLED( mainCHECK_LED );\r
281         }\r
282 }\r
283 /*-----------------------------------------------------------*/\r
284 \r
285 void prvSetupHardware( void )\r
286 {\r
287         portDISABLE_INTERRUPTS();\r
288 \r
289         /* Setup the port used to toggle LEDs. */\r
290         vParTestInitialise();\r
291 }\r
292 /*-----------------------------------------------------------*/\r
293 \r
294 void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
295 {\r
296         /* This will get called if a stack overflow is detected during the context\r
297         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
298         problems within nested interrupts, but only do this for debug purposes as\r
299         it will increase the context switch time. */\r
300 \r
301         ( void ) pxTask;\r
302         ( void ) pcTaskName;\r
303 \r
304         for( ;; )\r
305         {\r
306         }\r
307 }\r
308 /*-----------------------------------------------------------*/\r
309 \r
310 static void vRegTest1Task( void *pvParameters )\r
311 {\r
312         /* Sanity check - did we receive the parameter expected? */\r
313         if( pvParameters != &ulRegTest1Counter )\r
314         {\r
315                 /* Change here so the check task can detect that an error occurred. */\r
316                 for( ;; )\r
317                 {\r
318                 }\r
319         }\r
320 \r
321         /* Set all the registers to known values, then check that each retains its\r
322         expected value - as described at the top of this file.  If an error is\r
323         found then the loop counter will no longer be incremented allowing the check\r
324         task to recognise the error. */\r
325         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
326                                                 "       moveq           #1, d0                                  \n\t"\r
327                                                 "       moveq           #2, d1                                  \n\t"\r
328                                                 "       moveq           #3, d2                                  \n\t"\r
329                                                 "       moveq           #4, d3                                  \n\t"\r
330                                                 "       moveq           #5, d4                                  \n\t"\r
331                                                 "       moveq           #6, d5                                  \n\t"\r
332                                                 "       moveq           #7, d6                                  \n\t"\r
333                                                 "       moveq           #8, d7                                  \n\t"\r
334                                                 "       move            #9, a0                                  \n\t"\r
335                                                 "       move            #10, a1                                 \n\t"\r
336                                                 "       move            #11, a2                                 \n\t"\r
337                                                 "       move            #12, a3                                 \n\t"\r
338                                                 "       move            #13, a4                                 \n\t"\r
339                                                 "       move            #14, a5                                 \n\t"\r
340                                                 "       move            #15, a6                                 \n\t"\r
341                                                 "                                                                               \n\t"\r
342                                                 "       cmpi.l          #1, d0                                  \n\t"\r
343                                                 "       bne                     reg_test_1_error                \n\t"\r
344                                                 "       cmpi.l          #2, d1                                  \n\t"\r
345                                                 "       bne                     reg_test_1_error                \n\t"\r
346                                                 "       cmpi.l          #3, d2                                  \n\t"\r
347                                                 "       bne                     reg_test_1_error                \n\t"\r
348                                                 "       cmpi.l          #4, d3                                  \n\t"\r
349                                                 "       bne                     reg_test_1_error                \n\t"\r
350                                                 "       cmpi.l          #5, d4                                  \n\t"\r
351                                                 "       bne                     reg_test_1_error                \n\t"\r
352                                                 "       cmpi.l          #6, d5                                  \n\t"\r
353                                                 "       bne                     reg_test_1_error                \n\t"\r
354                                                 "       cmpi.l          #7, d6                                  \n\t"\r
355                                                 "       bne                     reg_test_1_error                \n\t"\r
356                                                 "       cmpi.l          #8, d7                                  \n\t"\r
357                                                 "       bne                     reg_test_1_error                \n\t"\r
358                                                 "       move            a0, d0                                  \n\t"\r
359                                                 "       cmpi.l          #9, d0                                  \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       move            a1, d0                                  \n\t"\r
362                                                 "       cmpi.l          #10, d0                                 \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            a2, d0                                  \n\t"\r
365                                                 "       cmpi.l          #11, d0                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            a3, d0                                  \n\t"\r
368                                                 "       cmpi.l          #12, d0                                 \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            a4, d0                                  \n\t"\r
371                                                 "       cmpi.l          #13, d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            a5, d0                                  \n\t"\r
374                                                 "       cmpi.l          #14, d0                                 \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            a6, d0                                  \n\t"\r
377                                                 "       cmpi.l          #15, d0                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
380                                                 "       addq            #1, d0                                  \n\t"\r
381                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
382                                                 "       bra                     reg_test_1_start                \n\t"\r
383                                                 "reg_test_1_error:                                              \n\t"\r
384                                                 "       bra                     reg_test_1_error                \n\t"\r
385                                         );\r
386 }\r
387 /*-----------------------------------------------------------*/\r
388 \r
389 static void vRegTest2Task( void *pvParameters )\r
390 {\r
391         /* Sanity check - did we receive the parameter expected? */\r
392         if( pvParameters != &ulRegTest2Counter )\r
393         {\r
394                 /* Change here so the check task can detect that an error occurred. */\r
395                 for( ;; )\r
396                 {\r
397                 }\r
398         }\r
399 \r
400         /* Set all the registers to known values, then check that each retains its\r
401         expected value - as described at the top of this file.  If an error is\r
402         found then the loop counter will no longer be incremented allowing the check\r
403         task to recognise the error. */\r
404         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
405                                                 "       moveq           #10, d0                                 \n\t"\r
406                                                 "       moveq           #20, d1                                 \n\t"\r
407                                                 "       moveq           #30, d2                                 \n\t"\r
408                                                 "       moveq           #40, d3                                 \n\t"\r
409                                                 "       moveq           #50, d4                                 \n\t"\r
410                                                 "       moveq           #60, d5                                 \n\t"\r
411                                                 "       moveq           #70, d6                                 \n\t"\r
412                                                 "       moveq           #80, d7                                 \n\t"\r
413                                                 "       move            #90, a0                                 \n\t"\r
414                                                 "       move            #100, a1                                \n\t"\r
415                                                 "       move            #110, a2                                \n\t"\r
416                                                 "       move            #120, a3                                \n\t"\r
417                                                 "       move            #130, a4                                \n\t"\r
418                                                 "       move            #140, a5                                \n\t"\r
419                                                 "       move            #150, a6                                \n\t"\r
420                                                 "                                                                               \n\t"\r
421                                                 "       cmpi.l          #10, d0                                 \n\t"\r
422                                                 "       bne                     reg_test_2_error                \n\t"\r
423                                                 "       cmpi.l          #20, d1                                 \n\t"\r
424                                                 "       bne                     reg_test_2_error                \n\t"\r
425                                                 "       cmpi.l          #30, d2                                 \n\t"\r
426                                                 "       bne                     reg_test_2_error                \n\t"\r
427                                                 "       cmpi.l          #40, d3                                 \n\t"\r
428                                                 "       bne                     reg_test_2_error                \n\t"\r
429                                                 "       cmpi.l          #50, d4                                 \n\t"\r
430                                                 "       bne                     reg_test_2_error                \n\t"\r
431                                                 "       cmpi.l          #60, d5                                 \n\t"\r
432                                                 "       bne                     reg_test_2_error                \n\t"\r
433                                                 "       cmpi.l          #70, d6                                 \n\t"\r
434                                                 "       bne                     reg_test_2_error                \n\t"\r
435                                                 "       cmpi.l          #80, d7                                 \n\t"\r
436                                                 "       bne                     reg_test_2_error                \n\t"\r
437                                                 "       move            a0, d0                                  \n\t"\r
438                                                 "       cmpi.l          #90, d0                                 \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       move            a1, d0                                  \n\t"\r
441                                                 "       cmpi.l          #100, d0                                \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a2, d0                                  \n\t"\r
444                                                 "       cmpi.l          #110, d0                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            a3, d0                                  \n\t"\r
447                                                 "       cmpi.l          #120, d0                                \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            a4, d0                                  \n\t"\r
450                                                 "       cmpi.l          #130, d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            a5, d0                                  \n\t"\r
453                                                 "       cmpi.l          #140, d0                                \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            a6, d0                                  \n\t"\r
456                                                 "       cmpi.l          #150, d0                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
459                                                 "       addq            #1, d0                                  \n\t"\r
460                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
461                                                 "       bra                     reg_test_2_start                \n\t"\r
462                                                 "reg_test_2_error:                                              \n\t"\r
463                                                 "       bra                     reg_test_2_error                \n\t"\r
464                                         );\r
465 }\r
466 /*-----------------------------------------------------------*/\r
467 \r
468 \r
469 \r