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1 /*\r
2     FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
3 \r
4     FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME.  PLEASE VISIT \r
5     http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
10      *    Complete, revised, and edited pdf reference manuals are also       *\r
11      *    available.                                                         *\r
12      *                                                                       *\r
13      *    Purchasing FreeRTOS documentation will not only help you, by       *\r
14      *    ensuring you get running as quickly as possible and with an        *\r
15      *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
16      *    the FreeRTOS project to continue with its mission of providing     *\r
17      *    professional grade, cross platform, de facto standard solutions    *\r
18      *    for microcontrollers - completely free of charge!                  *\r
19      *                                                                       *\r
20      *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
21      *                                                                       *\r
22      *    Thank you for using FreeRTOS, and thank you for your support!      *\r
23      *                                                                       *\r
24     ***************************************************************************\r
25 \r
26 \r
27     This file is part of the FreeRTOS distribution.\r
28 \r
29     FreeRTOS is free software; you can redistribute it and/or modify it under\r
30     the terms of the GNU General Public License (version 2) as published by the\r
31     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
32     >>>NOTE<<< The modification to the GPL is included to allow you to\r
33     distribute a combined work that includes FreeRTOS without being obliged to\r
34     provide the source code for proprietary components outside of the FreeRTOS\r
35     kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
36     WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
37     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
38     more details. You should have received a copy of the GNU General Public\r
39     License and the FreeRTOS license exception along with FreeRTOS; if not it\r
40     can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
41     by writing to Richard Barry, contact details for whom are available on the\r
42     FreeRTOS WEB site.\r
43 \r
44     1 tab == 4 spaces!\r
45     \r
46     ***************************************************************************\r
47      *                                                                       *\r
48      *    Having a problem?  Start by reading the FAQ "My application does   *\r
49      *    not run, what could be wrong?"                                     *\r
50      *                                                                       *\r
51      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
52      *                                                                       *\r
53     ***************************************************************************\r
54 \r
55     \r
56     http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
57     and contact details.  \r
58     \r
59     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
60     including FreeRTOS+Trace - an indispensable productivity tool.\r
61 \r
62     Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
63     the code with commercial support, indemnification, and middleware, under \r
64     the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
65     provide a safety engineered and independently SIL3 certified version under \r
66     the SafeRTOS brand: http://www.SafeRTOS.com.\r
67 */\r
68 \r
69 \r
70 /*\r
71  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
72  * documentation provides more details of the standard demo application tasks.\r
73  * In addition to the standard demo tasks, the following tasks and tests are\r
74  * defined and/or created within this file:\r
75  *\r
76  * "Web server" - Very basic demonstration of the lwIP stack.  The WEB server\r
77  * simply generates a page that shows the current state of all the tasks within\r
78  * the system, including the high water mark of each task stack. The high water\r
79  * mark is displayed as the amount of stack that has never been used, so the\r
80  * closer the value is to zero the closer the task has come to overflowing its\r
81  * stack.  The IP address and net mask are set within FreeRTOSConfig.h.\r
82  *\r
83  * "Check" task -  This only executes every five seconds but has a high priority\r
84  * to ensure it gets processor time.  Its main function is to check that all the\r
85  * standard demo tasks are still operational.  While no errors have been\r
86  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
87  * rate increasing to 500ms being a visual indication that at least one task has\r
88  * reported unexpected behaviour.\r
89  *\r
90  * "Reg test" tasks - These fill the registers with known values, then check\r
91  * that each register still contains its expected value.  Each task uses\r
92  * different values.  The tasks run with very low priority so get preempted very\r
93  * frequently.  A register containing an unexpected value is indicative of an\r
94  * error in the context switching mechanism.\r
95  *\r
96  */\r
97 \r
98 /* Standard includes. */\r
99 #include <stdio.h>\r
100 \r
101 /* Scheduler includes. */\r
102 #include "FreeRTOS.h"\r
103 #include "task.h"\r
104 #include "queue.h"\r
105 #include "semphr.h"\r
106 \r
107 /* Demo app includes. */\r
108 #include "BlockQ.h"\r
109 #include "death.h"\r
110 #include "flash.h"\r
111 #include "partest.h"\r
112 #include "semtest.h"\r
113 #include "PollQ.h"\r
114 #include "GenQTest.h"\r
115 #include "QPeek.h"\r
116 #include "recmutex.h"\r
117 \r
118 /*-----------------------------------------------------------*/\r
119 \r
120 /* The time between cycles of the 'check' functionality - as described at the\r
121 top of this file. */\r
122 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
123 \r
124 /* The rate at which the LED controlled by the 'check' task will flash should an\r
125 error have been detected. */\r
126 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
127 \r
128 /* The LED controlled by the 'check' task. */\r
129 #define mainCHECK_LED                                           ( 3 )\r
130 \r
131 /* ComTest constants - there is no free LED for the comtest tasks. */\r
132 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
133 #define mainCOM_TEST_LED                                        ( 5 )\r
134 \r
135 /* Task priorities. */\r
136 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
137 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
138 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
139 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
140 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
141 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
142 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
143 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
144 #define mainWEB_TASK_PRIORITY                   ( tskIDLE_PRIORITY + 2 )\r
145 \r
146 /*\r
147  * Configure the hardware for the demo.\r
148  */\r
149 static void prvSetupHardware( void );\r
150 \r
151 /*\r
152  * Implements the 'check' task functionality as described at the top of this\r
153  * file.\r
154  */\r
155 static void prvCheckTask( void *pvParameters );\r
156 \r
157 /*\r
158  * Implement the 'Reg test' functionality as described at the top of this file.\r
159  */\r
160 static void vRegTest1Task( void *pvParameters );\r
161 static void vRegTest2Task( void *pvParameters );\r
162 \r
163 /*-----------------------------------------------------------*/\r
164 \r
165 /* Counters used to detect errors within the reg test tasks. */\r
166 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
167 \r
168 /*-----------------------------------------------------------*/\r
169 \r
170 int main( void )\r
171 {\r
172 extern void vBasicWEBServer( void *pv );\r
173 \r
174         /* Setup the hardware ready for this demo. */\r
175         prvSetupHardware();\r
176         ( void )sys_thread_new("HTTPD", vBasicWEBServer, NULL, 320, mainWEB_TASK_PRIORITY );\r
177 \r
178         /* Start the standard demo tasks. */\r
179         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
180         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
181         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
182         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
183         vStartQueuePeekTasks();\r
184         vStartRecursiveMutexTasks();\r
185         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
186 \r
187         /* Start the reg test tasks - defined in this file. */\r
188         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
189         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
190 \r
191         /* Create the check task. */\r
192         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
193 \r
194         /* The suicide tasks must be created last as they need to know how many\r
195         tasks were running prior to their creation in order to ascertain whether\r
196         or not the correct/expected number of tasks are running at any given time. */\r
197     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
198 \r
199         /* Start the scheduler. */\r
200         vTaskStartScheduler();\r
201 \r
202     /* Will only get here if there was insufficient memory to create the idle\r
203     task. */\r
204         for( ;; )\r
205         {\r
206         }\r
207 }\r
208 /*-----------------------------------------------------------*/\r
209 \r
210 static void prvCheckTask( void *pvParameters )\r
211 {\r
212 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
213 portTickType xLastExecutionTime;\r
214 \r
215         ( void ) pvParameters;\r
216 \r
217         /* Initialise the variable used to control our iteration rate prior to\r
218         its first use. */\r
219         xLastExecutionTime = xTaskGetTickCount();\r
220 \r
221         for( ;; )\r
222         {\r
223                 /* Wait until it is time to run the tests again. */\r
224                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
225 \r
226                 /* Has an error been found in any task? */\r
227                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
228                 {\r
229                         ulError |= 0x01UL;\r
230                 }\r
231 \r
232                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
233                 {\r
234                         ulError |= 0x02UL;\r
235                 }\r
236 \r
237                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
238                 {\r
239                         ulError |= 0x04UL;\r
240                 }\r
241 \r
242                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
243             {\r
244                 ulError |= 0x20UL;\r
245             }\r
246 \r
247                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
248             {\r
249                 ulError |= 0x40UL;\r
250             }\r
251 \r
252                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
253             {\r
254                 ulError |= 0x80UL;\r
255             }\r
256 \r
257                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
258             {\r
259                 ulError |= 0x200UL;\r
260             }\r
261 \r
262                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
263                 {\r
264                         ulError |= 0x1000UL;\r
265                 }\r
266 \r
267                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
268                 {\r
269                         ulError |= 0x1000UL;\r
270                 }\r
271 \r
272                 ulLastRegTest1Count = ulRegTest1Counter;\r
273                 ulLastRegTest2Count = ulRegTest2Counter;\r
274 \r
275                 /* If an error has been found then increase our cycle rate, and in so\r
276                 going increase the rate at which the check task LED toggles. */\r
277                 if( ulError != 0 )\r
278                 {\r
279                 ulTicksToWait = mainERROR_PERIOD;\r
280                 }\r
281 \r
282                 /* Toggle the LED each itteration. */\r
283                 vParTestToggleLED( mainCHECK_LED );\r
284         }\r
285 }\r
286 /*-----------------------------------------------------------*/\r
287 \r
288 void prvSetupHardware( void )\r
289 {\r
290         portDISABLE_INTERRUPTS();\r
291 \r
292         /* Setup the port used to toggle LEDs. */\r
293         vParTestInitialise();\r
294 }\r
295 /*-----------------------------------------------------------*/\r
296 \r
297 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
298 {\r
299         /* This will get called if a stack overflow is detected during the context\r
300         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
301         problems within nested interrupts, but only do this for debug purposes as\r
302         it will increase the context switch time. */\r
303 \r
304         ( void ) pxTask;\r
305         ( void ) pcTaskName;\r
306 \r
307         for( ;; )\r
308         {\r
309         }\r
310 }\r
311 /*-----------------------------------------------------------*/\r
312 \r
313 static void vRegTest1Task( void *pvParameters )\r
314 {\r
315         /* Sanity check - did we receive the parameter expected? */\r
316         if( pvParameters != &ulRegTest1Counter )\r
317         {\r
318                 /* Change here so the check task can detect that an error occurred. */\r
319                 for( ;; )\r
320                 {\r
321                 }\r
322         }\r
323 \r
324         /* Set all the registers to known values, then check that each retains its\r
325         expected value - as described at the top of this file.  If an error is\r
326         found then the loop counter will no longer be incremented allowing the check\r
327         task to recognise the error. */\r
328         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
329                                                 "       moveq           #1, d0                                  \n\t"\r
330                                                 "       moveq           #2, d1                                  \n\t"\r
331                                                 "       moveq           #3, d2                                  \n\t"\r
332                                                 "       moveq           #4, d3                                  \n\t"\r
333                                                 "       moveq           #5, d4                                  \n\t"\r
334                                                 "       moveq           #6, d5                                  \n\t"\r
335                                                 "       moveq           #7, d6                                  \n\t"\r
336                                                 "       moveq           #8, d7                                  \n\t"\r
337                                                 "       move            #9, a0                                  \n\t"\r
338                                                 "       move            #10, a1                                 \n\t"\r
339                                                 "       move            #11, a2                                 \n\t"\r
340                                                 "       move            #12, a3                                 \n\t"\r
341                                                 "       move            #13, a4                                 \n\t"\r
342                                                 "       move            #14, a5                                 \n\t"\r
343                                                 "       move            #15, a6                                 \n\t"\r
344                                                 "                                                                               \n\t"\r
345                                                 "       cmpi.l          #1, d0                                  \n\t"\r
346                                                 "       bne                     reg_test_1_error                \n\t"\r
347                                                 "       cmpi.l          #2, d1                                  \n\t"\r
348                                                 "       bne                     reg_test_1_error                \n\t"\r
349                                                 "       cmpi.l          #3, d2                                  \n\t"\r
350                                                 "       bne                     reg_test_1_error                \n\t"\r
351                                                 "       cmpi.l          #4, d3                                  \n\t"\r
352                                                 "       bne                     reg_test_1_error                \n\t"\r
353                                                 "       cmpi.l          #5, d4                                  \n\t"\r
354                                                 "       bne                     reg_test_1_error                \n\t"\r
355                                                 "       cmpi.l          #6, d5                                  \n\t"\r
356                                                 "       bne                     reg_test_1_error                \n\t"\r
357                                                 "       cmpi.l          #7, d6                                  \n\t"\r
358                                                 "       bne                     reg_test_1_error                \n\t"\r
359                                                 "       cmpi.l          #8, d7                                  \n\t"\r
360                                                 "       bne                     reg_test_1_error                \n\t"\r
361                                                 "       move            a0, d0                                  \n\t"\r
362                                                 "       cmpi.l          #9, d0                                  \n\t"\r
363                                                 "       bne                     reg_test_1_error                \n\t"\r
364                                                 "       move            a1, d0                                  \n\t"\r
365                                                 "       cmpi.l          #10, d0                                 \n\t"\r
366                                                 "       bne                     reg_test_1_error                \n\t"\r
367                                                 "       move            a2, d0                                  \n\t"\r
368                                                 "       cmpi.l          #11, d0                                 \n\t"\r
369                                                 "       bne                     reg_test_1_error                \n\t"\r
370                                                 "       move            a3, d0                                  \n\t"\r
371                                                 "       cmpi.l          #12, d0                                 \n\t"\r
372                                                 "       bne                     reg_test_1_error                \n\t"\r
373                                                 "       move            a4, d0                                  \n\t"\r
374                                                 "       cmpi.l          #13, d0                                 \n\t"\r
375                                                 "       bne                     reg_test_1_error                \n\t"\r
376                                                 "       move            a5, d0                                  \n\t"\r
377                                                 "       cmpi.l          #14, d0                                 \n\t"\r
378                                                 "       bne                     reg_test_1_error                \n\t"\r
379                                                 "       move            a6, d0                                  \n\t"\r
380                                                 "       cmpi.l          #15, d0                                 \n\t"\r
381                                                 "       bne                     reg_test_1_error                \n\t"\r
382                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
383                                                 "       addq            #1, d0                                  \n\t"\r
384                                                 "       move            d0, ulRegTest1Counter   \n\t"\r
385                                                 "       bra                     reg_test_1_start                \n\t"\r
386                                                 "reg_test_1_error:                                              \n\t"\r
387                                                 "       bra                     reg_test_1_error                \n\t"\r
388                                         );\r
389 }\r
390 /*-----------------------------------------------------------*/\r
391 \r
392 static void vRegTest2Task( void *pvParameters )\r
393 {\r
394         /* Sanity check - did we receive the parameter expected? */\r
395         if( pvParameters != &ulRegTest2Counter )\r
396         {\r
397                 /* Change here so the check task can detect that an error occurred. */\r
398                 for( ;; )\r
399                 {\r
400                 }\r
401         }\r
402 \r
403         /* Set all the registers to known values, then check that each retains its\r
404         expected value - as described at the top of this file.  If an error is\r
405         found then the loop counter will no longer be incremented allowing the check\r
406         task to recognise the error. */\r
407         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
408                                                 "       moveq           #10, d0                                 \n\t"\r
409                                                 "       moveq           #20, d1                                 \n\t"\r
410                                                 "       moveq           #30, d2                                 \n\t"\r
411                                                 "       moveq           #40, d3                                 \n\t"\r
412                                                 "       moveq           #50, d4                                 \n\t"\r
413                                                 "       moveq           #60, d5                                 \n\t"\r
414                                                 "       moveq           #70, d6                                 \n\t"\r
415                                                 "       moveq           #80, d7                                 \n\t"\r
416                                                 "       move            #90, a0                                 \n\t"\r
417                                                 "       move            #100, a1                                \n\t"\r
418                                                 "       move            #110, a2                                \n\t"\r
419                                                 "       move            #120, a3                                \n\t"\r
420                                                 "       move            #130, a4                                \n\t"\r
421                                                 "       move            #140, a5                                \n\t"\r
422                                                 "       move            #150, a6                                \n\t"\r
423                                                 "                                                                               \n\t"\r
424                                                 "       cmpi.l          #10, d0                                 \n\t"\r
425                                                 "       bne                     reg_test_2_error                \n\t"\r
426                                                 "       cmpi.l          #20, d1                                 \n\t"\r
427                                                 "       bne                     reg_test_2_error                \n\t"\r
428                                                 "       cmpi.l          #30, d2                                 \n\t"\r
429                                                 "       bne                     reg_test_2_error                \n\t"\r
430                                                 "       cmpi.l          #40, d3                                 \n\t"\r
431                                                 "       bne                     reg_test_2_error                \n\t"\r
432                                                 "       cmpi.l          #50, d4                                 \n\t"\r
433                                                 "       bne                     reg_test_2_error                \n\t"\r
434                                                 "       cmpi.l          #60, d5                                 \n\t"\r
435                                                 "       bne                     reg_test_2_error                \n\t"\r
436                                                 "       cmpi.l          #70, d6                                 \n\t"\r
437                                                 "       bne                     reg_test_2_error                \n\t"\r
438                                                 "       cmpi.l          #80, d7                                 \n\t"\r
439                                                 "       bne                     reg_test_2_error                \n\t"\r
440                                                 "       move            a0, d0                                  \n\t"\r
441                                                 "       cmpi.l          #90, d0                                 \n\t"\r
442                                                 "       bne                     reg_test_2_error                \n\t"\r
443                                                 "       move            a1, d0                                  \n\t"\r
444                                                 "       cmpi.l          #100, d0                                \n\t"\r
445                                                 "       bne                     reg_test_2_error                \n\t"\r
446                                                 "       move            a2, d0                                  \n\t"\r
447                                                 "       cmpi.l          #110, d0                                \n\t"\r
448                                                 "       bne                     reg_test_2_error                \n\t"\r
449                                                 "       move            a3, d0                                  \n\t"\r
450                                                 "       cmpi.l          #120, d0                                \n\t"\r
451                                                 "       bne                     reg_test_2_error                \n\t"\r
452                                                 "       move            a4, d0                                  \n\t"\r
453                                                 "       cmpi.l          #130, d0                                \n\t"\r
454                                                 "       bne                     reg_test_2_error                \n\t"\r
455                                                 "       move            a5, d0                                  \n\t"\r
456                                                 "       cmpi.l          #140, d0                                \n\t"\r
457                                                 "       bne                     reg_test_2_error                \n\t"\r
458                                                 "       move            a6, d0                                  \n\t"\r
459                                                 "       cmpi.l          #150, d0                                \n\t"\r
460                                                 "       bne                     reg_test_2_error                \n\t"\r
461                                                 "       move            ulRegTest1Counter, d0   \n\t"\r
462                                                 "       addq            #1, d0                                  \n\t"\r
463                                                 "       move            d0, ulRegTest2Counter   \n\t"\r
464                                                 "       bra                     reg_test_2_start                \n\t"\r
465                                                 "reg_test_2_error:                                              \n\t"\r
466                                                 "       bra                     reg_test_2_error                \n\t"\r
467                                         );\r
468 }\r
469 /*-----------------------------------------------------------*/\r
470 \r
471 \r
472 \r