git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/main.c

   1 /*\r
   2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
   3     All rights reserved\r
   4 \r
   5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   6 \r
   7     ***************************************************************************\r
   8      *                                                                       *\r
   9      *    FreeRTOS provides completely free yet professionally developed,    *\r
  10      *    robust, strictly quality controlled, supported, and cross          *\r
  11      *    platform software that has become a de facto standard.             *\r
  12      *                                                                       *\r
  13      *    Help yourself get started quickly and support the FreeRTOS         *\r
  14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  16      *                                                                       *\r
  17      *    Thank you!                                                         *\r
  18      *                                                                       *\r
  19     ***************************************************************************\r
  20 \r
  21     This file is part of the FreeRTOS distribution.\r
  22 \r
  23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  24     the terms of the GNU General Public License (version 2) as published by the\r
  25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  26 \r
  27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
  28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
  29     >>!   obliged to provide the source code for proprietary components     !<<\r
  30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
  31 \r
  32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  35     link: http://www.freertos.org/a00114.html\r
  36 \r
  37     1 tab == 4 spaces!\r
  38 \r
  39     ***************************************************************************\r
  40      *                                                                       *\r
  41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  42      *    not run, what could be wrong?"                                     *\r
  43      *                                                                       *\r
  44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  45      *                                                                       *\r
  46     ***************************************************************************\r
  47 \r
  48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  49     license and Real Time Engineers Ltd. contact details.\r
  50 \r
  51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  54 \r
  55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  57     licenses offer ticketed support, indemnification and middleware.\r
  58 \r
  59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  60     engineered and independently SIL3 certified version for use in safety and\r
  61     mission critical applications that require provable dependability.\r
  62 \r
  63     1 tab == 4 spaces!\r
  64 */\r
  65 \r
  66 \r
  67 /*\r
  68  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  69  * documentation provides more details of the standard demo application tasks.\r
  70  * In addition to the standard demo tasks, the following tasks and tests are\r
  71  * defined and/or created within this file:\r
  72  *\r
  73  * "Check" task -  This only executes every five seconds but has a high priority\r
  74  * to ensure it gets processor time.  Its main function is to check that all the\r
  75  * standard demo tasks are still operational.  While no errors have been\r
  76  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  77  * rate increasing to 500ms being a visual indication that at least one task has\r
  78  * reported unexpected behaviour.\r
  79  *\r
  80  * "Reg test" tasks - These fill the registers with known values, then check\r
  81  * that each register still contains its expected value.  Each task uses\r
  82  * different values.  The tasks run with very low priority so get preempted very\r
  83  * frequently.  A register containing an unexpected value is indicative of an\r
  84  * error in the context switching mechanism.\r
  85  *\r
  86  */\r
  87 \r
  88 /* Standard includes. */\r
  89 #include <stdio.h>\r
  90 \r
  91 /* Scheduler includes. */\r
  92 #include "FreeRTOS.h"\r
  93 #include "task.h"\r
  94 #include "queue.h"\r
  95 #include "semphr.h"\r
  96 \r
  97 /* Demo app includes. */\r
  98 #include "BlockQ.h"\r
  99 #include "death.h"\r
 100 #include "integer.h"\r
 101 #include "flash.h"\r
 102 #include "partest.h"\r
 103 #include "semtest.h"\r
 104 #include "PollQ.h"\r
 105 #include "GenQTest.h"\r
 106 #include "QPeek.h"\r
 107 #include "recmutex.h"\r
 108 #include "IntQueue.h"\r
 109 #include "comtest2.h"\r
 110 \r
 111 /*-----------------------------------------------------------*/\r
 112 \r
 113 /* The time between cycles of the 'check' functionality - as described at the\r
 114 top of this file. */\r
 115 #define mainNO_ERROR_PERIOD                                     ( ( TickType_t ) 5000 / portTICK_PERIOD_MS )\r
 116 \r
 117 /* The rate at which the LED controlled by the 'check' task will flash should an\r
 118 error have been detected. */\r
 119 #define mainERROR_PERIOD                                        ( ( TickType_t ) 500 / portTICK_PERIOD_MS )\r
 120 \r
 121 /* The LED controlled by the 'check' task. */\r
 122 #define mainCHECK_LED                                           ( 3 )\r
 123 \r
 124 /* ComTest constants - there is no free LED for the comtest tasks. */\r
 125 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned long ) 19200 )\r
 126 #define mainCOM_TEST_LED                                        ( 5 )\r
 127 \r
 128 /* Task priorities. */\r
 129 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 130 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 131 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 132 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 133 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 134 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
 135 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
 136 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 137 \r
 138 /*\r
 139  * Configure the hardware for the demo.\r
 140  */\r
 141 static void prvSetupHardware( void );\r
 142 \r
 143 /*\r
 144  * Implements the 'check' task functionality as described at the top of this\r
 145  * file.\r
 146  */\r
 147 static void prvCheckTask( void *pvParameters );\r
 148 \r
 149 /*\r
 150  * Implement the 'Reg test' functionality as described at the top of this file.\r
 151  */\r
 152 static void vRegTest1Task( void *pvParameters );\r
 153 static void vRegTest2Task( void *pvParameters );\r
 154 \r
 155 /*-----------------------------------------------------------*/\r
 156 \r
 157 /* Counters used to detect errors within the reg test tasks. */\r
 158 static volatile unsigned long ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 159 \r
 160 /*-----------------------------------------------------------*/\r
 161 \r
 162 int main( void )\r
 163 {\r
 164         /* Setup the hardware ready for this demo. */\r
 165         prvSetupHardware();\r
 166 \r
 167         /* Start the standard demo tasks. */\r
 168         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 169         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 170         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 171         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 172         vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
 173         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 174         vStartQueuePeekTasks();\r
 175         vStartRecursiveMutexTasks();\r
 176         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
 177         vStartInterruptQueueTasks();\r
 178 \r
 179         /* Start the reg test tasks - defined in this file. */\r
 180         xTaskCreate( vRegTest1Task, "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 181         xTaskCreate( vRegTest2Task, "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 182 \r
 183         /* Create the check task. */\r
 184         xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 185 \r
 186         /* The suicide tasks must be created last as they need to know how many\r
 187         tasks were running prior to their creation in order to ascertain whether\r
 188         or not the correct/expected number of tasks are running at any given time. */\r
 189     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
 190 \r
 191         /* Start the scheduler. */\r
 192         vTaskStartScheduler();\r
 193 \r
 194     /* Will only get here if there was insufficient memory to create the idle\r
 195     task. */\r
 196         for( ;; );\r
 197 }\r
 198 /*-----------------------------------------------------------*/\r
 199 \r
 200 static void prvCheckTask( void *pvParameters )\r
 201 {\r
 202 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 203 TickType_t xLastExecutionTime;\r
 204 \r
 205         ( void ) pvParameters;\r
 206 \r
 207         /* Initialise the variable used to control our iteration rate prior to\r
 208         its first use. */\r
 209         xLastExecutionTime = xTaskGetTickCount();\r
 210 \r
 211         for( ;; )\r
 212         {\r
 213                 /* Wait until it is time to run the tests again. */\r
 214                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 215 \r
 216                 /* Has an error been found in any task? */\r
 217                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 218                 {\r
 219                         ulError |= 0x01UL;\r
 220                 }\r
 221 \r
 222                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 223                 {\r
 224                         ulError |= 0x02UL;\r
 225                 }\r
 226 \r
 227                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 228                 {\r
 229                         ulError |= 0x04UL;\r
 230                 }\r
 231 \r
 232                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 233             {\r
 234                 ulError |= 0x20UL;\r
 235             }\r
 236 \r
 237                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 238             {\r
 239                 ulError |= 0x40UL;\r
 240             }\r
 241 \r
 242                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
 243             {\r
 244                 ulError |= 0x80UL;\r
 245             }\r
 246 \r
 247                 if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
 248             {\r
 249                 ulError |= 0x100UL;\r
 250             }\r
 251 \r
 252                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 253             {\r
 254                 ulError |= 0x200UL;\r
 255             }\r
 256 \r
 257                 if( xAreComTestTasksStillRunning() != pdTRUE )\r
 258                 {\r
 259                 ulError |= 0x400UL;\r
 260                 }\r
 261 \r
 262                 if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
 263             {\r
 264                 ulError |= 0x800UL;\r
 265             }\r
 266 \r
 267                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 268                 {\r
 269                         ulError |= 0x1000UL;\r
 270                 }\r
 271 \r
 272                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 273                 {\r
 274                         ulError |= 0x1000UL;\r
 275                 }\r
 276 \r
 277                 ulLastRegTest1Count = ulRegTest1Counter;\r
 278                 ulLastRegTest2Count = ulRegTest2Counter;\r
 279 \r
 280                 /* If an error has been found then increase our cycle rate, and in so\r
 281                 going increase the rate at which the check task LED toggles. */\r
 282                 if( ulError != 0 )\r
 283                 {\r
 284                 ulTicksToWait = mainERROR_PERIOD;\r
 285                 }\r
 286 \r
 287                 /* Toggle the LED each itteration. */\r
 288                 vParTestToggleLED( mainCHECK_LED );\r
 289         }\r
 290 }\r
 291 /*-----------------------------------------------------------*/\r
 292 \r
 293 void prvSetupHardware( void )\r
 294 {\r
 295 extern void mcf5xxx_wr_cacr( unsigned long );\r
 296 \r
 297         portDISABLE_INTERRUPTS();\r
 298 \r
 299         /* Enable the cache. */\r
 300         mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
 301         asm volatile( "NOP" ); /* As per errata. */\r
 302 \r
 303         /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
 304         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
 305 \r
 306         /* Wait for PLL to lock. */\r
 307         while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
 308         {\r
 309                 __asm__ volatile ( "NOP" );\r
 310         }\r
 311 \r
 312         /* Setup the port used to toggle LEDs. */\r
 313         vParTestInitialise();\r
 314 }\r
 315 /*-----------------------------------------------------------*/\r
 316 \r
 317 void vApplicationStackOverflowHook( TaskHandle_t *pxTask, signed char *pcTaskName )\r
 318 {\r
 319         /* This will get called if a stack overflow is detected during the context\r
 320         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 321         problems within nested interrupts, but only do this for debug purposes as\r
 322         it will increase the context switch time. */\r
 323 \r
 324         ( void ) pxTask;\r
 325         ( void ) pcTaskName;\r
 326 \r
 327         for( ;; );\r
 328 }\r
 329 /*-----------------------------------------------------------*/\r
 330 \r
 331 static void vRegTest1Task( void *pvParameters )\r
 332 {\r
 333         /* Sanity check - did we receive the parameter expected? */\r
 334         if( pvParameters != &ulRegTest1Counter )\r
 335         {\r
 336                 /* Change here so the check task can detect that an error occurred. */\r
 337                 for( ;; );\r
 338         }\r
 339 \r
 340         /* Set all the registers to known values, then check that each retains its\r
 341         expected value - as described at the top of this file.  If an error is\r
 342         found then the loop counter will no longer be incremented allowing the check\r
 343         task to recognise the error. */\r
 344         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 345                                                 "       moveq           #1, %d0                                 \n\t"\r
 346                                                 "       moveq           #2, %d1                                 \n\t"\r
 347                                                 "       moveq           #3, %d2                                 \n\t"\r
 348                                                 "       moveq           #4, %d3                                 \n\t"\r
 349                                                 "       moveq           #5, %d4                                 \n\t"\r
 350                                                 "       moveq           #6, %d5                                 \n\t"\r
 351                                                 "       moveq           #7, %d6                                 \n\t"\r
 352                                                 "       moveq           #8, %d7                                 \n\t"\r
 353                                                 "       move            #9, %a0                                 \n\t"\r
 354                                                 "       move            #10, %a1                                \n\t"\r
 355                                                 "       move            #11, %a2                                \n\t"\r
 356                                                 "       move            #12, %a3                                \n\t"\r
 357                                                 "       move            #13, %a4                                \n\t"\r
 358                                                 "       move            #14, %a5                                \n\t"\r
 359                                                 "       move            #15, %a6                                \n\t"\r
 360                                                 "                                                                               \n\t"\r
 361                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 362                                                 "       bne                     reg_test_1_error                \n\t"\r
 363                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 364                                                 "       bne                     reg_test_1_error                \n\t"\r
 365                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 366                                                 "       bne                     reg_test_1_error                \n\t"\r
 367                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 368                                                 "       bne                     reg_test_1_error                \n\t"\r
 369                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 370                                                 "       bne                     reg_test_1_error                \n\t"\r
 371                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 372                                                 "       bne                     reg_test_1_error                \n\t"\r
 373                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 374                                                 "       bne                     reg_test_1_error                \n\t"\r
 375                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 376                                                 "       bne                     reg_test_1_error                \n\t"\r
 377                                                 "       move            %a0, %d0                                \n\t"\r
 378                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 379                                                 "       bne                     reg_test_1_error                \n\t"\r
 380                                                 "       move            %a1, %d0                                \n\t"\r
 381                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 382                                                 "       bne                     reg_test_1_error                \n\t"\r
 383                                                 "       move            %a2, %d0                                \n\t"\r
 384                                                 "       cmpi.l          #11, %d0                                \n\t"\r
 385                                                 "       bne                     reg_test_1_error                \n\t"\r
 386                                                 "       move            %a3, %d0                                \n\t"\r
 387                                                 "       cmpi.l          #12, %d0                                \n\t"\r
 388                                                 "       bne                     reg_test_1_error                \n\t"\r
 389                                                 "       move            %a4, %d0                                \n\t"\r
 390                                                 "       cmpi.l          #13, %d0                                \n\t"\r
 391                                                 "       bne                     reg_test_1_error                \n\t"\r
 392                                                 "       move            %a5, %d0                                \n\t"\r
 393                                                 "       cmpi.l          #14, %d0                                \n\t"\r
 394                                                 "       bne                     reg_test_1_error                \n\t"\r
 395                                                 "       move            %a6, %d0                                \n\t"\r
 396                                                 "       cmpi.l          #15, %d0                                \n\t"\r
 397                                                 "       bne                     reg_test_1_error                \n\t"\r
 398                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 399                                                 "       addql           #1, %d0                                 \n\t"\r
 400                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 401                                                 "       bra                     reg_test_1_start                \n\t"\r
 402                                                 "reg_test_1_error:                                              \n\t"\r
 403                                                 "       bra                     reg_test_1_error                \n\t"\r
 404                                         );\r
 405 }\r
 406 /*-----------------------------------------------------------*/\r
 407 \r
 408 static void vRegTest2Task( void *pvParameters )\r
 409 {\r
 410         /* Sanity check - did we receive the parameter expected? */\r
 411         if( pvParameters != &ulRegTest2Counter )\r
 412         {\r
 413                 /* Change here so the check task can detect that an error occurred. */\r
 414                 for( ;; );\r
 415         }\r
 416 \r
 417         /* Set all the registers to known values, then check that each retains its\r
 418         expected value - as described at the top of this file.  If an error is\r
 419         found then the loop counter will no longer be incremented allowing the check\r
 420         task to recognise the error. */\r
 421         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 422                                                 "       moveq           #10, %d0                                \n\t"\r
 423                                                 "       moveq           #20, %d1                                \n\t"\r
 424                                                 "       moveq           #30, %d2                                \n\t"\r
 425                                                 "       moveq           #40, %d3                                \n\t"\r
 426                                                 "       moveq           #50, %d4                                \n\t"\r
 427                                                 "       moveq           #60, %d5                                \n\t"\r
 428                                                 "       moveq           #70, %d6                                \n\t"\r
 429                                                 "       moveq           #80, %d7                                \n\t"\r
 430                                                 "       move            #90, %a0                                \n\t"\r
 431                                                 "       move            #100, %a1                               \n\t"\r
 432                                                 "       move            #110, %a2                               \n\t"\r
 433                                                 "       move            #120, %a3                               \n\t"\r
 434                                                 "       move            #130, %a4                               \n\t"\r
 435                                                 "       move            #140, %a5                               \n\t"\r
 436                                                 "       move            #150, %a6                               \n\t"\r
 437                                                 "                                                                               \n\t"\r
 438                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 439                                                 "       bne                     reg_test_2_error                \n\t"\r
 440                                                 "       cmpi.l          #20, %d1                                \n\t"\r
 441                                                 "       bne                     reg_test_2_error                \n\t"\r
 442                                                 "       cmpi.l          #30, %d2                                \n\t"\r
 443                                                 "       bne                     reg_test_2_error                \n\t"\r
 444                                                 "       cmpi.l          #40, %d3                                \n\t"\r
 445                                                 "       bne                     reg_test_2_error                \n\t"\r
 446                                                 "       cmpi.l          #50, %d4                                \n\t"\r
 447                                                 "       bne                     reg_test_2_error                \n\t"\r
 448                                                 "       cmpi.l          #60, %d5                                \n\t"\r
 449                                                 "       bne                     reg_test_2_error                \n\t"\r
 450                                                 "       cmpi.l          #70, %d6                                \n\t"\r
 451                                                 "       bne                     reg_test_2_error                \n\t"\r
 452                                                 "       cmpi.l          #80, %d7                                \n\t"\r
 453                                                 "       bne                     reg_test_2_error                \n\t"\r
 454                                                 "       move            %a0, %d0                                \n\t"\r
 455                                                 "       cmpi.l          #90, %d0                                \n\t"\r
 456                                                 "       bne                     reg_test_2_error                \n\t"\r
 457                                                 "       move            %a1, %d0                                \n\t"\r
 458                                                 "       cmpi.l          #100, %d0                               \n\t"\r
 459                                                 "       bne                     reg_test_2_error                \n\t"\r
 460                                                 "       move            %a2, %d0                                \n\t"\r
 461                                                 "       cmpi.l          #110, %d0                               \n\t"\r
 462                                                 "       bne                     reg_test_2_error                \n\t"\r
 463                                                 "       move            %a3, %d0                                \n\t"\r
 464                                                 "       cmpi.l          #120, %d0                               \n\t"\r
 465                                                 "       bne                     reg_test_2_error                \n\t"\r
 466                                                 "       move            %a4, %d0                                \n\t"\r
 467                                                 "       cmpi.l          #130, %d0                               \n\t"\r
 468                                                 "       bne                     reg_test_2_error                \n\t"\r
 469                                                 "       move            %a5, %d0                                \n\t"\r
 470                                                 "       cmpi.l          #140, %d0                               \n\t"\r
 471                                                 "       bne                     reg_test_2_error                \n\t"\r
 472                                                 "       move            %a6, %d0                                \n\t"\r
 473                                                 "       cmpi.l          #150, %d0                               \n\t"\r
 474                                                 "       bne                     reg_test_2_error                \n\t"\r
 475                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 476                                                 "       addql           #1, %d0                                 \n\t"\r
 477                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 478                                                 "       bra                     reg_test_2_start                \n\t"\r
 479                                                 "reg_test_2_error:                                              \n\t"\r
 480                                                 "       bra                     reg_test_2_error                \n\t"\r
 481                                         );\r
 482 }\r
 483 /*-----------------------------------------------------------*/\r
 484 \r