git.sur5r.net Git - freertos/blob - FreeRTOS/Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/main.c

   1 /*\r
   2     FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
   3 \r
   4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
   5 \r
   6     ***************************************************************************\r
   7      *                                                                       *\r
   8      *    FreeRTOS provides completely free yet professionally developed,    *\r
   9      *    robust, strictly quality controlled, supported, and cross          *\r
  10      *    platform software that has become a de facto standard.             *\r
  11      *                                                                       *\r
  12      *    Help yourself get started quickly and support the FreeRTOS         *\r
  13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
  14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
  15      *                                                                       *\r
  16      *    Thank you!                                                         *\r
  17      *                                                                       *\r
  18     ***************************************************************************\r
  19 \r
  20     This file is part of the FreeRTOS distribution.\r
  21 \r
  22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  23     the terms of the GNU General Public License (version 2) as published by the\r
  24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
  25 \r
  26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
  27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
  28     >>! the source code for proprietary components outside of the FreeRTOS\r
  29     >>! kernel.\r
  30 \r
  31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
  32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
  33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
  34     link: http://www.freertos.org/a00114.html\r
  35 \r
  36     1 tab == 4 spaces!\r
  37 \r
  38     ***************************************************************************\r
  39      *                                                                       *\r
  40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
  41      *    not run, what could be wrong?"                                     *\r
  42      *                                                                       *\r
  43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
  44      *                                                                       *\r
  45     ***************************************************************************\r
  46 \r
  47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
  48     license and Real Time Engineers Ltd. contact details.\r
  49 \r
  50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
  51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
  52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
  53 \r
  54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
  55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
  56     licenses offer ticketed support, indemnification and middleware.\r
  57 \r
  58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
  59     engineered and independently SIL3 certified version for use in safety and\r
  60     mission critical applications that require provable dependability.\r
  61 \r
  62     1 tab == 4 spaces!\r
  63 */\r
  64 \r
  65 \r
  66 /*\r
  67  * Creates all the demo application tasks, then starts the scheduler.  The WEB\r
  68  * documentation provides more details of the standard demo application tasks.\r
  69  * In addition to the standard demo tasks, the following tasks and tests are\r
  70  * defined and/or created within this file:\r
  71  *\r
  72  * "Check" task -  This only executes every five seconds but has a high priority\r
  73  * to ensure it gets processor time.  Its main function is to check that all the\r
  74  * standard demo tasks are still operational.  While no errors have been\r
  75  * discovered the check task will toggle an LED every 5 seconds - the toggle\r
  76  * rate increasing to 500ms being a visual indication that at least one task has\r
  77  * reported unexpected behaviour.\r
  78  *\r
  79  * "Reg test" tasks - These fill the registers with known values, then check\r
  80  * that each register still contains its expected value.  Each task uses\r
  81  * different values.  The tasks run with very low priority so get preempted very\r
  82  * frequently.  A register containing an unexpected value is indicative of an\r
  83  * error in the context switching mechanism.\r
  84  *\r
  85  */\r
  86 \r
  87 /* Standard includes. */\r
  88 #include <stdio.h>\r
  89 \r
  90 /* Scheduler includes. */\r
  91 #include "FreeRTOS.h"\r
  92 #include "task.h"\r
  93 #include "queue.h"\r
  94 #include "semphr.h"\r
  95 \r
  96 /* Demo app includes. */\r
  97 #include "BlockQ.h"\r
  98 #include "death.h"\r
  99 #include "integer.h"\r
 100 #include "flash.h"\r
 101 #include "partest.h"\r
 102 #include "semtest.h"\r
 103 #include "PollQ.h"\r
 104 #include "GenQTest.h"\r
 105 #include "QPeek.h"\r
 106 #include "recmutex.h"\r
 107 #include "IntQueue.h"\r
 108 #include "comtest2.h"\r
 109 \r
 110 /*-----------------------------------------------------------*/\r
 111 \r
 112 /* The time between cycles of the 'check' functionality - as described at the\r
 113 top of this file. */\r
 114 #define mainNO_ERROR_PERIOD                                     ( ( portTickType ) 5000 / portTICK_RATE_MS )\r
 115 \r
 116 /* The rate at which the LED controlled by the 'check' task will flash should an\r
 117 error have been detected. */\r
 118 #define mainERROR_PERIOD                                        ( ( portTickType ) 500 / portTICK_RATE_MS )\r
 119 \r
 120 /* The LED controlled by the 'check' task. */\r
 121 #define mainCHECK_LED                                           ( 3 )\r
 122 \r
 123 /* ComTest constants - there is no free LED for the comtest tasks. */\r
 124 #define mainCOM_TEST_BAUD_RATE                          ( ( unsigned portLONG ) 19200 )\r
 125 #define mainCOM_TEST_LED                                        ( 5 )\r
 126 \r
 127 /* Task priorities. */\r
 128 #define mainCOM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 2 )\r
 129 #define mainQUEUE_POLL_PRIORITY                         ( tskIDLE_PRIORITY + 2 )\r
 130 #define mainCHECK_TASK_PRIORITY                         ( tskIDLE_PRIORITY + 3 )\r
 131 #define mainSEM_TEST_PRIORITY                           ( tskIDLE_PRIORITY + 1 )\r
 132 #define mainBLOCK_Q_PRIORITY                            ( tskIDLE_PRIORITY + 2 )\r
 133 #define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 2 )\r
 134 #define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )\r
 135 #define mainGEN_QUEUE_TASK_PRIORITY                     ( tskIDLE_PRIORITY )\r
 136 \r
 137 /*\r
 138  * Configure the hardware for the demo.\r
 139  */\r
 140 static void prvSetupHardware( void );\r
 141 \r
 142 /*\r
 143  * Implements the 'check' task functionality as described at the top of this\r
 144  * file.\r
 145  */\r
 146 static void prvCheckTask( void *pvParameters );\r
 147 \r
 148 /*\r
 149  * Implement the 'Reg test' functionality as described at the top of this file.\r
 150  */\r
 151 static void vRegTest1Task( void *pvParameters );\r
 152 static void vRegTest2Task( void *pvParameters );\r
 153 \r
 154 /*-----------------------------------------------------------*/\r
 155 \r
 156 /* Counters used to detect errors within the reg test tasks. */\r
 157 static volatile unsigned portLONG ulRegTest1Counter = 0x11111111, ulRegTest2Counter = 0x22222222;\r
 158 \r
 159 /*-----------------------------------------------------------*/\r
 160 \r
 161 int main( void )\r
 162 {\r
 163         /* Setup the hardware ready for this demo. */\r
 164         prvSetupHardware();\r
 165 \r
 166         /* Start the standard demo tasks. */\r
 167         vStartLEDFlashTasks( tskIDLE_PRIORITY );\r
 168         vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
 169         vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
 170         vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
 171         vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );\r
 172         vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );\r
 173         vStartQueuePeekTasks();\r
 174         vStartRecursiveMutexTasks();\r
 175         vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
 176         vStartInterruptQueueTasks();\r
 177 \r
 178         /* Start the reg test tasks - defined in this file. */\r
 179         xTaskCreate( vRegTest1Task, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest1Counter, tskIDLE_PRIORITY, NULL );\r
 180         xTaskCreate( vRegTest2Task, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, ( void * ) &ulRegTest2Counter, tskIDLE_PRIORITY, NULL );\r
 181 \r
 182         /* Create the check task. */\r
 183         xTaskCreate( prvCheckTask, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );\r
 184 \r
 185         /* The suicide tasks must be created last as they need to know how many\r
 186         tasks were running prior to their creation in order to ascertain whether\r
 187         or not the correct/expected number of tasks are running at any given time. */\r
 188     vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
 189 \r
 190         /* Start the scheduler. */\r
 191         vTaskStartScheduler();\r
 192 \r
 193     /* Will only get here if there was insufficient memory to create the idle\r
 194     task. */\r
 195         for( ;; );\r
 196 }\r
 197 /*-----------------------------------------------------------*/\r
 198 \r
 199 static void prvCheckTask( void *pvParameters )\r
 200 {\r
 201 unsigned ulTicksToWait = mainNO_ERROR_PERIOD, ulError = 0, ulLastRegTest1Count = 0, ulLastRegTest2Count = 0;\r
 202 portTickType xLastExecutionTime;\r
 203 \r
 204         ( void ) pvParameters;\r
 205 \r
 206         /* Initialise the variable used to control our iteration rate prior to\r
 207         its first use. */\r
 208         xLastExecutionTime = xTaskGetTickCount();\r
 209 \r
 210         for( ;; )\r
 211         {\r
 212                 /* Wait until it is time to run the tests again. */\r
 213                 vTaskDelayUntil( &xLastExecutionTime, ulTicksToWait );\r
 214 \r
 215                 /* Has an error been found in any task? */\r
 216                 if( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
 217                 {\r
 218                         ulError |= 0x01UL;\r
 219                 }\r
 220 \r
 221                 if( xAreQueuePeekTasksStillRunning() != pdTRUE )\r
 222                 {\r
 223                         ulError |= 0x02UL;\r
 224                 }\r
 225 \r
 226                 if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
 227                 {\r
 228                         ulError |= 0x04UL;\r
 229                 }\r
 230 \r
 231                 if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
 232             {\r
 233                 ulError |= 0x20UL;\r
 234             }\r
 235 \r
 236                 if( xArePollingQueuesStillRunning() != pdTRUE )\r
 237             {\r
 238                 ulError |= 0x40UL;\r
 239             }\r
 240 \r
 241                 if( xIsCreateTaskStillRunning() != pdTRUE )\r
 242             {\r
 243                 ulError |= 0x80UL;\r
 244             }\r
 245 \r
 246                 if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
 247             {\r
 248                 ulError |= 0x100UL;\r
 249             }\r
 250 \r
 251                 if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
 252             {\r
 253                 ulError |= 0x200UL;\r
 254             }\r
 255 \r
 256                 if( xAreComTestTasksStillRunning() != pdTRUE )\r
 257                 {\r
 258                 ulError |= 0x400UL;\r
 259                 }\r
 260 \r
 261                 if( xAreIntQueueTasksStillRunning() != pdTRUE )\r
 262             {\r
 263                 ulError |= 0x800UL;\r
 264             }\r
 265 \r
 266                 if( ulLastRegTest1Count == ulRegTest1Counter )\r
 267                 {\r
 268                         ulError |= 0x1000UL;\r
 269                 }\r
 270 \r
 271                 if( ulLastRegTest2Count == ulRegTest2Counter )\r
 272                 {\r
 273                         ulError |= 0x1000UL;\r
 274                 }\r
 275 \r
 276                 ulLastRegTest1Count = ulRegTest1Counter;\r
 277                 ulLastRegTest2Count = ulRegTest2Counter;\r
 278 \r
 279                 /* If an error has been found then increase our cycle rate, and in so\r
 280                 going increase the rate at which the check task LED toggles. */\r
 281                 if( ulError != 0 )\r
 282                 {\r
 283                 ulTicksToWait = mainERROR_PERIOD;\r
 284                 }\r
 285 \r
 286                 /* Toggle the LED each itteration. */\r
 287                 vParTestToggleLED( mainCHECK_LED );\r
 288         }\r
 289 }\r
 290 /*-----------------------------------------------------------*/\r
 291 \r
 292 void prvSetupHardware( void )\r
 293 {\r
 294 extern void mcf5xxx_wr_cacr( unsigned portLONG );\r
 295 \r
 296         portDISABLE_INTERRUPTS();\r
 297 \r
 298         /* Enable the cache. */\r
 299         mcf5xxx_wr_cacr( MCF5XXX_CACR_CENB | MCF5XXX_CACR_CINV | MCF5XXX_CACR_DISD | MCF5XXX_CACR_CEIB | MCF5XXX_CACR_CLNF_00 );\r
 300         asm volatile( "NOP" ); /* As per errata. */\r
 301 \r
 302         /* Multiply 8Mhz reference crystal by 8 to achieve system clock of 64Mhz. */\r
 303         MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD( 2 );\r
 304 \r
 305         /* Wait for PLL to lock. */\r
 306         while( !( MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK ) )\r
 307         {\r
 308                 __asm__ volatile ( "NOP" );\r
 309         }\r
 310 \r
 311         /* Setup the port used to toggle LEDs. */\r
 312         vParTestInitialise();\r
 313 }\r
 314 /*-----------------------------------------------------------*/\r
 315 \r
 316 void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )\r
 317 {\r
 318         /* This will get called if a stack overflow is detected during the context\r
 319         switch.  Set configCHECK_FOR_STACK_OVERFLOWS to 2 to also check for stack\r
 320         problems within nested interrupts, but only do this for debug purposes as\r
 321         it will increase the context switch time. */\r
 322 \r
 323         ( void ) pxTask;\r
 324         ( void ) pcTaskName;\r
 325 \r
 326         for( ;; );\r
 327 }\r
 328 /*-----------------------------------------------------------*/\r
 329 \r
 330 static void vRegTest1Task( void *pvParameters )\r
 331 {\r
 332         /* Sanity check - did we receive the parameter expected? */\r
 333         if( pvParameters != &ulRegTest1Counter )\r
 334         {\r
 335                 /* Change here so the check task can detect that an error occurred. */\r
 336                 for( ;; );\r
 337         }\r
 338 \r
 339         /* Set all the registers to known values, then check that each retains its\r
 340         expected value - as described at the top of this file.  If an error is\r
 341         found then the loop counter will no longer be incremented allowing the check\r
 342         task to recognise the error. */\r
 343         asm volatile    (       "reg_test_1_start:                                              \n\t"\r
 344                                                 "       moveq           #1, %d0                                 \n\t"\r
 345                                                 "       moveq           #2, %d1                                 \n\t"\r
 346                                                 "       moveq           #3, %d2                                 \n\t"\r
 347                                                 "       moveq           #4, %d3                                 \n\t"\r
 348                                                 "       moveq           #5, %d4                                 \n\t"\r
 349                                                 "       moveq           #6, %d5                                 \n\t"\r
 350                                                 "       moveq           #7, %d6                                 \n\t"\r
 351                                                 "       moveq           #8, %d7                                 \n\t"\r
 352                                                 "       move            #9, %a0                                 \n\t"\r
 353                                                 "       move            #10, %a1                                \n\t"\r
 354                                                 "       move            #11, %a2                                \n\t"\r
 355                                                 "       move            #12, %a3                                \n\t"\r
 356                                                 "       move            #13, %a4                                \n\t"\r
 357                                                 "       move            #14, %a5                                \n\t"\r
 358                                                 "       move            #15, %a6                                \n\t"\r
 359                                                 "                                                                               \n\t"\r
 360                                                 "       cmpi.l          #1, %d0                                 \n\t"\r
 361                                                 "       bne                     reg_test_1_error                \n\t"\r
 362                                                 "       cmpi.l          #2, %d1                                 \n\t"\r
 363                                                 "       bne                     reg_test_1_error                \n\t"\r
 364                                                 "       cmpi.l          #3, %d2                                 \n\t"\r
 365                                                 "       bne                     reg_test_1_error                \n\t"\r
 366                                                 "       cmpi.l          #4, %d3                                 \n\t"\r
 367                                                 "       bne                     reg_test_1_error                \n\t"\r
 368                                                 "       cmpi.l          #5, %d4                                 \n\t"\r
 369                                                 "       bne                     reg_test_1_error                \n\t"\r
 370                                                 "       cmpi.l          #6, %d5                                 \n\t"\r
 371                                                 "       bne                     reg_test_1_error                \n\t"\r
 372                                                 "       cmpi.l          #7, %d6                                 \n\t"\r
 373                                                 "       bne                     reg_test_1_error                \n\t"\r
 374                                                 "       cmpi.l          #8, %d7                                 \n\t"\r
 375                                                 "       bne                     reg_test_1_error                \n\t"\r
 376                                                 "       move            %a0, %d0                                \n\t"\r
 377                                                 "       cmpi.l          #9, %d0                                 \n\t"\r
 378                                                 "       bne                     reg_test_1_error                \n\t"\r
 379                                                 "       move            %a1, %d0                                \n\t"\r
 380                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 381                                                 "       bne                     reg_test_1_error                \n\t"\r
 382                                                 "       move            %a2, %d0                                \n\t"\r
 383                                                 "       cmpi.l          #11, %d0                                \n\t"\r
 384                                                 "       bne                     reg_test_1_error                \n\t"\r
 385                                                 "       move            %a3, %d0                                \n\t"\r
 386                                                 "       cmpi.l          #12, %d0                                \n\t"\r
 387                                                 "       bne                     reg_test_1_error                \n\t"\r
 388                                                 "       move            %a4, %d0                                \n\t"\r
 389                                                 "       cmpi.l          #13, %d0                                \n\t"\r
 390                                                 "       bne                     reg_test_1_error                \n\t"\r
 391                                                 "       move            %a5, %d0                                \n\t"\r
 392                                                 "       cmpi.l          #14, %d0                                \n\t"\r
 393                                                 "       bne                     reg_test_1_error                \n\t"\r
 394                                                 "       move            %a6, %d0                                \n\t"\r
 395                                                 "       cmpi.l          #15, %d0                                \n\t"\r
 396                                                 "       bne                     reg_test_1_error                \n\t"\r
 397                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 398                                                 "       addql           #1, %d0                                 \n\t"\r
 399                                                 "       movel           %d0, ulRegTest1Counter  \n\t"\r
 400                                                 "       bra                     reg_test_1_start                \n\t"\r
 401                                                 "reg_test_1_error:                                              \n\t"\r
 402                                                 "       bra                     reg_test_1_error                \n\t"\r
 403                                         );\r
 404 }\r
 405 /*-----------------------------------------------------------*/\r
 406 \r
 407 static void vRegTest2Task( void *pvParameters )\r
 408 {\r
 409         /* Sanity check - did we receive the parameter expected? */\r
 410         if( pvParameters != &ulRegTest2Counter )\r
 411         {\r
 412                 /* Change here so the check task can detect that an error occurred. */\r
 413                 for( ;; );\r
 414         }\r
 415 \r
 416         /* Set all the registers to known values, then check that each retains its\r
 417         expected value - as described at the top of this file.  If an error is\r
 418         found then the loop counter will no longer be incremented allowing the check\r
 419         task to recognise the error. */\r
 420         asm volatile    (       "reg_test_2_start:                                              \n\t"\r
 421                                                 "       moveq           #10, %d0                                \n\t"\r
 422                                                 "       moveq           #20, %d1                                \n\t"\r
 423                                                 "       moveq           #30, %d2                                \n\t"\r
 424                                                 "       moveq           #40, %d3                                \n\t"\r
 425                                                 "       moveq           #50, %d4                                \n\t"\r
 426                                                 "       moveq           #60, %d5                                \n\t"\r
 427                                                 "       moveq           #70, %d6                                \n\t"\r
 428                                                 "       moveq           #80, %d7                                \n\t"\r
 429                                                 "       move            #90, %a0                                \n\t"\r
 430                                                 "       move            #100, %a1                               \n\t"\r
 431                                                 "       move            #110, %a2                               \n\t"\r
 432                                                 "       move            #120, %a3                               \n\t"\r
 433                                                 "       move            #130, %a4                               \n\t"\r
 434                                                 "       move            #140, %a5                               \n\t"\r
 435                                                 "       move            #150, %a6                               \n\t"\r
 436                                                 "                                                                               \n\t"\r
 437                                                 "       cmpi.l          #10, %d0                                \n\t"\r
 438                                                 "       bne                     reg_test_2_error                \n\t"\r
 439                                                 "       cmpi.l          #20, %d1                                \n\t"\r
 440                                                 "       bne                     reg_test_2_error                \n\t"\r
 441                                                 "       cmpi.l          #30, %d2                                \n\t"\r
 442                                                 "       bne                     reg_test_2_error                \n\t"\r
 443                                                 "       cmpi.l          #40, %d3                                \n\t"\r
 444                                                 "       bne                     reg_test_2_error                \n\t"\r
 445                                                 "       cmpi.l          #50, %d4                                \n\t"\r
 446                                                 "       bne                     reg_test_2_error                \n\t"\r
 447                                                 "       cmpi.l          #60, %d5                                \n\t"\r
 448                                                 "       bne                     reg_test_2_error                \n\t"\r
 449                                                 "       cmpi.l          #70, %d6                                \n\t"\r
 450                                                 "       bne                     reg_test_2_error                \n\t"\r
 451                                                 "       cmpi.l          #80, %d7                                \n\t"\r
 452                                                 "       bne                     reg_test_2_error                \n\t"\r
 453                                                 "       move            %a0, %d0                                \n\t"\r
 454                                                 "       cmpi.l          #90, %d0                                \n\t"\r
 455                                                 "       bne                     reg_test_2_error                \n\t"\r
 456                                                 "       move            %a1, %d0                                \n\t"\r
 457                                                 "       cmpi.l          #100, %d0                               \n\t"\r
 458                                                 "       bne                     reg_test_2_error                \n\t"\r
 459                                                 "       move            %a2, %d0                                \n\t"\r
 460                                                 "       cmpi.l          #110, %d0                               \n\t"\r
 461                                                 "       bne                     reg_test_2_error                \n\t"\r
 462                                                 "       move            %a3, %d0                                \n\t"\r
 463                                                 "       cmpi.l          #120, %d0                               \n\t"\r
 464                                                 "       bne                     reg_test_2_error                \n\t"\r
 465                                                 "       move            %a4, %d0                                \n\t"\r
 466                                                 "       cmpi.l          #130, %d0                               \n\t"\r
 467                                                 "       bne                     reg_test_2_error                \n\t"\r
 468                                                 "       move            %a5, %d0                                \n\t"\r
 469                                                 "       cmpi.l          #140, %d0                               \n\t"\r
 470                                                 "       bne                     reg_test_2_error                \n\t"\r
 471                                                 "       move            %a6, %d0                                \n\t"\r
 472                                                 "       cmpi.l          #150, %d0                               \n\t"\r
 473                                                 "       bne                     reg_test_2_error                \n\t"\r
 474                                                 "       movel           ulRegTest1Counter, %d0  \n\t"\r
 475                                                 "       addql           #1, %d0                                 \n\t"\r
 476                                                 "       movel           %d0, ulRegTest2Counter  \n\t"\r
 477                                                 "       bra                     reg_test_2_start                \n\t"\r
 478                                                 "reg_test_2_error:                                              \n\t"\r
 479                                                 "       bra                     reg_test_2_error                \n\t"\r
 480                                         );\r
 481 }\r
 482 /*-----------------------------------------------------------*/\r
 483 \r