2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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30 #include "FreeRTOSConfig.h"
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31 #include "ISR_Support.h"
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33 .extern ulRegTest1Counter
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34 .extern ulRegTest2Counter
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35 .extern dRegTest1_st7
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36 .extern dRegTest1_st6
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37 .extern dRegTest1_st5
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38 .extern dRegTest1_st4
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39 .extern dRegTest1_st3
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40 .extern dRegTest1_st2
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41 .extern dRegTest1_st1
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42 .extern dRegTest2_st7
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43 .extern dRegTest2_st6
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44 .extern dRegTest2_st5
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45 .extern dRegTest2_st4
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46 .extern dRegTest2_st3
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47 .extern dRegTest2_st2
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48 .extern dRegTest2_st1
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49 .extern vGenerateYieldInterrupt
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50 .extern vHPETIRQHandler1
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54 .global vApplicationHPETTimer1Wrapper
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56 .section .text.last /* Push up the memory to check executing from higher memory addresses. */
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62 /* Set initial values into the general purpose registers. */
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63 movl $0x11111111, %eax
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64 movl $0x22222222, %ebx
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65 movl $0x33333333, %ecx
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66 movl $0x44444444, %edx
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67 movl $0x55555555, %esi
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68 movl $0x66666666, %edi
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70 /* Set initial values into the floating point registers. */
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71 .if configSUPPORT_FPU == 1
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79 .endif /* configSUPPORT_FPU */
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83 /* Loop checking the values originally loaded into the general purpose
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84 registers remain through the life of the task. */
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85 cmp $0x11111111, %eax
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87 cmp $0x22222222, %ebx
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89 cmp $0x33333333, %ecx
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91 cmp $0x44444444, %edx
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93 cmp $0x55555555, %esi
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95 cmp $0x66666666, %edi
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99 .if configSUPPORT_FPU == 1
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100 /* Loop checking the values originally loaded into the floating point
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101 registers remain through the life of the task. */
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102 push %eax /* push clobbered register. */
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103 fldl dRegTest1_st7 /* st( 0 ) set to st( 7 ) value. */
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104 fucomp %st( 7 ) /* Compare st( 0 ) with st( 7 ) and pop. */
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105 fnstsw %ax /* Copy status word to ax. */
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106 and $0x45, %ah /* Mask bits. */
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107 xor $0x40, %ah /* test bits. */
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146 /* Restore clobbered register. */
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148 .endif /* configSUPPORT_FPU */
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150 /* Incrememnt the loop counter to prove this task has not gone into the
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151 error null loop. */
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152 add $1, ulRegTest1Counter
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160 /*-----------------------------------------------------------*/
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165 /* Set initial values into the general purpose registers. */
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166 movl $0x10101010, %eax
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167 movl $0x20202020, %ebx
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168 movl $0x30303030, %ecx
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169 movl $0x40404040, %edx
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170 movl $0x50505050, %esi
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171 movl $0x60606060, %edi
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173 /* Set initial values into the floating point registers. */
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174 .if configSUPPORT_FPU == 1
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186 /* Loop checking the values originally loaded into the general purpose
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187 registers remain through the life of the task. */
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188 cmp $0x10101010, %eax
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190 cmp $0x20202020, %ebx
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192 cmp $0x30303030, %ecx
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194 cmp $0x40404040, %edx
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196 cmp $0x50505050, %esi
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198 cmp $0x60606060, %edi
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201 .if configSUPPORT_FPU == 1
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202 /* Loop checking the values originally loaded into the floating point
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203 registers remain through the life of the task. */
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204 /* Loop checking the values originally loaded into the floating point
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205 registers remain through the life of the task. */
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206 push %eax /* push clobbered register. */
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207 fldl dRegTest2_st7 /* st( 0 ) set to st( 7 ) value. */
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208 fucomp %st( 7 ) /* Compare st( 0 ) with st( 7 ) and pop. */
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209 fnstsw %ax /* Copy status word to ax. */
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210 and $0x45, %ah /* Mask bits. */
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211 xor $0x40, %ah /* test bits. */
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250 /* Restore clobbered register. */
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253 .endif /* configSUPPORT_FPU */
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255 /* Force a yield from one of the reg test tasks to increase coverage. */
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256 call vGenerateYieldInterrupt
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258 /* Increment the loop counter to prove this task has not entered the error
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260 add $1, ulRegTest2Counter
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268 /*-----------------------------------------------------------*/
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270 /* Purely for demonstration purposes, two of the HPET timers used by the
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271 IntQueue test use the central interrupt handler, and timer 1 uses its own
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272 assembly wrapper - which is defined below. See
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273 http://www.freertos.org/RTOS_Intel_Quark_Galileo_GCC.html#interrupts for more
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275 .func vApplicationHPETTimer1Wrapper
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276 vApplicationHPETTimer1Wrapper:
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278 portFREERTOS_INTERRUPT_ENTRY
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279 call vHPETIRQHandler1
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280 portFREERTOS_INTERRUPT_EXIT
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