2 * Copyright (c) 2014, Texas Instruments Incorporated
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3 * All rights reserved.
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5 * Redistribution and use in source and binary forms, with or without
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6 * modification, are permitted provided that the following conditions
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9 * * Redistributions of source code must retain the above copyright
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10 * notice, this list of conditions and the following disclaimer.
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12 * * Redistributions in binary form must reproduce the above copyright
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13 * notice, this list of conditions and the following disclaimer in the
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14 * documentation and/or other materials provided with the distribution.
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16 * * Neither the name of Texas Instruments Incorporated nor the names of
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17 * its contributors may be used to endorse or promote products derived
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18 * from this software without specific prior written permission.
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 //*****************************************************************************
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34 // dma.c - Driver for the dma Module.
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36 //*****************************************************************************
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38 //*****************************************************************************
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40 //! \addtogroup dma_api dma
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43 //*****************************************************************************
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45 #include "inc/hw_regaccess.h"
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46 #include "inc/hw_memmap.h"
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48 #if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)
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53 void DMA_init(DMA_initParam *param){
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54 uint8_t triggerOffset = (param->channelSelect >> 4);
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56 //Reset and Set DMA Control 0 Register
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57 HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0CTL) =
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58 param->transferModeSelect //Set Transfer Mode
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59 + param->transferUnitSelect //Set Transfer Unit Size
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60 + param->triggerTypeSelect; //Set Trigger Type
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62 //Set Transfer Size Amount
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63 HWREG16(DMA_BASE + param->channelSelect + OFS_DMA0SZ) = param->transferSize;
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65 if(triggerOffset & 0x01) //Odd Channel
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67 HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0x00FF; //Reset Trigger Select
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69 (triggerOffset & 0x0E)) |= (param->triggerSourceSelect << 8);
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73 HWREG16(DMA_BASE + (triggerOffset & 0x0E)) &= 0xFF00; //Reset Trigger Select
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75 (triggerOffset & 0x0E)) |= param->triggerSourceSelect;
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79 void DMA_setTransferSize(uint8_t channelSelect,
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80 uint16_t transferSize)
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82 //Set Transfer Size Amount
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83 HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ) = transferSize;
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86 uint16_t DMA_getTransferSize(uint8_t channelSelect)
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88 //Get Transfer Size Amount
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89 return(HWREG16(DMA_BASE + channelSelect + OFS_DMA0SZ));
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92 void DMA_setSrcAddress(uint8_t channelSelect,
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93 uint32_t srcAddress,
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94 uint16_t directionSelect)
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96 //Set the Source Address
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97 __data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0SA),
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100 //Reset bits before setting them
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101 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMASRCINCR_3);
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102 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= directionSelect;
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105 void DMA_setDstAddress(uint8_t channelSelect,
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106 uint32_t dstAddress,
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107 uint16_t directionSelect)
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109 //Set the Destination Address
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110 __data16_write_addr((unsigned short)(DMA_BASE + channelSelect + OFS_DMA0DA),
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113 //Reset bits before setting them
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114 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMADSTINCR_3);
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115 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= (directionSelect << 2);
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118 void DMA_enableTransfers(uint8_t channelSelect)
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120 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAEN;
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123 void DMA_disableTransfers(uint8_t channelSelect)
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125 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAEN);
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128 void DMA_startTransfer(uint8_t channelSelect)
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130 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAREQ;
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133 void DMA_enableInterrupt(uint8_t channelSelect)
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135 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) |= DMAIE;
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138 void DMA_disableInterrupt(uint8_t channelSelect)
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140 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIE);
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143 uint16_t DMA_getInterruptStatus(uint8_t channelSelect)
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145 return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAIFG);
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148 void DMA_clearInterrupt(uint8_t channelSelect)
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150 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAIFG);
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153 uint16_t DMA_getNMIAbortStatus(uint8_t channelSelect)
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155 return (HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) & DMAABORT);
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158 void DMA_clearNMIAbort(uint8_t channelSelect)
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160 HWREG16(DMA_BASE + channelSelect + OFS_DMA0CTL) &= ~(DMAABORT);
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163 void DMA_disableTransferDuringReadModifyWrite(void)
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165 HWREG16(DMA_BASE + OFS_DMACTL4) |= DMARMWDIS;
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168 void DMA_enableTransferDuringReadModifyWrite(void)
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170 HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(DMARMWDIS);
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173 void DMA_enableRoundRobinPriority(void)
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175 HWREG16(DMA_BASE + OFS_DMACTL4) |= ROUNDROBIN;
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178 void DMA_disableRoundRobinPriority(void)
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180 HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ROUNDROBIN);
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183 void DMA_enableNMIAbort(void)
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185 HWREG16(DMA_BASE + OFS_DMACTL4) |= ENNMI;
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188 void DMA_disableNMIAbort(void)
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190 HWREG16(DMA_BASE + OFS_DMACTL4) &= ~(ENNMI);
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194 //*****************************************************************************
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196 //! Close the doxygen group for dma_api
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199 //*****************************************************************************
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