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1 /* --COPYRIGHT--,BSD\r
2  * Copyright (c) 2014, Texas Instruments Incorporated\r
3  * All rights reserved.\r
4  *\r
5  * Redistribution and use in source and binary forms, with or without\r
6  * modification, are permitted provided that the following conditions\r
7  * are met:\r
8  *\r
9  * *  Redistributions of source code must retain the above copyright\r
10  *    notice, this list of conditions and the following disclaimer.\r
11  *\r
12  * *  Redistributions in binary form must reproduce the above copyright\r
13  *    notice, this list of conditions and the following disclaimer in the\r
14  *    documentation and/or other materials provided with the distribution.\r
15  *\r
16  * *  Neither the name of Texas Instruments Incorporated nor the names of\r
17  *    its contributors may be used to endorse or promote products derived\r
18  *    from this software without specific prior written permission.\r
19  *\r
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\r
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\r
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\r
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\r
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\r
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\r
27  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\r
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\r
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
31  * --/COPYRIGHT--*/\r
32 //*****************************************************************************\r
33 //\r
34 // dma.h - Driver for the DMA Module.\r
35 //\r
36 //*****************************************************************************\r
37 \r
38 #ifndef __MSP430WARE_DMA_H__\r
39 #define __MSP430WARE_DMA_H__\r
40 \r
41 #include "inc/hw_memmap.h"\r
42 \r
43 #if defined(__MSP430_HAS_DMAX_3__) || defined(__MSP430_HAS_DMAX_6__)\r
44 \r
45 //*****************************************************************************\r
46 //\r
47 // If building with a C++ compiler, make all of the definitions in this header\r
48 // have a C binding.\r
49 //\r
50 //*****************************************************************************\r
51 #ifdef __cplusplus\r
52 extern "C"\r
53 {\r
54 #endif\r
55 \r
56 #include "inc/hw_regaccess.h"\r
57 //*****************************************************************************\r
58 //\r
59 //! \brief Used in the DMA_init() function as the param parameter.\r
60 //\r
61 //*****************************************************************************\r
62 typedef struct DMA_initParam\r
63 {\r
64     //! Is the specified channel to initialize.\r
65     //! \n Valid values are:\r
66     //! - \b DMA_CHANNEL_0\r
67     //! - \b DMA_CHANNEL_1\r
68     //! - \b DMA_CHANNEL_2\r
69     //! - \b DMA_CHANNEL_3\r
70     //! - \b DMA_CHANNEL_4\r
71     //! - \b DMA_CHANNEL_5\r
72     //! - \b DMA_CHANNEL_6\r
73     //! - \b DMA_CHANNEL_7\r
74     uint8_t channelSelect;\r
75     //! Is the transfer mode of the selected channel.\r
76     //! \n Valid values are:\r
77     //! - \b DMA_TRANSFER_SINGLE [Default]\r
78     //! - \b DMA_TRANSFER_BLOCK\r
79     //! - \b DMA_TRANSFER_BURSTBLOCK\r
80     //! - \b DMA_TRANSFER_REPEATED_SINGLE\r
81     //! - \b DMA_TRANSFER_REPEATED_BLOCK\r
82     //! - \b DMA_TRANSFER_REPEATED_BURSTBLOCK\r
83     uint16_t transferModeSelect;\r
84     //! Is the amount of transfers to complete in a block transfer mode, as\r
85     //! well as how many transfers to complete before the interrupt flag is\r
86     //! set. Valid value is between 1-65535, if 0, no transfers will occur.\r
87     uint16_t transferSize;\r
88     //! Is the source that will trigger the start of each transfer, note that\r
89     //! the sources are device specific.\r
90     //! \n Valid values are:\r
91     //! - \b DMA_TRIGGERSOURCE_0 [Default]\r
92     //! - \b DMA_TRIGGERSOURCE_1\r
93     //! - \b DMA_TRIGGERSOURCE_2\r
94     //! - \b DMA_TRIGGERSOURCE_3\r
95     //! - \b DMA_TRIGGERSOURCE_4\r
96     //! - \b DMA_TRIGGERSOURCE_5\r
97     //! - \b DMA_TRIGGERSOURCE_6\r
98     //! - \b DMA_TRIGGERSOURCE_7\r
99     //! - \b DMA_TRIGGERSOURCE_8\r
100     //! - \b DMA_TRIGGERSOURCE_9\r
101     //! - \b DMA_TRIGGERSOURCE_10\r
102     //! - \b DMA_TRIGGERSOURCE_11\r
103     //! - \b DMA_TRIGGERSOURCE_12\r
104     //! - \b DMA_TRIGGERSOURCE_13\r
105     //! - \b DMA_TRIGGERSOURCE_14\r
106     //! - \b DMA_TRIGGERSOURCE_15\r
107     //! - \b DMA_TRIGGERSOURCE_16\r
108     //! - \b DMA_TRIGGERSOURCE_17\r
109     //! - \b DMA_TRIGGERSOURCE_18\r
110     //! - \b DMA_TRIGGERSOURCE_19\r
111     //! - \b DMA_TRIGGERSOURCE_20\r
112     //! - \b DMA_TRIGGERSOURCE_21\r
113     //! - \b DMA_TRIGGERSOURCE_22\r
114     //! - \b DMA_TRIGGERSOURCE_23\r
115     //! - \b DMA_TRIGGERSOURCE_24\r
116     //! - \b DMA_TRIGGERSOURCE_25\r
117     //! - \b DMA_TRIGGERSOURCE_26\r
118     //! - \b DMA_TRIGGERSOURCE_27\r
119     //! - \b DMA_TRIGGERSOURCE_28\r
120     //! - \b DMA_TRIGGERSOURCE_29\r
121     //! - \b DMA_TRIGGERSOURCE_30\r
122     //! - \b DMA_TRIGGERSOURCE_31\r
123     uint8_t triggerSourceSelect;\r
124     //! Is the specified size of transfers.\r
125     //! \n Valid values are:\r
126     //! - \b DMA_SIZE_SRCWORD_DSTWORD [Default]\r
127     //! - \b DMA_SIZE_SRCBYTE_DSTWORD\r
128     //! - \b DMA_SIZE_SRCWORD_DSTBYTE\r
129     //! - \b DMA_SIZE_SRCBYTE_DSTBYTE\r
130     uint8_t transferUnitSelect;\r
131     //! Is the type of trigger that the trigger signal needs to be to start a\r
132     //! transfer.\r
133     //! \n Valid values are:\r
134     //! - \b DMA_TRIGGER_RISINGEDGE [Default]\r
135     //! - \b DMA_TRIGGER_HIGH\r
136     uint8_t triggerTypeSelect;\r
137 } DMA_initParam;\r
138 \r
139 //*****************************************************************************\r
140 //\r
141 // The following are values that can be passed to the triggerSourceSelect\r
142 // parameter for functions: DMA_init(); the param parameter for functions:\r
143 // DMA_init().\r
144 //\r
145 //*****************************************************************************\r
146 #define DMA_TRIGGERSOURCE_0                                              (0x00)\r
147 #define DMA_TRIGGERSOURCE_1                                              (0x01)\r
148 #define DMA_TRIGGERSOURCE_2                                              (0x02)\r
149 #define DMA_TRIGGERSOURCE_3                                              (0x03)\r
150 #define DMA_TRIGGERSOURCE_4                                              (0x04)\r
151 #define DMA_TRIGGERSOURCE_5                                              (0x05)\r
152 #define DMA_TRIGGERSOURCE_6                                              (0x06)\r
153 #define DMA_TRIGGERSOURCE_7                                              (0x07)\r
154 #define DMA_TRIGGERSOURCE_8                                              (0x08)\r
155 #define DMA_TRIGGERSOURCE_9                                              (0x09)\r
156 #define DMA_TRIGGERSOURCE_10                                             (0x0A)\r
157 #define DMA_TRIGGERSOURCE_11                                             (0x0B)\r
158 #define DMA_TRIGGERSOURCE_12                                             (0x0C)\r
159 #define DMA_TRIGGERSOURCE_13                                             (0x0D)\r
160 #define DMA_TRIGGERSOURCE_14                                             (0x0E)\r
161 #define DMA_TRIGGERSOURCE_15                                             (0x0F)\r
162 #define DMA_TRIGGERSOURCE_16                                             (0x10)\r
163 #define DMA_TRIGGERSOURCE_17                                             (0x11)\r
164 #define DMA_TRIGGERSOURCE_18                                             (0x12)\r
165 #define DMA_TRIGGERSOURCE_19                                             (0x13)\r
166 #define DMA_TRIGGERSOURCE_20                                             (0x14)\r
167 #define DMA_TRIGGERSOURCE_21                                             (0x15)\r
168 #define DMA_TRIGGERSOURCE_22                                             (0x16)\r
169 #define DMA_TRIGGERSOURCE_23                                             (0x17)\r
170 #define DMA_TRIGGERSOURCE_24                                             (0x18)\r
171 #define DMA_TRIGGERSOURCE_25                                             (0x19)\r
172 #define DMA_TRIGGERSOURCE_26                                             (0x1A)\r
173 #define DMA_TRIGGERSOURCE_27                                             (0x1B)\r
174 #define DMA_TRIGGERSOURCE_28                                             (0x1C)\r
175 #define DMA_TRIGGERSOURCE_29                                             (0x1D)\r
176 #define DMA_TRIGGERSOURCE_30                                             (0x1E)\r
177 #define DMA_TRIGGERSOURCE_31                                             (0x1F)\r
178 \r
179 //*****************************************************************************\r
180 //\r
181 // The following are values that can be passed to the param parameter for\r
182 // functions: DMA_init(); the transferModeSelect parameter for functions:\r
183 // DMA_init().\r
184 //\r
185 //*****************************************************************************\r
186 #define DMA_TRANSFER_SINGLE                                           (DMADT_0)\r
187 #define DMA_TRANSFER_BLOCK                                            (DMADT_1)\r
188 #define DMA_TRANSFER_BURSTBLOCK                                       (DMADT_2)\r
189 #define DMA_TRANSFER_REPEATED_SINGLE                                  (DMADT_4)\r
190 #define DMA_TRANSFER_REPEATED_BLOCK                                   (DMADT_5)\r
191 #define DMA_TRANSFER_REPEATED_BURSTBLOCK                              (DMADT_6)\r
192 \r
193 //*****************************************************************************\r
194 //\r
195 // The following are values that can be passed to the channelSelect parameter\r
196 // for functions: DMA_init(), DMA_setTransferSize(), DMA_getTransferSize(),\r
197 // DMA_setSrcAddress(), DMA_setDstAddress(), DMA_enableTransfers(),\r
198 // DMA_disableTransfers(), DMA_startTransfer(), DMA_enableInterrupt(),\r
199 // DMA_disableInterrupt(), DMA_getInterruptStatus(), DMA_clearInterrupt(),\r
200 // DMA_getNMIAbortStatus(), and DMA_clearNMIAbort(); the param parameter for\r
201 // functions: DMA_init().\r
202 //\r
203 //*****************************************************************************\r
204 #define DMA_CHANNEL_0                                                    (0x00)\r
205 #define DMA_CHANNEL_1                                                    (0x10)\r
206 #define DMA_CHANNEL_2                                                    (0x20)\r
207 #define DMA_CHANNEL_3                                                    (0x30)\r
208 #define DMA_CHANNEL_4                                                    (0x40)\r
209 #define DMA_CHANNEL_5                                                    (0x50)\r
210 #define DMA_CHANNEL_6                                                    (0x60)\r
211 #define DMA_CHANNEL_7                                                    (0x70)\r
212 \r
213 //*****************************************************************************\r
214 //\r
215 // The following are values that can be passed to the triggerTypeSelect\r
216 // parameter for functions: DMA_init(); the param parameter for functions:\r
217 // DMA_init().\r
218 //\r
219 //*****************************************************************************\r
220 #define DMA_TRIGGER_RISINGEDGE                                    (!(DMALEVEL))\r
221 #define DMA_TRIGGER_HIGH                                             (DMALEVEL)\r
222 \r
223 //*****************************************************************************\r
224 //\r
225 // The following are values that can be passed to the transferUnitSelect\r
226 // parameter for functions: DMA_init(); the param parameter for functions:\r
227 // DMA_init().\r
228 //\r
229 //*****************************************************************************\r
230 #define DMA_SIZE_SRCWORD_DSTWORD                   (!(DMASRCBYTE + DMADSTBYTE))\r
231 #define DMA_SIZE_SRCBYTE_DSTWORD                                   (DMASRCBYTE)\r
232 #define DMA_SIZE_SRCWORD_DSTBYTE                                   (DMADSTBYTE)\r
233 #define DMA_SIZE_SRCBYTE_DSTBYTE                      (DMASRCBYTE + DMADSTBYTE)\r
234 \r
235 //*****************************************************************************\r
236 //\r
237 // The following are values that can be passed to the directionSelect parameter\r
238 // for functions: DMA_setSrcAddress(), and DMA_setDstAddress().\r
239 //\r
240 //*****************************************************************************\r
241 #define DMA_DIRECTION_UNCHANGED                                  (DMASRCINCR_0)\r
242 #define DMA_DIRECTION_DECREMENT                                  (DMASRCINCR_2)\r
243 #define DMA_DIRECTION_INCREMENT                                  (DMASRCINCR_3)\r
244 \r
245 //*****************************************************************************\r
246 //\r
247 // The following are values that can be passed toThe following are values that\r
248 // can be returned by the DMA_getInterruptStatus() function.\r
249 //\r
250 //*****************************************************************************\r
251 #define DMA_INT_INACTIVE                                                  (0x0)\r
252 #define DMA_INT_ACTIVE                                                 (DMAIFG)\r
253 \r
254 //*****************************************************************************\r
255 //\r
256 // The following are values that can be passed toThe following are values that\r
257 // can be returned by the DMA_getNMIAbortStatus() function.\r
258 //\r
259 //*****************************************************************************\r
260 #define DMA_NOTABORTED                                                    (0x0)\r
261 #define DMA_ABORTED                                                  (DMAABORT)\r
262 \r
263 //*****************************************************************************\r
264 //\r
265 // Prototypes for the APIs.\r
266 //\r
267 //*****************************************************************************\r
268 \r
269 //*****************************************************************************\r
270 //\r
271 //! \brief Initializes the specified DMA channel.\r
272 //!\r
273 //! This function initializes the specified DMA channel. Upon successful\r
274 //! completion of initialization of the selected channel the control registers\r
275 //! will be cleared and the given variables will be set. Please note, if\r
276 //! transfers have been enabled with the enableTransfers() function, then a\r
277 //! call to disableTransfers() is necessary before re-initialization. Also\r
278 //! note, that the trigger sources are device dependent and can be found in the\r
279 //! device family data sheet. The amount of DMA channels available are also\r
280 //! device specific.\r
281 //!\r
282 //! \param param is the pointer to struct for initialization.\r
283 //!\r
284 //! \return STATUS_SUCCESS or STATUS_FAILURE of the initialization process.\r
285 //\r
286 //*****************************************************************************\r
287 extern void DMA_init(DMA_initParam *param);\r
288 \r
289 //*****************************************************************************\r
290 //\r
291 //! \brief Sets the specified amount of transfers for the selected DMA channel.\r
292 //!\r
293 //! This function sets the specified amount of transfers for the selected DMA\r
294 //! channel without having to reinitialize the DMA channel.\r
295 //!\r
296 //! \param channelSelect is the specified channel to set source address\r
297 //!        direction for.\r
298 //!        Valid values are:\r
299 //!        - \b DMA_CHANNEL_0\r
300 //!        - \b DMA_CHANNEL_1\r
301 //!        - \b DMA_CHANNEL_2\r
302 //!        - \b DMA_CHANNEL_3\r
303 //!        - \b DMA_CHANNEL_4\r
304 //!        - \b DMA_CHANNEL_5\r
305 //!        - \b DMA_CHANNEL_6\r
306 //!        - \b DMA_CHANNEL_7\r
307 //! \param transferSize is the amount of transfers to complete in a block\r
308 //!        transfer mode, as well as how many transfers to complete before the\r
309 //!        interrupt flag is set. Valid value is between 1-65535, if 0, no\r
310 //!        transfers will occur.\r
311 //!        \n Modified bits are \b DMAxSZ of \b DMAxSZ register.\r
312 //!\r
313 //! \return None\r
314 //\r
315 //*****************************************************************************\r
316 extern void DMA_setTransferSize(uint8_t channelSelect,\r
317                                 uint16_t transferSize);\r
318 \r
319 //*****************************************************************************\r
320 //\r
321 //! \brief Gets the amount of transfers for the selected DMA channel.\r
322 //!\r
323 //! This function gets the amount of transfers for the selected DMA channel\r
324 //! without having to reinitialize the DMA channel.\r
325 //!\r
326 //! \param channelSelect is the specified channel to set source address\r
327 //!        direction for.\r
328 //!        Valid values are:\r
329 //!        - \b DMA_CHANNEL_0\r
330 //!        - \b DMA_CHANNEL_1\r
331 //!        - \b DMA_CHANNEL_2\r
332 //!        - \b DMA_CHANNEL_3\r
333 //!        - \b DMA_CHANNEL_4\r
334 //!        - \b DMA_CHANNEL_5\r
335 //!        - \b DMA_CHANNEL_6\r
336 //!        - \b DMA_CHANNEL_7\r
337 //!\r
338 //! \return the amount of transfers\r
339 //\r
340 //*****************************************************************************\r
341 extern uint16_t DMA_getTransferSize(uint8_t channelSelect);\r
342 \r
343 //*****************************************************************************\r
344 //\r
345 //! \brief Sets source address and the direction that the source address will\r
346 //! move after a transfer.\r
347 //!\r
348 //! This function sets the source address and the direction that the source\r
349 //! address will move after a transfer is complete. It may be incremented,\r
350 //! decremented or unchanged.\r
351 //!\r
352 //! \param channelSelect is the specified channel to set source address\r
353 //!        direction for.\r
354 //!        Valid values are:\r
355 //!        - \b DMA_CHANNEL_0\r
356 //!        - \b DMA_CHANNEL_1\r
357 //!        - \b DMA_CHANNEL_2\r
358 //!        - \b DMA_CHANNEL_3\r
359 //!        - \b DMA_CHANNEL_4\r
360 //!        - \b DMA_CHANNEL_5\r
361 //!        - \b DMA_CHANNEL_6\r
362 //!        - \b DMA_CHANNEL_7\r
363 //! \param srcAddress is the address of where the data will be transferred\r
364 //!        from.\r
365 //!        \n Modified bits are \b DMAxSA of \b DMAxSA register.\r
366 //! \param directionSelect is the specified direction of the source address\r
367 //!        after a transfer.\r
368 //!        Valid values are:\r
369 //!        - \b DMA_DIRECTION_UNCHANGED\r
370 //!        - \b DMA_DIRECTION_DECREMENT\r
371 //!        - \b DMA_DIRECTION_INCREMENT\r
372 //!        \n Modified bits are \b DMASRCINCR of \b DMAxCTL register.\r
373 //!\r
374 //! \return None\r
375 //\r
376 //*****************************************************************************\r
377 extern void DMA_setSrcAddress(uint8_t channelSelect,\r
378                               uint32_t srcAddress,\r
379                               uint16_t directionSelect);\r
380 \r
381 //*****************************************************************************\r
382 //\r
383 //! \brief Sets the destination address and the direction that the destination\r
384 //! address will move after a transfer.\r
385 //!\r
386 //! This function sets the destination address and the direction that the\r
387 //! destination address will move after a transfer is complete. It may be\r
388 //! incremented, decremented, or unchanged.\r
389 //!\r
390 //! \param channelSelect is the specified channel to set the destination\r
391 //!        address direction for.\r
392 //!        Valid values are:\r
393 //!        - \b DMA_CHANNEL_0\r
394 //!        - \b DMA_CHANNEL_1\r
395 //!        - \b DMA_CHANNEL_2\r
396 //!        - \b DMA_CHANNEL_3\r
397 //!        - \b DMA_CHANNEL_4\r
398 //!        - \b DMA_CHANNEL_5\r
399 //!        - \b DMA_CHANNEL_6\r
400 //!        - \b DMA_CHANNEL_7\r
401 //! \param dstAddress is the address of where the data will be transferred to.\r
402 //!        \n Modified bits are \b DMAxDA of \b DMAxDA register.\r
403 //! \param directionSelect is the specified direction of the destination\r
404 //!        address after a transfer.\r
405 //!        Valid values are:\r
406 //!        - \b DMA_DIRECTION_UNCHANGED\r
407 //!        - \b DMA_DIRECTION_DECREMENT\r
408 //!        - \b DMA_DIRECTION_INCREMENT\r
409 //!        \n Modified bits are \b DMADSTINCR of \b DMAxCTL register.\r
410 //!\r
411 //! \return None\r
412 //\r
413 //*****************************************************************************\r
414 extern void DMA_setDstAddress(uint8_t channelSelect,\r
415                               uint32_t dstAddress,\r
416                               uint16_t directionSelect);\r
417 \r
418 //*****************************************************************************\r
419 //\r
420 //! \brief Enables transfers to be triggered.\r
421 //!\r
422 //! This function enables transfers upon appropriate trigger of the selected\r
423 //! trigger source for the selected channel.\r
424 //!\r
425 //! \param channelSelect is the specified channel to enable transfer for.\r
426 //!        Valid values are:\r
427 //!        - \b DMA_CHANNEL_0\r
428 //!        - \b DMA_CHANNEL_1\r
429 //!        - \b DMA_CHANNEL_2\r
430 //!        - \b DMA_CHANNEL_3\r
431 //!        - \b DMA_CHANNEL_4\r
432 //!        - \b DMA_CHANNEL_5\r
433 //!        - \b DMA_CHANNEL_6\r
434 //!        - \b DMA_CHANNEL_7\r
435 //!\r
436 //! \return None\r
437 //\r
438 //*****************************************************************************\r
439 extern void DMA_enableTransfers(uint8_t channelSelect);\r
440 \r
441 //*****************************************************************************\r
442 //\r
443 //! \brief Disables transfers from being triggered.\r
444 //!\r
445 //! This function disables transfer from being triggered for the selected\r
446 //! channel. This function should be called before any re-initialization of the\r
447 //! selected DMA channel.\r
448 //!\r
449 //! \param channelSelect is the specified channel to disable transfers for.\r
450 //!        Valid values are:\r
451 //!        - \b DMA_CHANNEL_0\r
452 //!        - \b DMA_CHANNEL_1\r
453 //!        - \b DMA_CHANNEL_2\r
454 //!        - \b DMA_CHANNEL_3\r
455 //!        - \b DMA_CHANNEL_4\r
456 //!        - \b DMA_CHANNEL_5\r
457 //!        - \b DMA_CHANNEL_6\r
458 //!        - \b DMA_CHANNEL_7\r
459 //!\r
460 //! \return None\r
461 //\r
462 //*****************************************************************************\r
463 extern void DMA_disableTransfers(uint8_t channelSelect);\r
464 \r
465 //*****************************************************************************\r
466 //\r
467 //! \brief Starts a transfer if using the default trigger source selected in\r
468 //! initialization.\r
469 //!\r
470 //! This functions triggers a transfer of data from source to destination if\r
471 //! the trigger source chosen from initialization is the DMA_TRIGGERSOURCE_0.\r
472 //! Please note, this function needs to be called for each (repeated-)single\r
473 //! transfer, and when transferAmount of transfers have been complete in\r
474 //! (repeated-)block transfers.\r
475 //!\r
476 //! \param channelSelect is the specified channel to start transfers for.\r
477 //!        Valid values are:\r
478 //!        - \b DMA_CHANNEL_0\r
479 //!        - \b DMA_CHANNEL_1\r
480 //!        - \b DMA_CHANNEL_2\r
481 //!        - \b DMA_CHANNEL_3\r
482 //!        - \b DMA_CHANNEL_4\r
483 //!        - \b DMA_CHANNEL_5\r
484 //!        - \b DMA_CHANNEL_6\r
485 //!        - \b DMA_CHANNEL_7\r
486 //!\r
487 //! \return None\r
488 //\r
489 //*****************************************************************************\r
490 extern void DMA_startTransfer(uint8_t channelSelect);\r
491 \r
492 //*****************************************************************************\r
493 //\r
494 //! \brief Enables the DMA interrupt for the selected channel.\r
495 //!\r
496 //! Enables the DMA interrupt source.  Only the sources that are enabled can be\r
497 //! reflected to the processor interrupt; disabled sources have no effect on\r
498 //! the processor. Does not clear interrupt flags.\r
499 //!\r
500 //! \param channelSelect is the specified channel to enable the interrupt for.\r
501 //!        Valid values are:\r
502 //!        - \b DMA_CHANNEL_0\r
503 //!        - \b DMA_CHANNEL_1\r
504 //!        - \b DMA_CHANNEL_2\r
505 //!        - \b DMA_CHANNEL_3\r
506 //!        - \b DMA_CHANNEL_4\r
507 //!        - \b DMA_CHANNEL_5\r
508 //!        - \b DMA_CHANNEL_6\r
509 //!        - \b DMA_CHANNEL_7\r
510 //!\r
511 //! \return None\r
512 //\r
513 //*****************************************************************************\r
514 extern void DMA_enableInterrupt(uint8_t channelSelect);\r
515 \r
516 //*****************************************************************************\r
517 //\r
518 //! \brief Disables the DMA interrupt for the selected channel.\r
519 //!\r
520 //! Disables the DMA interrupt source. Only the sources that are enabled can be\r
521 //! reflected to the processor interrupt; disabled sources have no effect on\r
522 //! the processor.\r
523 //!\r
524 //! \param channelSelect is the specified channel to disable the interrupt for.\r
525 //!        Valid values are:\r
526 //!        - \b DMA_CHANNEL_0\r
527 //!        - \b DMA_CHANNEL_1\r
528 //!        - \b DMA_CHANNEL_2\r
529 //!        - \b DMA_CHANNEL_3\r
530 //!        - \b DMA_CHANNEL_4\r
531 //!        - \b DMA_CHANNEL_5\r
532 //!        - \b DMA_CHANNEL_6\r
533 //!        - \b DMA_CHANNEL_7\r
534 //!\r
535 //! \return None\r
536 //\r
537 //*****************************************************************************\r
538 extern void DMA_disableInterrupt(uint8_t channelSelect);\r
539 \r
540 //*****************************************************************************\r
541 //\r
542 //! \brief Returns the status of the interrupt flag for the selected channel.\r
543 //!\r
544 //! Returns the status of the interrupt flag for the selected channel.\r
545 //!\r
546 //! \param channelSelect is the specified channel to return the interrupt flag\r
547 //!        status from.\r
548 //!        Valid values are:\r
549 //!        - \b DMA_CHANNEL_0\r
550 //!        - \b DMA_CHANNEL_1\r
551 //!        - \b DMA_CHANNEL_2\r
552 //!        - \b DMA_CHANNEL_3\r
553 //!        - \b DMA_CHANNEL_4\r
554 //!        - \b DMA_CHANNEL_5\r
555 //!        - \b DMA_CHANNEL_6\r
556 //!        - \b DMA_CHANNEL_7\r
557 //!\r
558 //! \return One of the following:\r
559 //!         - \b DMA_INT_INACTIVE\r
560 //!         - \b DMA_INT_ACTIVE\r
561 //!         \n indicating the status of the current interrupt flag\r
562 //\r
563 //*****************************************************************************\r
564 extern uint16_t DMA_getInterruptStatus(uint8_t channelSelect);\r
565 \r
566 //*****************************************************************************\r
567 //\r
568 //! \brief Clears the interrupt flag for the selected channel.\r
569 //!\r
570 //! This function clears the DMA interrupt flag is cleared, so that it no\r
571 //! longer asserts.\r
572 //!\r
573 //! \param channelSelect is the specified channel to clear the interrupt flag\r
574 //!        for.\r
575 //!        Valid values are:\r
576 //!        - \b DMA_CHANNEL_0\r
577 //!        - \b DMA_CHANNEL_1\r
578 //!        - \b DMA_CHANNEL_2\r
579 //!        - \b DMA_CHANNEL_3\r
580 //!        - \b DMA_CHANNEL_4\r
581 //!        - \b DMA_CHANNEL_5\r
582 //!        - \b DMA_CHANNEL_6\r
583 //!        - \b DMA_CHANNEL_7\r
584 //!\r
585 //! \return None\r
586 //\r
587 //*****************************************************************************\r
588 extern void DMA_clearInterrupt(uint8_t channelSelect);\r
589 \r
590 //*****************************************************************************\r
591 //\r
592 //! \brief Returns the status of the NMIAbort for the selected channel.\r
593 //!\r
594 //! This function returns the status of the NMI Abort flag for the selected\r
595 //! channel. If this flag has been set, it is because a transfer on this\r
596 //! channel was aborted due to a interrupt from an NMI.\r
597 //!\r
598 //! \param channelSelect is the specified channel to return the status of the\r
599 //!        NMI Abort flag for.\r
600 //!        Valid values are:\r
601 //!        - \b DMA_CHANNEL_0\r
602 //!        - \b DMA_CHANNEL_1\r
603 //!        - \b DMA_CHANNEL_2\r
604 //!        - \b DMA_CHANNEL_3\r
605 //!        - \b DMA_CHANNEL_4\r
606 //!        - \b DMA_CHANNEL_5\r
607 //!        - \b DMA_CHANNEL_6\r
608 //!        - \b DMA_CHANNEL_7\r
609 //!\r
610 //! \return One of the following:\r
611 //!         - \b DMA_NOTABORTED\r
612 //!         - \b DMA_ABORTED\r
613 //!         \n indicating the status of the NMIAbort for the selected channel\r
614 //\r
615 //*****************************************************************************\r
616 extern uint16_t DMA_getNMIAbortStatus(uint8_t channelSelect);\r
617 \r
618 //*****************************************************************************\r
619 //\r
620 //! \brief Clears the status of the NMIAbort to proceed with transfers for the\r
621 //! selected channel.\r
622 //!\r
623 //! This function clears the status of the NMI Abort flag for the selected\r
624 //! channel to allow for transfers on the channel to continue.\r
625 //!\r
626 //! \param channelSelect is the specified channel to clear the NMI Abort flag\r
627 //!        for.\r
628 //!        Valid values are:\r
629 //!        - \b DMA_CHANNEL_0\r
630 //!        - \b DMA_CHANNEL_1\r
631 //!        - \b DMA_CHANNEL_2\r
632 //!        - \b DMA_CHANNEL_3\r
633 //!        - \b DMA_CHANNEL_4\r
634 //!        - \b DMA_CHANNEL_5\r
635 //!        - \b DMA_CHANNEL_6\r
636 //!        - \b DMA_CHANNEL_7\r
637 //!\r
638 //! \return None\r
639 //\r
640 //*****************************************************************************\r
641 extern void DMA_clearNMIAbort(uint8_t channelSelect);\r
642 \r
643 //*****************************************************************************\r
644 //\r
645 //! \brief Disables the DMA from stopping the CPU during a Read-Modify-Write\r
646 //! Operation to start a transfer.\r
647 //!\r
648 //! This function allows the CPU to finish any read-modify-write operations it\r
649 //! may be in the middle of before transfers of and DMA channel stop the CPU.\r
650 //!\r
651 //!\r
652 //! \return None\r
653 //\r
654 //*****************************************************************************\r
655 extern void DMA_disableTransferDuringReadModifyWrite(void);\r
656 \r
657 //*****************************************************************************\r
658 //\r
659 //! \brief Enables the DMA to stop the CPU during a Read-Modify-Write Operation\r
660 //! to start a transfer.\r
661 //!\r
662 //! This function allows the DMA to stop the CPU in the middle of a read-\r
663 //! modify-write operation to transfer data.\r
664 //!\r
665 //!\r
666 //! \return None\r
667 //\r
668 //*****************************************************************************\r
669 extern void DMA_enableTransferDuringReadModifyWrite(void);\r
670 \r
671 //*****************************************************************************\r
672 //\r
673 //! \brief Enables Round Robin prioritization.\r
674 //!\r
675 //! This function enables Round Robin Prioritization of DMA channels. In the\r
676 //! case of Round Robin Prioritization, the last DMA channel to have\r
677 //! transferred data then has the last priority, which comes into play when\r
678 //! multiple DMA channels are ready to transfer at the same time.\r
679 //!\r
680 //!\r
681 //! \return None\r
682 //\r
683 //*****************************************************************************\r
684 extern void DMA_enableRoundRobinPriority(void);\r
685 \r
686 //*****************************************************************************\r
687 //\r
688 //! \brief Disables Round Robin prioritization.\r
689 //!\r
690 //! This function disables Round Robin Prioritization, enabling static\r
691 //! prioritization of the DMA channels. In static prioritization, the DMA\r
692 //! channels are prioritized with the lowest DMA channel index having the\r
693 //! highest priority (i.e. DMA Channel 0 has the highest priority).\r
694 //!\r
695 //!\r
696 //! \return None\r
697 //\r
698 //*****************************************************************************\r
699 extern void DMA_disableRoundRobinPriority(void);\r
700 \r
701 //*****************************************************************************\r
702 //\r
703 //! \brief Enables a NMI to interrupt a DMA transfer.\r
704 //!\r
705 //! This function allow NMI's to interrupting any DMA transfer currently in\r
706 //! progress and stops any future transfers to begin before the NMI is done\r
707 //! processing.\r
708 //!\r
709 //!\r
710 //! \return None\r
711 //\r
712 //*****************************************************************************\r
713 extern void DMA_enableNMIAbort(void);\r
714 \r
715 //*****************************************************************************\r
716 //\r
717 //! \brief Disables any NMI from interrupting a DMA transfer.\r
718 //!\r
719 //! This function disables NMI's from interrupting any DMA transfer currently\r
720 //! in progress.\r
721 //!\r
722 //!\r
723 //! \return None\r
724 //\r
725 //*****************************************************************************\r
726 extern void DMA_disableNMIAbort(void);\r
727 \r
728 //*****************************************************************************\r
729 //\r
730 // Mark the end of the C bindings section for C++ compilers.\r
731 //\r
732 //*****************************************************************************\r
733 #ifdef __cplusplus\r
734 }\r
735 #endif\r
736 \r
737 #endif\r
738 #endif // __MSP430WARE_DMA_H__\r