2 * Copyright (c) 2014, Texas Instruments Incorporated
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3 * All rights reserved.
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5 * Redistribution and use in source and binary forms, with or without
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6 * modification, are permitted provided that the following conditions
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9 * * Redistributions of source code must retain the above copyright
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10 * notice, this list of conditions and the following disclaimer.
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12 * * Redistributions in binary form must reproduce the above copyright
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13 * notice, this list of conditions and the following disclaimer in the
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14 * documentation and/or other materials provided with the distribution.
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16 * * Neither the name of Texas Instruments Incorporated nor the names of
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17 * its contributors may be used to endorse or promote products derived
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18 * from this software without specific prior written permission.
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 //*****************************************************************************
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34 // eusci_a_uart.h - Driver for the EUSCI_A_UART Module.
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36 //*****************************************************************************
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38 #ifndef __MSP430WARE_EUSCI_A_UART_H__
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39 #define __MSP430WARE_EUSCI_A_UART_H__
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41 #include "inc/hw_memmap.h"
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43 #ifdef __MSP430_HAS_EUSCI_Ax__
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45 //*****************************************************************************
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47 // If building with a C++ compiler, make all of the definitions in this header
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48 // have a C binding.
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50 //*****************************************************************************
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56 #include "inc/hw_regaccess.h"
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57 //*****************************************************************************
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59 // The following values are the sync characters possible.
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61 //*****************************************************************************
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62 #define DEFAULT_SYNC 0x00
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63 #define EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC 0x55
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65 //*****************************************************************************
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67 //! \brief Used in the EUSCI_A_UART_init() function as the param parameter.
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69 //*****************************************************************************
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70 typedef struct EUSCI_A_UART_initParam
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72 //! Selects Clock source.
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73 //! \n Valid values are:
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74 //! - \b EUSCI_A_UART_CLOCKSOURCE_SMCLK
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75 //! - \b EUSCI_A_UART_CLOCKSOURCE_ACLK
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76 uint8_t selectClockSource;
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77 //! Is the value to be written into UCBRx bits
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78 uint16_t clockPrescalar;
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79 //! Is First modulation stage register setting. This value is a pre-
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80 //! calculated value which can be obtained from the Device Users Guide.
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81 //! This value is written into UCBRFx bits of UCAxMCTLW.
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82 uint8_t firstModReg;
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83 //! Is Second modulation stage register setting. This value is a pre-
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84 //! calculated value which can be obtained from the Device Users Guide.
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85 //! This value is written into UCBRSx bits of UCAxMCTLW.
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86 uint8_t secondModReg;
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87 //! Is the desired parity.
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88 //! \n Valid values are:
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89 //! - \b EUSCI_A_UART_NO_PARITY [Default]
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90 //! - \b EUSCI_A_UART_ODD_PARITY
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91 //! - \b EUSCI_A_UART_EVEN_PARITY
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93 //! Controls direction of receive and transmit shift register.
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94 //! \n Valid values are:
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95 //! - \b EUSCI_A_UART_MSB_FIRST
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96 //! - \b EUSCI_A_UART_LSB_FIRST [Default]
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97 uint16_t msborLsbFirst;
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98 //! Indicates one/two STOP bits
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99 //! \n Valid values are:
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100 //! - \b EUSCI_A_UART_ONE_STOP_BIT [Default]
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101 //! - \b EUSCI_A_UART_TWO_STOP_BITS
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102 uint16_t numberofStopBits;
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103 //! Selects the mode of operation
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104 //! \n Valid values are:
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105 //! - \b EUSCI_A_UART_MODE [Default]
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106 //! - \b EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE
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107 //! - \b EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE
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108 //! - \b EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE
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110 //! Indicates low frequency or oversampling baud generation
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111 //! \n Valid values are:
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112 //! - \b EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION
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113 //! - \b EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION
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114 uint8_t overSampling;
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115 } EUSCI_A_UART_initParam;
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117 //*****************************************************************************
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119 // The following are values that can be passed to the param parameter for
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120 // functions: EUSCI_A_UART_init().
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122 //*****************************************************************************
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123 #define EUSCI_A_UART_NO_PARITY 0x00
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124 #define EUSCI_A_UART_ODD_PARITY 0x01
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125 #define EUSCI_A_UART_EVEN_PARITY 0x02
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127 //*****************************************************************************
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129 // The following are values that can be passed to the param parameter for
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130 // functions: EUSCI_A_UART_init().
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132 //*****************************************************************************
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133 #define EUSCI_A_UART_MSB_FIRST UCMSB
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134 #define EUSCI_A_UART_LSB_FIRST 0x00
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136 //*****************************************************************************
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138 // The following are values that can be passed to the param parameter for
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139 // functions: EUSCI_A_UART_init().
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141 //*****************************************************************************
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142 #define EUSCI_A_UART_MODE UCMODE_0
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143 #define EUSCI_A_UART_IDLE_LINE_MULTI_PROCESSOR_MODE UCMODE_1
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144 #define EUSCI_A_UART_ADDRESS_BIT_MULTI_PROCESSOR_MODE UCMODE_2
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145 #define EUSCI_A_UART_AUTOMATIC_BAUDRATE_DETECTION_MODE UCMODE_3
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147 //*****************************************************************************
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149 // The following are values that can be passed to the param parameter for
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150 // functions: EUSCI_A_UART_init().
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152 //*****************************************************************************
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153 #define EUSCI_A_UART_CLOCKSOURCE_SMCLK UCSSEL__SMCLK
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154 #define EUSCI_A_UART_CLOCKSOURCE_ACLK UCSSEL__ACLK
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156 //*****************************************************************************
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158 // The following are values that can be passed to the param parameter for
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159 // functions: EUSCI_A_UART_init().
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161 //*****************************************************************************
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162 #define EUSCI_A_UART_ONE_STOP_BIT 0x00
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163 #define EUSCI_A_UART_TWO_STOP_BITS UCSPB
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165 //*****************************************************************************
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167 // The following are values that can be passed to the param parameter for
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168 // functions: EUSCI_A_UART_init().
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170 //*****************************************************************************
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171 #define EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION 0x01
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172 #define EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION 0x00
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174 //*****************************************************************************
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176 // The following are values that can be passed to the mask parameter for
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177 // functions: EUSCI_A_UART_enableInterrupt(), and
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178 // EUSCI_A_UART_disableInterrupt().
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180 //*****************************************************************************
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181 #define EUSCI_A_UART_RECEIVE_INTERRUPT UCRXIE
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182 #define EUSCI_A_UART_TRANSMIT_INTERRUPT UCTXIE
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183 #define EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT UCRXEIE
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184 #define EUSCI_A_UART_BREAKCHAR_INTERRUPT UCBRKIE
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185 #define EUSCI_A_UART_STARTBIT_INTERRUPT UCSTTIE
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186 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT UCTXCPTIE
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188 //*****************************************************************************
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190 // The following are values that can be passed to the mask parameter for
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191 // functions: EUSCI_A_UART_getInterruptStatus(), and
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192 // EUSCI_A_UART_clearInterrupt() as well as returned by the
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193 // EUSCI_A_UART_getInterruptStatus() function.
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195 //*****************************************************************************
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196 #define EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG UCRXIFG
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197 #define EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG UCTXIFG
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198 #define EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG UCSTTIFG
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199 #define EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG UCTXCPTIFG
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201 //*****************************************************************************
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203 // The following are values that can be passed to the mask parameter for
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204 // functions: EUSCI_A_UART_queryStatusFlags() as well as returned by the
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205 // EUSCI_A_UART_queryStatusFlags() function.
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207 //*****************************************************************************
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208 #define EUSCI_A_UART_LISTEN_ENABLE UCLISTEN
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209 #define EUSCI_A_UART_FRAMING_ERROR UCFE
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210 #define EUSCI_A_UART_OVERRUN_ERROR UCOE
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211 #define EUSCI_A_UART_PARITY_ERROR UCPE
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212 #define EUSCI_A_UART_BREAK_DETECT UCBRK
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213 #define EUSCI_A_UART_RECEIVE_ERROR UCRXERR
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214 #define EUSCI_A_UART_ADDRESS_RECEIVED UCADDR
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215 #define EUSCI_A_UART_IDLELINE UCIDLE
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216 #define EUSCI_A_UART_BUSY UCBUSY
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218 //*****************************************************************************
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220 // The following are values that can be passed to the deglitchTime parameter
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221 // for functions: EUSCI_A_UART_selectDeglitchTime().
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223 //*****************************************************************************
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224 #define EUSCI_A_UART_DEGLITCH_TIME_2ns 0x00
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225 #define EUSCI_A_UART_DEGLITCH_TIME_50ns UCGLIT0
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226 #define EUSCI_A_UART_DEGLITCH_TIME_100ns UCGLIT1
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227 #define EUSCI_A_UART_DEGLITCH_TIME_200ns (UCGLIT0 + UCGLIT1)
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229 //*****************************************************************************
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231 // Prototypes for the APIs.
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233 //*****************************************************************************
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235 //*****************************************************************************
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237 //! \brief Advanced initialization routine for the UART block. The values to be
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238 //! written into the clockPrescalar, firstModReg, secondModReg and overSampling
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239 //! parameters should be pre-computed and passed into the initialization
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242 //! Upon successful initialization of the UART block, this function will have
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243 //! initialized the module, but the UART block still remains disabled and must
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244 //! be enabled with EUSCI_A_UART_enable(). To calculate values for
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245 //! clockPrescalar, firstModReg, secondModReg and overSampling please use the
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248 //! http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
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250 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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251 //! \param param is the pointer to struct for initialization.
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253 //! Modified bits are \b UCPEN, \b UCPAR, \b UCMSB, \b UC7BIT, \b UCSPB, \b
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254 //! UCMODEx and \b UCSYNC of \b UCAxCTL0 register; bits \b UCSSELx and \b
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255 //! UCSWRST of \b UCAxCTL1 register.
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257 //! \return STATUS_SUCCESS or STATUS_FAIL of the initialization process
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259 //*****************************************************************************
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260 extern bool EUSCI_A_UART_init(uint16_t baseAddress,
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261 EUSCI_A_UART_initParam *param);
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263 //*****************************************************************************
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265 //! \brief Transmits a byte from the UART Module.
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267 //! This function will place the supplied data into UART transmit data register
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268 //! to start transmission
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270 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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271 //! \param transmitData data to be transmitted from the UART module
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273 //! Modified bits of \b UCAxTXBUF register.
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277 //*****************************************************************************
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278 extern void EUSCI_A_UART_transmitData(uint16_t baseAddress,
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279 uint8_t transmitData);
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281 //*****************************************************************************
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283 //! \brief Receives a byte that has been sent to the UART Module.
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285 //! This function reads a byte of data from the UART receive data Register.
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287 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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289 //! Modified bits of \b UCAxRXBUF register.
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291 //! \return Returns the byte received from by the UART module, cast as an
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294 //*****************************************************************************
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295 extern uint8_t EUSCI_A_UART_receiveData(uint16_t baseAddress);
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297 //*****************************************************************************
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299 //! \brief Enables individual UART interrupt sources.
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301 //! Enables the indicated UART interrupt sources. The interrupt flag is first
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302 //! and then the corresponding interrupt is enabled. Only the sources that are
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303 //! enabled can be reflected to the processor interrupt; disabled sources have
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304 //! no effect on the processor. Does not clear interrupt flags.
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306 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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307 //! \param mask is the bit mask of the interrupt sources to be enabled.
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308 //! Mask value is the logical OR of any of the following:
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309 //! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
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310 //! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
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311 //! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
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312 //! erroneous-character interrupt enable
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313 //! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
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314 //! interrupt enable
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315 //! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
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317 //! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
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318 //! interrupt enable
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320 //! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
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324 //*****************************************************************************
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325 extern void EUSCI_A_UART_enableInterrupt(uint16_t baseAddress,
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328 //*****************************************************************************
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330 //! \brief Disables individual UART interrupt sources.
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332 //! Disables the indicated UART interrupt sources. Only the sources that are
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333 //! enabled can be reflected to the processor interrupt; disabled sources have
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334 //! no effect on the processor.
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336 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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337 //! \param mask is the bit mask of the interrupt sources to be disabled.
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338 //! Mask value is the logical OR of any of the following:
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339 //! - \b EUSCI_A_UART_RECEIVE_INTERRUPT - Receive interrupt
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340 //! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT - Transmit interrupt
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341 //! - \b EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT - Receive
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342 //! erroneous-character interrupt enable
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343 //! - \b EUSCI_A_UART_BREAKCHAR_INTERRUPT - Receive break character
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344 //! interrupt enable
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345 //! - \b EUSCI_A_UART_STARTBIT_INTERRUPT - Start bit received interrupt
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347 //! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT - Transmit complete
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348 //! interrupt enable
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350 //! Modified bits of \b UCAxCTL1 register and bits of \b UCAxIE register.
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354 //*****************************************************************************
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355 extern void EUSCI_A_UART_disableInterrupt(uint16_t baseAddress,
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358 //*****************************************************************************
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360 //! \brief Gets the current UART interrupt status.
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362 //! This returns the interrupt status for the UART module based on which flag
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365 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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366 //! \param mask is the masked interrupt flag status to be returned.
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367 //! Mask value is the logical OR of any of the following:
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368 //! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
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369 //! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
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370 //! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
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371 //! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
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373 //! Modified bits of \b UCAxIFG register.
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375 //! \return Logical OR of any of the following:
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376 //! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
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377 //! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
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378 //! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
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379 //! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
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380 //! \n indicating the status of the masked flags
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382 //*****************************************************************************
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383 extern uint8_t EUSCI_A_UART_getInterruptStatus(uint16_t baseAddress,
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386 //*****************************************************************************
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388 //! \brief Clears UART interrupt sources.
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390 //! The UART interrupt source is cleared, so that it no longer asserts. The
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391 //! highest interrupt flag is automatically cleared when an interrupt vector
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392 //! generator is used.
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394 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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395 //! \param mask is a bit mask of the interrupt sources to be cleared.
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396 //! Mask value is the logical OR of any of the following:
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397 //! - \b EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG
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398 //! - \b EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG
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399 //! - \b EUSCI_A_UART_STARTBIT_INTERRUPT_FLAG
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400 //! - \b EUSCI_A_UART_TRANSMIT_COMPLETE_INTERRUPT_FLAG
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402 //! Modified bits of \b UCAxIFG register.
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406 //*****************************************************************************
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407 extern void EUSCI_A_UART_clearInterrupt(uint16_t baseAddress,
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410 //*****************************************************************************
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412 //! \brief Enables the UART block.
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414 //! This will enable operation of the UART block.
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416 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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418 //! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
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422 //*****************************************************************************
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423 extern void EUSCI_A_UART_enable(uint16_t baseAddress);
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425 //*****************************************************************************
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427 //! \brief Disables the UART block.
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429 //! This will disable operation of the UART block.
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431 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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433 //! Modified bits are \b UCSWRST of \b UCAxCTL1 register.
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437 //*****************************************************************************
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438 extern void EUSCI_A_UART_disable(uint16_t baseAddress);
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440 //*****************************************************************************
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442 //! \brief Gets the current UART status flags.
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444 //! This returns the status for the UART module based on which flag is passed.
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446 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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447 //! \param mask is the masked interrupt flag status to be returned.
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448 //! Mask value is the logical OR of any of the following:
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449 //! - \b EUSCI_A_UART_LISTEN_ENABLE
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450 //! - \b EUSCI_A_UART_FRAMING_ERROR
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451 //! - \b EUSCI_A_UART_OVERRUN_ERROR
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452 //! - \b EUSCI_A_UART_PARITY_ERROR
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453 //! - \b EUSCI_A_UART_BREAK_DETECT
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454 //! - \b EUSCI_A_UART_RECEIVE_ERROR
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455 //! - \b EUSCI_A_UART_ADDRESS_RECEIVED
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456 //! - \b EUSCI_A_UART_IDLELINE
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457 //! - \b EUSCI_A_UART_BUSY
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459 //! Modified bits of \b UCAxSTAT register.
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461 //! \return Logical OR of any of the following:
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462 //! - \b EUSCI_A_UART_LISTEN_ENABLE
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463 //! - \b EUSCI_A_UART_FRAMING_ERROR
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464 //! - \b EUSCI_A_UART_OVERRUN_ERROR
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465 //! - \b EUSCI_A_UART_PARITY_ERROR
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466 //! - \b EUSCI_A_UART_BREAK_DETECT
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467 //! - \b EUSCI_A_UART_RECEIVE_ERROR
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468 //! - \b EUSCI_A_UART_ADDRESS_RECEIVED
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469 //! - \b EUSCI_A_UART_IDLELINE
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470 //! - \b EUSCI_A_UART_BUSY
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471 //! \n indicating the status of the masked interrupt flags
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473 //*****************************************************************************
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474 extern uint8_t EUSCI_A_UART_queryStatusFlags(uint16_t baseAddress,
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477 //*****************************************************************************
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479 //! \brief Sets the UART module in dormant mode
\r
481 //! Puts USCI in sleep mode Only characters that are preceded by an idle-line
\r
482 //! or with address bit set UCRXIFG. In UART mode with automatic baud-rate
\r
483 //! detection, only the combination of a break and sync field sets UCRXIFG.
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485 //! \param baseAddress is the base address of the EUSCI_A_UART module.
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487 //! Modified bits of \b UCAxCTL1 register.
\r
491 //*****************************************************************************
\r
492 extern void EUSCI_A_UART_setDormant(uint16_t baseAddress);
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494 //*****************************************************************************
\r
496 //! \brief Re-enables UART module from dormant mode
\r
498 //! Not dormant. All received characters set UCRXIFG.
\r
500 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
502 //! Modified bits are \b UCDORM of \b UCAxCTL1 register.
\r
506 //*****************************************************************************
\r
507 extern void EUSCI_A_UART_resetDormant(uint16_t baseAddress);
\r
509 //*****************************************************************************
\r
511 //! \brief Transmits the next byte to be transmitted marked as address
\r
512 //! depending on selected multiprocessor mode
\r
514 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
515 //! \param transmitAddress is the next byte to be transmitted
\r
517 //! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
\r
521 //*****************************************************************************
\r
522 extern void EUSCI_A_UART_transmitAddress(uint16_t baseAddress,
\r
523 uint8_t transmitAddress);
\r
525 //*****************************************************************************
\r
527 //! \brief Transmit break.
\r
529 //! Transmits a break with the next write to the transmit buffer. In UART mode
\r
530 //! with automatic baud-rate detection,
\r
531 //! EUSCI_A_UART_AUTOMATICBAUDRATE_SYNC(0x55) must be written into UCAxTXBUF to
\r
532 //! generate the required break/sync fields. Otherwise, DEFAULT_SYNC(0x00) must
\r
533 //! be written into the transmit buffer. Also ensures module is ready for
\r
534 //! transmitting the next data.
\r
536 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
538 //! Modified bits of \b UCAxTXBUF register and bits of \b UCAxCTL1 register.
\r
542 //*****************************************************************************
\r
543 extern void EUSCI_A_UART_transmitBreak(uint16_t baseAddress);
\r
545 //*****************************************************************************
\r
547 //! \brief Returns the address of the RX Buffer of the UART for the DMA module.
\r
549 //! Returns the address of the UART RX Buffer. This can be used in conjunction
\r
550 //! with the DMA to store the received data directly to memory.
\r
552 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
554 //! \return Address of RX Buffer
\r
556 //*****************************************************************************
\r
557 extern uint32_t EUSCI_A_UART_getReceiveBufferAddress(uint16_t baseAddress);
\r
559 //*****************************************************************************
\r
561 //! \brief Returns the address of the TX Buffer of the UART for the DMA module.
\r
563 //! Returns the address of the UART TX Buffer. This can be used in conjunction
\r
564 //! with the DMA to obtain transmitted data directly from memory.
\r
566 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
568 //! \return Address of TX Buffer
\r
570 //*****************************************************************************
\r
571 extern uint32_t EUSCI_A_UART_getTransmitBufferAddress(uint16_t baseAddress);
\r
573 //*****************************************************************************
\r
575 //! \brief Sets the deglitch time
\r
577 //! \param baseAddress is the base address of the EUSCI_A_UART module.
\r
578 //! \param deglitchTime is the selected deglitch time
\r
579 //! Valid values are:
\r
580 //! - \b EUSCI_A_UART_DEGLITCH_TIME_2ns
\r
581 //! - \b EUSCI_A_UART_DEGLITCH_TIME_50ns
\r
582 //! - \b EUSCI_A_UART_DEGLITCH_TIME_100ns
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583 //! - \b EUSCI_A_UART_DEGLITCH_TIME_200ns
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587 //*****************************************************************************
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588 extern void EUSCI_A_UART_selectDeglitchTime(uint16_t baseAddress,
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589 uint16_t deglitchTime);
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591 //*****************************************************************************
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593 // Mark the end of the C bindings section for C++ compilers.
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595 //*****************************************************************************
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601 #endif // __MSP430WARE_EUSCI_A_UART_H__
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