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32 /*****************************************************************************/
36 * @addtogroup intc_v3_4
40 * The Xilinx interrupt controller driver component. This component supports the
41 * Xilinx interrupt controller.
43 * The interrupt controller driver uses the idea of priority for the various
44 * handlers. Priority is an integer within the range of 0 and 31 inclusive with
45 * 0 being the highest priority interrupt source.
47 * The Xilinx interrupt controller supports the following features:
49 * - specific individual interrupt enabling/disabling
50 * - specific individual interrupt acknowledging
51 * - attaching specific callback function to handle interrupt source
52 * - master enable/disable
53 * - single callback per interrupt or all pending interrupts handled for
54 * each interrupt of the processor
56 * The acknowledgement of the interrupt within the interrupt controller is
57 * selectable, either prior to the device's handler being called or after
58 * the handler is called. This is necessary to support interrupt signal inputs
59 * which are either edge or level signals. Edge driven interrupt signals
60 * require that the interrupt is acknowledged prior to the interrupt being
61 * serviced in order to prevent the loss of interrupts which are occurring
62 * extremely close together. A level driven interrupt input signal requires
63 * the interrupt to acknowledged after servicing the interrupt to ensure that
64 * the interrupt only generates a single interrupt condition.
66 * Details about connecting the interrupt handler of the driver are contained
67 * in the source file specific to interrupt processing, xintc_intr.c.
69 * This driver is intended to be RTOS and processor independent. It works with
70 * physical addresses only. Any needs for dynamic memory management, threads
71 * or thread mutual exclusion, virtual memory, or cache control must be
72 * satisfied by the layer above this driver.
74 * <b>Interrupt Vector Tables</b>
76 * The interrupt vector table for each interrupt controller device is declared
77 * statically in xintc_g.c within the configuration data for each instance.
78 * The device ID of the interrupt controller device is used by the driver as a
79 * direct index into the configuration data table - to retrieve the vector table
80 * for an instance of the interrupt controller. The user should populate the
81 * vector table with handlers and callbacks at run-time using the XIntc_Connect()
82 * and XIntc_Disconnect() functions.
84 * Each vector table entry corresponds to a device that can generate an
85 * interrupt. Each entry contains an interrupt handler function and an argument
86 * to be passed to the handler when an interrupt occurs. The tools default this
87 * argument to the base address of the interrupting device. Note that the
88 * device driver interrupt handlers given in this file do not take a base
89 * address as an argument, but instead take a pointer to the driver instance.
90 * This means that although the table is created statically, the user must still
91 * use XIntc_Connect() when the interrupt handler takes an argument other than
92 * the base address. This is only to say that the existence of the static vector
93 * tables should not mislead the user into thinking they no longer need to
94 * register/connect interrupt handlers with this driver.
97 * MODIFICATION HISTORY:
99 * Ver Who Date Changes
100 * ----- ---- -------- -------------------------------------------------------
101 * 1.00a ecm 08/16/01 First release
102 * 1.00a rpm 01/09/02 Removed the AckLocation argument from XIntc_Connect().
103 * This information is now internal in xintc_g.c.
104 * 1.00b jhl 02/13/02 Repartitioned the driver for smaller files
105 * 1.00b jhl 04/24/02 Made LookupConfig function global and relocated config
107 * 1.00c rpm 10/17/03 New release. Support the static vector table created
108 * in the xintc_g.c configuration table. Moved vector
109 * table and options out of instance structure and into
110 * the configuration table.
111 * 1.10c mta 03/21/07 Updated to new coding style
112 * 1.11a sv 11/21/07 Updated driver to support access through a DCR bridge
113 * 2.00a ktn 10/20/09 Updated to use HAL Processor APIs and _m is removed from
114 * all the macro names/definitions.
115 * 2.01a sdm 04/27/10 Updated the tcl so that the defintions are generated in
116 * the xparameters.h to know whether the optional registers
117 * SIE, CIE and IVR are enabled in the HW - Refer CR 555392.
118 * This driver doesnot make use of these definitions and does
119 * not use the optional registers.
120 * 2.03a hvm 05/24/11 Updated the tcl to generate vector Ids for external
121 * interrupts. CR565336
122 * 2.04a bss 01/13/12 Added XIntc_ConnectFastHandler API for Fast Interrupt
123 * and XIntc_SetNormalIntrMode for setting to normal
125 * 2.04a asa 03/19/12 Changed the XIntc_Config struct. The order of entries
126 * declared in the structure now matches with the
127 * XIntc_ConfigTable generated by the driver tcl.
128 * 2.05a bss 08/16/12 Updated to support relocatable vectors in Microblaze,
129 * added IntVectorAddr to XIntc_Config for this.
130 * Added XIntc_RegisterFastHandler API to register fast
131 * interrupt handlers using base address.
132 * 2.06a bss 01/28/13 To support Cascade mode:
133 * Added XIN_INTC_NOCASCADE,XIN_INTC_PRIMARY,
134 * XIN_INTC_SECONDARY,XIN_INTC_LAST and
135 * XIN_CONTROLLER_MAX_INTRS macros
136 * Added NumberofIntrs and IntcType fields in XIntc_Config
138 * Modified XIntc_Initialize,XIntc_Start,XIntc_Connect
139 * XIntc_Disconnect,XIntc_Enable,XIntc_Disable,
140 * XIntc_Acknowledge,XIntc_ConnectFastHandler and
141 * XIntc_SetNormalIntrMode APIs.Added XIntc_InitializeSlaves
143 * Modified XIntc_DeviceInterruptHandler,
144 * XIntc_SetIntrSvcOption,XIntc_RegisterHandler and
145 * XIntc_RegisterFastHandler APIs.Added XIntc_CascadeHandler
147 * Modified XIntc_SetOptions API in xintc_options.c.
148 * Modified XIntc_SimulateIntr API in xintc_selftest.c.
149 * Modified driver tcl:
150 * to check for Cascade mode and generate XPAR_INTC_TYPE
151 * for each controller.
152 * Generate XPAR_INTC_MAX_NUM_INTR_INPUTS by adding all
153 * interrupt sources of all Controllers in Cascade mode.
154 * 2.07a bss 10/18/13 To support Nested interrupts:
155 * Modified XIntc_DeviceInterruptHandler API.
156 * Added XIN_ILR_OFFSET macro in xintc_l.h.
157 * Modified driver tcl to generate HAS_ILR parameter in
159 * 3.0 bss 01/28/13 Modified xintc.c to initialize IVAR register with
160 * XPAR_MICROBLAZE_BASE_VECTORS + 0x10 to fix
162 * Modified driver tcl to generate XPAR_AXI_INTC_0_TYPE
163 * correctly(CR#764865).
166 * For Cascade mode, Interrupt IDs are generated in xparameters.h
169 * Master/Primary INTC
171 * | |-0 Secondary INTC
173 * | |-. | |-32 Last INTC
175 * |______|<-31------| |-. | |-64
177 * |______|<-63-------| |-.
181 * All driver functions has to be called using DeviceId/
182 * InstancePtr/BaseAddress of Primary/Master Controller and
183 * Interrupts IDs generated in xparameters.h only.
184 * Driver functions takes care of Slave Controllers based on
185 * Interrupt ID passed. User must not use Interrupt source/ID
186 * 31 of Primary and Secondary controllers to call driver
189 * For nested interrupts, XIntc_DeviceInterruptHandler saves
190 * microblaze r14 register on entry and restores on exit. This is
191 * required since compiler does not support nesting. It enables
192 * Microblaze interrupts after blocking further interrupts from
193 * the current interrupt number and interrupts below current
194 * interrupt proirity by writing to Interrupt Level Register of
195 * INTC on entry. On exit, it disables microblaze interrupts and
196 * restores ILR register default value(0xFFFFFFFF)back. It is
197 * recommended to increase STACK_SIZE in linker script for nested
199 * 3.0 adk 12/10/13 Updated as per the New Tcl API's
200 * 3.0 adk 17/02/14 Fixed the CR:771287 Changes are made in the intc
202 * 3.1 adk 8/4/14 Fixed the CR:783248 Changes are made in
204 * 3.2 bss 4/8/14 Fixed driver tcl to handle external interrupt pins
205 * correctly (CR#799609).
206 * 3.3 adk 11/3/14 added generation of C_HAS_ILR parameter to
207 * xparameters.h.Changes are made in the driver tcl file
209 * 3.5 sk 11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
213 ******************************************************************************/
215 #ifndef XINTC_H /* prevent circular inclusions */
216 #define XINTC_H /* by using protection macros */
223 /***************************** Include Files *********************************/
225 #include "xil_types.h"
226 #include "xil_assert.h"
227 #include "xparameters.h"
231 /************************** Constant Definitions *****************************/
234 * @name Configuration options
235 * These options are used in XIntc_SetOptions() to configure the device.
240 * XIN_SVC_SGL_ISR_OPTION Service the highest priority pending interrupt
242 * XIN_SVC_ALL_ISRS_OPTION Service all of the pending interrupts and then
246 #define XIN_SVC_SGL_ISR_OPTION 1UL
247 #define XIN_SVC_ALL_ISRS_OPTION 2UL
252 * One of these values is passed to XIntc_Start() to start the device.
255 /** Simulation only mode, no hardware interrupts recognized */
256 #define XIN_SIMULATION_MODE 0
257 /** Real mode, no simulation allowed, hardware interrupts recognized */
258 #define XIN_REAL_MODE 1
262 * @name Masks to specify Interrupt Controller Mode
265 #define XIN_INTC_NOCASCADE 0 /* Normal - No Cascade Mode */
266 #define XIN_INTC_PRIMARY 1 /* Master/Primary controller */
267 #define XIN_INTC_SECONDARY 2 /* Secondary Slave Controllers */
268 #define XIN_INTC_LAST 3 /* Last Slave Controller */
273 * @name Mask to specify maximum number of interrupt sources per controller
276 #define XIN_CONTROLLER_MAX_INTRS 32 /* Each Controller has 32
280 /**************************** Type Definitions *******************************/
283 * This typedef contains configuration information for the device.
286 u16 DeviceId; /**< Unique ID of device */
287 UINTPTR BaseAddress; /**< Register base address */
288 u32 AckBeforeService; /**< Ack location per interrupt */
289 int FastIntr; /**< Fast Interrupt enabled */
290 u32 IntVectorAddr; /**< Interrupt Vector Address */
291 int NumberofIntrs; /**< Number of Interrupt sources */
292 u32 Options; /**< Device options */
293 int IntcType; /**< Intc type 0 - No Cascade Mode
295 2 - secondary instance
298 /** Static vector table of interrupt handlers */
299 #if XPAR_INTC_0_INTC_TYPE != XIN_INTC_NOCASCADE
300 XIntc_VectorTableEntry HandlerTable[XIN_CONTROLLER_MAX_INTRS];
302 XIntc_VectorTableEntry HandlerTable[XPAR_INTC_MAX_NUM_INTR_INPUTS];
308 * The XIntc driver instance data. The user is required to allocate a
309 * variable of this type for every intc device in the system. A pointer
310 * to a variable of this type is then passed to the driver API functions.
313 UINTPTR BaseAddress; /**< Base address of registers */
314 u32 IsReady; /**< Device is initialized and ready */
315 u32 IsStarted; /**< Device has been started */
316 u32 UnhandledInterrupts; /**< Intc Statistics */
317 XIntc_Config *CfgPtr; /**< Pointer to instance config entry */
321 /***************** Macros (Inline Functions) Definitions *********************/
323 /************************** Function Prototypes ******************************/
326 * Required functions in xintc.c
328 int XIntc_Initialize(XIntc * InstancePtr, u16 DeviceId);
330 int XIntc_Start(XIntc * InstancePtr, u8 Mode);
331 void XIntc_Stop(XIntc * InstancePtr);
333 int XIntc_Connect(XIntc * InstancePtr, u8 Id,
334 XInterruptHandler Handler, void *CallBackRef);
335 void XIntc_Disconnect(XIntc * InstancePtr, u8 Id);
337 void XIntc_Enable(XIntc * InstancePtr, u8 Id);
338 void XIntc_Disable(XIntc * InstancePtr, u8 Id);
340 void XIntc_Acknowledge(XIntc * InstancePtr, u8 Id);
342 XIntc_Config *XIntc_LookupConfig(u16 DeviceId);
344 int XIntc_ConnectFastHandler(XIntc *InstancePtr, u8 Id,
345 XFastInterruptHandler Handler);
346 void XIntc_SetNormalIntrMode(XIntc *InstancePtr, u8 Id);
349 * Interrupt functions in xintr_intr.c
351 void XIntc_VoidInterruptHandler(void);
352 void XIntc_InterruptHandler(XIntc * InstancePtr);
355 * Options functions in xintc_options.c
357 int XIntc_SetOptions(XIntc * InstancePtr, u32 Options);
358 u32 XIntc_GetOptions(XIntc * InstancePtr);
361 * Self-test functions in xintc_selftest.c
363 int XIntc_SelfTest(XIntc * InstancePtr);
364 int XIntc_SimulateIntr(XIntc * InstancePtr, u8 Id);
370 #endif /* end of protection macro */