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Update version numbers in preparation for V8.2.0 release candidate 1.
[freertos] / FreeRTOS / Demo / MicroBlaze_Spartan-6_EthernetLite / SDKProjects / RTOSDemo / RegisterTests.c
1 /*\r
2     FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     This file is part of the FreeRTOS distribution.\r
8 \r
9     FreeRTOS is free software; you can redistribute it and/or modify it under\r
10     the terms of the GNU General Public License (version 2) as published by the\r
11     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
12 \r
13     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
14     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
15     >>!   obliged to provide the source code for proprietary components     !<<\r
16     >>!   outside of the FreeRTOS kernel.                                   !<<\r
17 \r
18     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
19     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
20     FOR A PARTICULAR PURPOSE.  Full license text is available on the following\r
21     link: http://www.freertos.org/a00114.html\r
22 \r
23     1 tab == 4 spaces!\r
24 \r
25     ***************************************************************************\r
26      *                                                                       *\r
27      *    Having a problem?  Start by reading the FAQ "My application does   *\r
28      *    not run, what could be wrong?".  Have you defined configASSERT()?  *\r
29      *                                                                       *\r
30      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
31      *                                                                       *\r
32     ***************************************************************************\r
33 \r
34     ***************************************************************************\r
35      *                                                                       *\r
36      *    FreeRTOS provides completely free yet professionally developed,    *\r
37      *    robust, strictly quality controlled, supported, and cross          *\r
38      *    platform software that is more than just the market leader, it     *\r
39      *    is the industry's de facto standard.                               *\r
40      *                                                                       *\r
41      *    Help yourself get started quickly while simultaneously helping     *\r
42      *    to support the FreeRTOS project by purchasing a FreeRTOS           *\r
43      *    tutorial book, reference manual, or both:                          *\r
44      *    http://www.FreeRTOS.org/Documentation                              *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     ***************************************************************************\r
49      *                                                                       *\r
50      *   Investing in training allows your team to be as productive as       *\r
51      *   possible as early as possible, lowering your overall development    *\r
52      *   cost, and enabling you to bring a more robust product to market     *\r
53      *   earlier than would otherwise be possible.  Richard Barry is both    *\r
54      *   the architect and key author of FreeRTOS, and so also the world's   *\r
55      *   leading authority on what is the world's most popular real time     *\r
56      *   kernel for deeply embedded MCU designs.  Obtaining your training    *\r
57      *   from Richard ensures your team will gain directly from his in-depth *\r
58      *   product knowledge and years of usage experience.  Contact Real Time *\r
59      *   Engineers Ltd to enquire about the FreeRTOS Masterclass, presented  *\r
60      *   by Richard Barry:  http://www.FreeRTOS.org/contact\r
61      *                                                                       *\r
62     ***************************************************************************\r
63 \r
64     ***************************************************************************\r
65      *                                                                       *\r
66      *    You are receiving this top quality software for free.  Please play *\r
67      *    fair and reciprocate by reporting any suspected issues and         *\r
68      *    participating in the community forum:                              *\r
69      *    http://www.FreeRTOS.org/support                                    *\r
70      *                                                                       *\r
71      *    Thank you!                                                         *\r
72      *                                                                       *\r
73     ***************************************************************************\r
74 \r
75     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
76     license and Real Time Engineers Ltd. contact details.\r
77 \r
78     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
79     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
80     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
81 \r
82     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
83     Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
84 \r
85     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
86     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
87     licenses offer ticketed support, indemnification and commercial middleware.\r
88 \r
89     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
90     engineered and independently SIL3 certified version for use in safety and\r
91     mission critical applications that require provable dependability.\r
92 \r
93     1 tab == 4 spaces!\r
94 */\r
95 \r
96 /* Scheduler includes. */\r
97 #include "FreeRTOS.h"\r
98 #include "task.h"\r
99 \r
100 /*\r
101  * The register test task as described in the comments at the top of main-full.c.\r
102  */\r
103 void vRegisterTest1( void *pvParameters );\r
104 void vRegisterTest2( void *pvParameters );\r
105 \r
106 /* Variables that are incremented on each iteration of the reg test tasks -\r
107 provided the tasks have not reported any errors.  The check timer inspects these\r
108 variables to ensure they are still incrementing as expected.  If a variable\r
109 stops incrementing then it is likely that its associate task has stalled or\r
110 detected an error. */\r
111 volatile unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;\r
112 \r
113 /*-----------------------------------------------------------*/\r
114 \r
115 void vRegisterTest1( void *pvParameters )\r
116 {\r
117         /* This task uses an infinite loop that is implemented in the assembly \r
118         code.\r
119         \r
120         First fill the relevant registers with known values. */\r
121         asm volatile (  "       addi r3, r0, 3          \n\t" \\r
122                                         "       addi r4, r0, 4          \n\t" \\r
123                                         "       addi r6, r0, 6          \n\t" \\r
124                                         "       addi r7, r0, 7          \n\t" \\r
125                                         "       addi r8, r0, 8          \n\t" \\r
126                                         "       addi r9, r0, 9          \n\t" \\r
127                                         "       addi r10, r0, 10        \n\t" \\r
128                                         "       addi r11, r0, 11        \n\t" \\r
129                                         "       addi r12, r0, 12        \n\t" \\r
130                                         "       addi r16, r0, 16        \n\t" \\r
131                                         "       addi r19, r0, 19        \n\t" \\r
132                                         "       addi r20, r0, 20        \n\t" \\r
133                                         "       addi r21, r0, 21        \n\t" \\r
134                                         "       addi r22, r0, 22        \n\t" \\r
135                                         "       addi r23, r0, 23        \n\t" \\r
136                                         "       addi r24, r0, 24        \n\t" \\r
137                                         "       addi r25, r0, 25        \n\t" \\r
138                                         "       addi r26, r0, 26        \n\t" \\r
139                                         "       addi r27, r0, 27        \n\t" \\r
140                                         "       addi r28, r0, 28        \n\t" \\r
141                                         "       addi r29, r0, 29        \n\t" \\r
142                                         "       addi r30, r0, 30        \n\t" \\r
143                                         "       addi r31, r0, 31        \n\t"\r
144                                 );\r
145 \r
146         /* Now test the register values to ensure they contain the same value that\r
147         was written to them above.       This task will get preempted frequently so \r
148         other tasks are likely to have executed since the register values were \r
149         written.  If any register contains an unexpected value then the task will\r
150         branch to Error_Loop_1, which in turn prevents it from incrementing its\r
151         loop counter, enabling the check timer to determine that all is not as it\r
152         should be. */\r
153 \r
154         asm volatile (  "Loop_Start_1:                          \n\t" \\r
155                                         "       xori r18, r3, 3                 \n\t" \\r
156                                         "       bnei r18, Error_Loop_1  \n\t" \\r
157                                         "       xori r18, r4, 4                 \n\t" \\r
158                                         "       bnei r18, Error_Loop_1  \n\t" \\r
159                                         "       xori r18, r6, 6                 \n\t" \\r
160                                         "       bnei r18, Error_Loop_1  \n\t" \\r
161                                         "       xori r18, r7, 7                 \n\t" \\r
162                                         "       bnei r18, Error_Loop_1  \n\t" \\r
163                                         "       xori r18, r8, 8                 \n\t" \\r
164                                         "       bnei r18, Error_Loop_1  \n\t" \\r
165                                         "       xori r18, r9, 9                 \n\t" \\r
166                                         "       bnei r18, Error_Loop_1  \n\t" \\r
167                                         "       xori r18, r10, 10               \n\t" \\r
168                                         "       bnei r18, Error_Loop_1  \n\t" \\r
169                                         "       xori r18, r11, 11               \n\t" \\r
170                                         "       bnei r18, Error_Loop_1  \n\t" \\r
171                                         "       xori r18, r12, 12               \n\t" \\r
172                                         "       bnei r18, Error_Loop_1  \n\t" \\r
173                                         "       xori r18, r16, 16               \n\t" \\r
174                                         "       bnei r18, Error_Loop_1  \n\t" \\r
175                                         "       xori r18, r19, 19               \n\t" \\r
176                                         "       bnei r18, Error_Loop_1  \n\t" \\r
177                                         "       xori r18, r20, 20               \n\t" \\r
178                                         "       bnei r18, Error_Loop_1  \n\t" \\r
179                                         "       xori r18, r21, 21               \n\t" \\r
180                                         "       bnei r18, Error_Loop_1  \n\t" \\r
181                                         "       xori r18, r22, 22               \n\t" \\r
182                                         "       bnei r18, Error_Loop_1  \n\t" \\r
183                                         "       xori r18, r23, 23               \n\t" \\r
184                                         "       bnei r18, Error_Loop_1  \n\t" \\r
185                                         "       xori r18, r24, 24               \n\t" \\r
186                                         "       bnei r18, Error_Loop_1  \n\t" \\r
187                                         "       xori r18, r25, 25               \n\t" \\r
188                                         "       bnei r18, Error_Loop_1  \n\t" \\r
189                                         "       xori r18, r26, 26               \n\t" \\r
190                                         "       bnei r18, Error_Loop_1  \n\t" \\r
191                                         "       xori r18, r27, 27               \n\t" \\r
192                                         "       bnei r18, Error_Loop_1  \n\t" \\r
193                                         "       xori r18, r28, 28               \n\t" \\r
194                                         "       bnei r18, Error_Loop_1  \n\t" \\r
195                                         "       xori r18, r29, 29               \n\t" \\r
196                                         "       bnei r18, Error_Loop_1  \n\t" \\r
197                                         "       xori r18, r30, 30               \n\t" \\r
198                                         "       bnei r18, Error_Loop_1  \n\t" \\r
199                                         "       xori r18, r31, 31               \n\t" \\r
200                                         "       bnei r18, Error_Loop_1  \n\t"\r
201                                  );\r
202 \r
203         /* If this task has not branched to the error loop, then everything is ok,\r
204         and the check variable can be incremented to indicate that this task\r
205         is still running.  Then, brach back to the top to check the register\r
206         contents again. */\r
207         asm volatile (  "       lwi r18, r0, ulRegTest1CycleCount       \n\t" \\r
208                                         "       addik r18, r18, 1                                       \n\t" \\r
209                                         "       swi r18, r0, ulRegTest1CycleCount       \n\t" \\r
210                                         "                                                                               \n\t" \\r
211                                         "       bri Loop_Start_1 "\r
212                                  );\r
213 \r
214          /* The test function will branch here if it discovers an error.  This part\r
215         of the code just sits in a NULL loop, which prevents the check variable\r
216         incrementing any further to allow the check timer to recognize that this\r
217         test has failed. */\r
218         asm volatile (  "Error_Loop_1:                  \n\t" \\r
219                                         "       bri 0                           \n\t" \\r
220                                         "       nop                                     \n\t" \\r
221                                  );\r
222 \r
223         ( void ) pvParameters;\r
224 }\r
225 /*-----------------------------------------------------------*/\r
226 \r
227 void vRegisterTest2( void *pvParameters )\r
228 {\r
229         /* This task uses an infinite loop that is implemented in the assembly \r
230         code.\r
231         \r
232         First fill the registers with known values. */\r
233         asm volatile (  "       addi r16, r0, 1016      \n\t" \\r
234                                         "       addi r19, r0, 1019      \n\t" \\r
235                                         "       addi r20, r0, 1020      \n\t" \\r
236                                         "       addi r21, r0, 1021      \n\t" \\r
237                                         "       addi r22, r0, 1022      \n\t" \\r
238                                         "       addi r23, r0, 1023      \n\t" \\r
239                                         "       addi r24, r0, 1024      \n\t" \\r
240                                         "       addi r25, r0, 1025      \n\t" \\r
241                                         "       addi r26, r0, 1026      \n\t" \\r
242                                         "       addi r27, r0, 1027      \n\t" \\r
243                                         "       addi r28, r0, 1028      \n\t" \\r
244                                         "       addi r29, r0, 1029      \n\t" \\r
245                                         "       addi r30, r0, 1030      \n\t" \\r
246                                         "       addi r31, r0, 1031      \n\t" \\r
247                                         "                                                       " \\r
248                                         "Loop_Start_2:                          "\r
249                                 );\r
250 \r
251         /* Unlike vRegisterTest1, vRegisterTest2 performs a yield.  This increases\r
252         the test coverage, but does mean volatile registers need re-loading with \r
253         their exepcted values. */\r
254         taskYIELD();\r
255 \r
256         /* taskYIELD() could have changed temporaries - set them back to those\r
257         expected by the reg test task. */\r
258         asm volatile (  "       addi r3, r0, 103        \n\t" \\r
259                                         "       addi r4, r0, 104        \n\t" \\r
260                                         "       addi r6, r0, 106        \n\t" \\r
261                                         "       addi r7, r0, 107        \n\t" \\r
262                                         "       addi r8, r0, 108        \n\t" \\r
263                                         "       addi r9, r0, 109        \n\t" \\r
264                                         "       addi r10, r0, 1010      \n\t" \\r
265                                         "       addi r11, r0, 1011      \n\t" \\r
266                                         "       addi r12, r0, 1012      \n\t" \\r
267                                 );\r
268 \r
269 \r
270         /* Now test the register values to ensure they contain the same value that\r
271         was written to them above.       This task will get preempted frequently so \r
272         other tasks are likely to have executed since the register values were \r
273         written. */\r
274         asm volatile (  "       xori r18, r3, 103               \n\t" \\r
275                                         "       bnei r18, Error_Loop_2  \n\t" \\r
276                                         "       xori r18, r4, 104               \n\t" \\r
277                                         "       bnei r18, Error_Loop_2  \n\t" \\r
278                                         "       xori r18, r6, 106               \n\t" \\r
279                                         "       bnei r18, Error_Loop_2  \n\t" \\r
280                                         "       xori r18, r7, 107               \n\t" \\r
281                                         "       bnei r18, Error_Loop_2  \n\t" \\r
282                                         "       xori r18, r8, 108               \n\t" \\r
283                                         "       bnei r18, Error_Loop_2  \n\t" \\r
284                                         "       xori r18, r9, 109               \n\t" \\r
285                                         "       bnei r18, Error_Loop_2  \n\t" \\r
286                                         "       xori r18, r10, 1010             \n\t" \\r
287                                         "       bnei r18, Error_Loop_2  \n\t" \\r
288                                         "       xori r18, r11, 1011             \n\t" \\r
289                                         "       bnei r18, Error_Loop_2  \n\t" \\r
290                                         "       xori r18, r12, 1012             \n\t" \\r
291                                         "       bnei r18, Error_Loop_2  \n\t" \\r
292                                         "       xori r18, r16, 1016             \n\t" \\r
293                                         "       bnei r18, Error_Loop_2  \n\t" \\r
294                                         "       xori r18, r19, 1019             \n\t" \\r
295                                         "       bnei r18, Error_Loop_2  \n\t" \\r
296                                         "       xori r18, r20, 1020             \n\t" \\r
297                                         "       bnei r18, Error_Loop_2  \n\t" \\r
298                                         "       xori r18, r21, 1021             \n\t" \\r
299                                         "       bnei r18, Error_Loop_2  \n\t" \\r
300                                         "       xori r18, r22, 1022             \n\t" \\r
301                                         "       bnei r18, Error_Loop_2  \n\t" \\r
302                                         "       xori r18, r23, 1023             \n\t" \\r
303                                         "       bnei r18, Error_Loop_2  \n\t" \\r
304                                         "       xori r18, r24, 1024             \n\t" \\r
305                                         "       bnei r18, Error_Loop_2  \n\t" \\r
306                                         "       xori r18, r25, 1025             \n\t" \\r
307                                         "       bnei r18, Error_Loop_2  \n\t" \\r
308                                         "       xori r18, r26, 1026             \n\t" \\r
309                                         "       bnei r18, Error_Loop_2  \n\t" \\r
310                                         "       xori r18, r27, 1027             \n\t" \\r
311                                         "       bnei r18, Error_Loop_2  \n\t" \\r
312                                         "       xori r18, r28, 1028             \n\t" \\r
313                                         "       bnei r18, Error_Loop_2  \n\t" \\r
314                                         "       xori r18, r29, 1029             \n\t" \\r
315                                         "       bnei r18, Error_Loop_2  \n\t" \\r
316                                         "       xori r18, r30, 1030             \n\t" \\r
317                                         "       bnei r18, Error_Loop_2  \n\t" \\r
318                                         "       xori r18, r31, 1031             \n\t" \\r
319                                         "       bnei r18, Error_Loop_2  \n\t"\r
320                                  );\r
321 \r
322         /* If this task has not branched to the error loop, then everything is ok,\r
323         and the check variable should be incremented to indicate that this task\r
324         is still running.  Then, brach back to the top to check the registers\r
325         again. */\r
326         asm volatile (  "       lwi r18, r0, ulRegTest2CycleCount       \n\t" \\r
327                                         "       addik r18, r18, 1                                       \n\t" \\r
328                                         "       swi r18, r0, ulRegTest2CycleCount       \n\t" \\r
329                                         "                                                                               \n\t" \\r
330                                         "       bri Loop_Start_2 "\r
331                                  );\r
332 \r
333          /* The test function will branch here if it discovers an error.  This part\r
334         of the code just sits in a NULL loop, which prevents the check variable\r
335         incrementing any further to allow the check timer to recognize that this\r
336         test has failed. */\r
337         asm volatile (  "Error_Loop_2:                  \n\t" \\r
338                                         "       bri 0                           \n\t" \\r
339                                         "       nop                                     \n\t" \\r
340                                  );\r
341 \r
342         ( void ) pvParameters;\r
343 }\r
344 \r
345 \r
346 \r
347 \r
348 \r
349 \r