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1 /*\r
2     FreeRTOS V7.5.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
3 \r
4     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
5 \r
6     ***************************************************************************\r
7      *                                                                       *\r
8      *    FreeRTOS provides completely free yet professionally developed,    *\r
9      *    robust, strictly quality controlled, supported, and cross          *\r
10      *    platform software that has become a de facto standard.             *\r
11      *                                                                       *\r
12      *    Help yourself get started quickly and support the FreeRTOS         *\r
13      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
14      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
15      *                                                                       *\r
16      *    Thank you!                                                         *\r
17      *                                                                       *\r
18     ***************************************************************************\r
19 \r
20     This file is part of the FreeRTOS distribution.\r
21 \r
22     FreeRTOS is free software; you can redistribute it and/or modify it under\r
23     the terms of the GNU General Public License (version 2) as published by the\r
24     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
25 \r
26     >>! NOTE: The modification to the GPL is included to allow you to distribute\r
27     >>! a combined work that includes FreeRTOS without being obliged to provide\r
28     >>! the source code for proprietary components outside of the FreeRTOS\r
29     >>! kernel.\r
30 \r
31     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
32     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
33     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
34     link: http://www.freertos.org/a00114.html\r
35 \r
36     1 tab == 4 spaces!\r
37 \r
38     ***************************************************************************\r
39      *                                                                       *\r
40      *    Having a problem?  Start by reading the FAQ "My application does   *\r
41      *    not run, what could be wrong?"                                     *\r
42      *                                                                       *\r
43      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
44      *                                                                       *\r
45     ***************************************************************************\r
46 \r
47     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
48     license and Real Time Engineers Ltd. contact details.\r
49 \r
50     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
51     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
52     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
53 \r
54     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
55     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
56     licenses offer ticketed support, indemnification and middleware.\r
57 \r
58     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
59     engineered and independently SIL3 certified version for use in safety and\r
60     mission critical applications that require provable dependability.\r
61 \r
62     1 tab == 4 spaces!\r
63 */\r
64 \r
65 /* Scheduler includes. */\r
66 #include "FreeRTOS.h"\r
67 #include "task.h"\r
68 \r
69 /*\r
70  * The register test task as described in the comments at the top of main-full.c.\r
71  */\r
72 void vRegisterTest1( void *pvParameters );\r
73 void vRegisterTest2( void *pvParameters );\r
74 \r
75 /* Variables that are incremented on each iteration of the reg test tasks -\r
76 provided the tasks have not reported any errors.  The check timer inspects these\r
77 variables to ensure they are still incrementing as expected.  If a variable\r
78 stops incrementing then it is likely that its associate task has stalled or\r
79 detected an error. */\r
80 volatile unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;\r
81 \r
82 /*-----------------------------------------------------------*/\r
83 \r
84 void vRegisterTest1( void *pvParameters )\r
85 {\r
86         /* This task uses an infinite loop that is implemented in the assembly \r
87         code.\r
88         \r
89         First fill the relevant registers with known values. */\r
90         asm volatile (  "       addi r3, r0, 3          \n\t" \\r
91                                         "       addi r4, r0, 4          \n\t" \\r
92                                         "       addi r6, r0, 6          \n\t" \\r
93                                         "       addi r7, r0, 7          \n\t" \\r
94                                         "       addi r8, r0, 8          \n\t" \\r
95                                         "       addi r9, r0, 9          \n\t" \\r
96                                         "       addi r10, r0, 10        \n\t" \\r
97                                         "       addi r11, r0, 11        \n\t" \\r
98                                         "       addi r12, r0, 12        \n\t" \\r
99                                         "       addi r16, r0, 16        \n\t" \\r
100                                         "       addi r19, r0, 19        \n\t" \\r
101                                         "       addi r20, r0, 20        \n\t" \\r
102                                         "       addi r21, r0, 21        \n\t" \\r
103                                         "       addi r22, r0, 22        \n\t" \\r
104                                         "       addi r23, r0, 23        \n\t" \\r
105                                         "       addi r24, r0, 24        \n\t" \\r
106                                         "       addi r25, r0, 25        \n\t" \\r
107                                         "       addi r26, r0, 26        \n\t" \\r
108                                         "       addi r27, r0, 27        \n\t" \\r
109                                         "       addi r28, r0, 28        \n\t" \\r
110                                         "       addi r29, r0, 29        \n\t" \\r
111                                         "       addi r30, r0, 30        \n\t" \\r
112                                         "       addi r31, r0, 31        \n\t"\r
113                                 );\r
114 \r
115         /* Now test the register values to ensure they contain the same value that\r
116         was written to them above.       This task will get preempted frequently so \r
117         other tasks are likely to have executed since the register values were \r
118         written.  If any register contains an unexpected value then the task will\r
119         branch to Error_Loop_1, which in turn prevents it from incrementing its\r
120         loop counter, enabling the check timer to determine that all is not as it\r
121         should be. */\r
122 \r
123         asm volatile (  "Loop_Start_1:                          \n\t" \\r
124                                         "       xori r18, r3, 3                 \n\t" \\r
125                                         "       bnei r18, Error_Loop_1  \n\t" \\r
126                                         "       xori r18, r4, 4                 \n\t" \\r
127                                         "       bnei r18, Error_Loop_1  \n\t" \\r
128                                         "       xori r18, r6, 6                 \n\t" \\r
129                                         "       bnei r18, Error_Loop_1  \n\t" \\r
130                                         "       xori r18, r7, 7                 \n\t" \\r
131                                         "       bnei r18, Error_Loop_1  \n\t" \\r
132                                         "       xori r18, r8, 8                 \n\t" \\r
133                                         "       bnei r18, Error_Loop_1  \n\t" \\r
134                                         "       xori r18, r9, 9                 \n\t" \\r
135                                         "       bnei r18, Error_Loop_1  \n\t" \\r
136                                         "       xori r18, r10, 10               \n\t" \\r
137                                         "       bnei r18, Error_Loop_1  \n\t" \\r
138                                         "       xori r18, r11, 11               \n\t" \\r
139                                         "       bnei r18, Error_Loop_1  \n\t" \\r
140                                         "       xori r18, r12, 12               \n\t" \\r
141                                         "       bnei r18, Error_Loop_1  \n\t" \\r
142                                         "       xori r18, r16, 16               \n\t" \\r
143                                         "       bnei r18, Error_Loop_1  \n\t" \\r
144                                         "       xori r18, r19, 19               \n\t" \\r
145                                         "       bnei r18, Error_Loop_1  \n\t" \\r
146                                         "       xori r18, r20, 20               \n\t" \\r
147                                         "       bnei r18, Error_Loop_1  \n\t" \\r
148                                         "       xori r18, r21, 21               \n\t" \\r
149                                         "       bnei r18, Error_Loop_1  \n\t" \\r
150                                         "       xori r18, r22, 22               \n\t" \\r
151                                         "       bnei r18, Error_Loop_1  \n\t" \\r
152                                         "       xori r18, r23, 23               \n\t" \\r
153                                         "       bnei r18, Error_Loop_1  \n\t" \\r
154                                         "       xori r18, r24, 24               \n\t" \\r
155                                         "       bnei r18, Error_Loop_1  \n\t" \\r
156                                         "       xori r18, r25, 25               \n\t" \\r
157                                         "       bnei r18, Error_Loop_1  \n\t" \\r
158                                         "       xori r18, r26, 26               \n\t" \\r
159                                         "       bnei r18, Error_Loop_1  \n\t" \\r
160                                         "       xori r18, r27, 27               \n\t" \\r
161                                         "       bnei r18, Error_Loop_1  \n\t" \\r
162                                         "       xori r18, r28, 28               \n\t" \\r
163                                         "       bnei r18, Error_Loop_1  \n\t" \\r
164                                         "       xori r18, r29, 29               \n\t" \\r
165                                         "       bnei r18, Error_Loop_1  \n\t" \\r
166                                         "       xori r18, r30, 30               \n\t" \\r
167                                         "       bnei r18, Error_Loop_1  \n\t" \\r
168                                         "       xori r18, r31, 31               \n\t" \\r
169                                         "       bnei r18, Error_Loop_1  \n\t"\r
170                                  );\r
171 \r
172         /* If this task has not branched to the error loop, then everything is ok,\r
173         and the check variable can be incremented to indicate that this task\r
174         is still running.  Then, brach back to the top to check the register\r
175         contents again. */\r
176         asm volatile (  "       lwi r18, r0, ulRegTest1CycleCount       \n\t" \\r
177                                         "       addik r18, r18, 1                                       \n\t" \\r
178                                         "       swi r18, r0, ulRegTest1CycleCount       \n\t" \\r
179                                         "                                                                               \n\t" \\r
180                                         "       bri Loop_Start_1 "\r
181                                  );\r
182 \r
183          /* The test function will branch here if it discovers an error.  This part\r
184         of the code just sits in a NULL loop, which prevents the check variable\r
185         incrementing any further to allow the check timer to recognize that this\r
186         test has failed. */\r
187         asm volatile (  "Error_Loop_1:                  \n\t" \\r
188                                         "       bri 0                           \n\t" \\r
189                                         "       nop                                     \n\t" \\r
190                                  );\r
191 \r
192         ( void ) pvParameters;\r
193 }\r
194 /*-----------------------------------------------------------*/\r
195 \r
196 void vRegisterTest2( void *pvParameters )\r
197 {\r
198         /* This task uses an infinite loop that is implemented in the assembly \r
199         code.\r
200         \r
201         First fill the registers with known values. */\r
202         asm volatile (  "       addi r16, r0, 1016      \n\t" \\r
203                                         "       addi r19, r0, 1019      \n\t" \\r
204                                         "       addi r20, r0, 1020      \n\t" \\r
205                                         "       addi r21, r0, 1021      \n\t" \\r
206                                         "       addi r22, r0, 1022      \n\t" \\r
207                                         "       addi r23, r0, 1023      \n\t" \\r
208                                         "       addi r24, r0, 1024      \n\t" \\r
209                                         "       addi r25, r0, 1025      \n\t" \\r
210                                         "       addi r26, r0, 1026      \n\t" \\r
211                                         "       addi r27, r0, 1027      \n\t" \\r
212                                         "       addi r28, r0, 1028      \n\t" \\r
213                                         "       addi r29, r0, 1029      \n\t" \\r
214                                         "       addi r30, r0, 1030      \n\t" \\r
215                                         "       addi r31, r0, 1031      \n\t" \\r
216                                         "                                                       " \\r
217                                         "Loop_Start_2:                          "\r
218                                 );\r
219 \r
220         /* Unlike vRegisterTest1, vRegisterTest2 performs a yield.  This increases\r
221         the test coverage, but does mean volatile registers need re-loading with \r
222         their exepcted values. */\r
223         taskYIELD();\r
224 \r
225         /* taskYIELD() could have changed temporaries - set them back to those\r
226         expected by the reg test task. */\r
227         asm volatile (  "       addi r3, r0, 103        \n\t" \\r
228                                         "       addi r4, r0, 104        \n\t" \\r
229                                         "       addi r6, r0, 106        \n\t" \\r
230                                         "       addi r7, r0, 107        \n\t" \\r
231                                         "       addi r8, r0, 108        \n\t" \\r
232                                         "       addi r9, r0, 109        \n\t" \\r
233                                         "       addi r10, r0, 1010      \n\t" \\r
234                                         "       addi r11, r0, 1011      \n\t" \\r
235                                         "       addi r12, r0, 1012      \n\t" \\r
236                                 );\r
237 \r
238 \r
239         /* Now test the register values to ensure they contain the same value that\r
240         was written to them above.       This task will get preempted frequently so \r
241         other tasks are likely to have executed since the register values were \r
242         written. */\r
243         asm volatile (  "       xori r18, r3, 103               \n\t" \\r
244                                         "       bnei r18, Error_Loop_2  \n\t" \\r
245                                         "       xori r18, r4, 104               \n\t" \\r
246                                         "       bnei r18, Error_Loop_2  \n\t" \\r
247                                         "       xori r18, r6, 106               \n\t" \\r
248                                         "       bnei r18, Error_Loop_2  \n\t" \\r
249                                         "       xori r18, r7, 107               \n\t" \\r
250                                         "       bnei r18, Error_Loop_2  \n\t" \\r
251                                         "       xori r18, r8, 108               \n\t" \\r
252                                         "       bnei r18, Error_Loop_2  \n\t" \\r
253                                         "       xori r18, r9, 109               \n\t" \\r
254                                         "       bnei r18, Error_Loop_2  \n\t" \\r
255                                         "       xori r18, r10, 1010             \n\t" \\r
256                                         "       bnei r18, Error_Loop_2  \n\t" \\r
257                                         "       xori r18, r11, 1011             \n\t" \\r
258                                         "       bnei r18, Error_Loop_2  \n\t" \\r
259                                         "       xori r18, r12, 1012             \n\t" \\r
260                                         "       bnei r18, Error_Loop_2  \n\t" \\r
261                                         "       xori r18, r16, 1016             \n\t" \\r
262                                         "       bnei r18, Error_Loop_2  \n\t" \\r
263                                         "       xori r18, r19, 1019             \n\t" \\r
264                                         "       bnei r18, Error_Loop_2  \n\t" \\r
265                                         "       xori r18, r20, 1020             \n\t" \\r
266                                         "       bnei r18, Error_Loop_2  \n\t" \\r
267                                         "       xori r18, r21, 1021             \n\t" \\r
268                                         "       bnei r18, Error_Loop_2  \n\t" \\r
269                                         "       xori r18, r22, 1022             \n\t" \\r
270                                         "       bnei r18, Error_Loop_2  \n\t" \\r
271                                         "       xori r18, r23, 1023             \n\t" \\r
272                                         "       bnei r18, Error_Loop_2  \n\t" \\r
273                                         "       xori r18, r24, 1024             \n\t" \\r
274                                         "       bnei r18, Error_Loop_2  \n\t" \\r
275                                         "       xori r18, r25, 1025             \n\t" \\r
276                                         "       bnei r18, Error_Loop_2  \n\t" \\r
277                                         "       xori r18, r26, 1026             \n\t" \\r
278                                         "       bnei r18, Error_Loop_2  \n\t" \\r
279                                         "       xori r18, r27, 1027             \n\t" \\r
280                                         "       bnei r18, Error_Loop_2  \n\t" \\r
281                                         "       xori r18, r28, 1028             \n\t" \\r
282                                         "       bnei r18, Error_Loop_2  \n\t" \\r
283                                         "       xori r18, r29, 1029             \n\t" \\r
284                                         "       bnei r18, Error_Loop_2  \n\t" \\r
285                                         "       xori r18, r30, 1030             \n\t" \\r
286                                         "       bnei r18, Error_Loop_2  \n\t" \\r
287                                         "       xori r18, r31, 1031             \n\t" \\r
288                                         "       bnei r18, Error_Loop_2  \n\t"\r
289                                  );\r
290 \r
291         /* If this task has not branched to the error loop, then everything is ok,\r
292         and the check variable should be incremented to indicate that this task\r
293         is still running.  Then, brach back to the top to check the registers\r
294         again. */\r
295         asm volatile (  "       lwi r18, r0, ulRegTest2CycleCount       \n\t" \\r
296                                         "       addik r18, r18, 1                                       \n\t" \\r
297                                         "       swi r18, r0, ulRegTest2CycleCount       \n\t" \\r
298                                         "                                                                               \n\t" \\r
299                                         "       bri Loop_Start_2 "\r
300                                  );\r
301 \r
302          /* The test function will branch here if it discovers an error.  This part\r
303         of the code just sits in a NULL loop, which prevents the check variable\r
304         incrementing any further to allow the check timer to recognize that this\r
305         test has failed. */\r
306         asm volatile (  "Error_Loop_2:                  \n\t" \\r
307                                         "       bri 0                           \n\t" \\r
308                                         "       nop                                     \n\t" \\r
309                                  );\r
310 \r
311         ( void ) pvParameters;\r
312 }\r
313 \r
314 \r
315 \r
316 \r
317 \r
318 \r